Patents Assigned to Anadigics, Inc.
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Patent number: 6415843Abstract: A wafer removing spatula has a handle connected to a tray. A shaft of the handle is provided with a pair of support guides and the tray is provided with a wafer support surface which rests on a tray support surface. The support guides and the tray support surface are configured and dimensioned to ensure that the wafer support surface is substantially parallel to the upper surface of a base plate on which both the support guides and the tray support surface rest. A front edge of the wafer support surface is provided with a bevel to facilitate lifting a wafer from a wafer carrier surface. The height of the lowermost portion of the front edge is approximately the same as the height of a wafer carrier placed on the base plate. During operation, the spatula is moved on the base plate towards the carrier with the wafer mounted thereon.Type: GrantFiled: January 10, 2001Date of Patent: July 9, 2002Assignee: Anadigics, Inc.Inventors: Bhola De, Mark Spencer Grey
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Patent number: 6404284Abstract: An circuit and method are provided for amplifying RF input signal to produce RF output signals with third-order intermodulation distortion products. The circuit and method use a feedback signal to control the bias voltage of the amplifier, such that the output third-order intermodulation distortion product increases monotonically with the RF input signal power. Specifically, the third-order intermodulation distortion product responds over a predetermined output power range by increasing three decibels in response to each one-decibel increase in input power.Type: GrantFiled: April 19, 2001Date of Patent: June 11, 2002Assignee: Anadigics, Inc.Inventor: Douglas Matthew Johnson
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Publication number: 20010011926Abstract: A GaAs MMIC dual-band amplifier for wireless communications is disclosed for operation at either the 800 MHz or the 1900 MHz band and it provides desired gain and input and output impedance. Switching impedance networks are used at the input and output of the amplifier to provide matching input impedance and desired output impedance for operation in the two bands. Switching impedance networks are also used between any successive stages of the amplifier to provide proper interstage impedance. The dual band amplifier includes a bias control circuit which biases the amplifier to operate in A, B, AB or C mode. The amplifier can be used for the AMPS 800 or the GSM 900 operation or any other cellular operation such as the PCS 1900 and the it can be switched between the two operations by simply applying a proper control signal to the amplifier.Type: ApplicationFiled: March 29, 2001Publication date: August 9, 2001Applicant: Anadigics, Inc.Inventor: Aharon Adar
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Patent number: 6242986Abstract: A GaAs MMIC dual-band amplifier for wireless communications is disclosed for operation at either the 800 MHz or the 1900 MHz band and it provides desired gain and input and output impedance. Switching impedance networks are used at the input and output of the amplifier to provide matching input impedance and desired output impedance for operation in the two bands. Switching impedance networks are also used between any successive stages of the amplifier to provide proper interstage impedance. The dual band amplifier includes a bias control circuit which biases the amplifier to operate in A, B, AB or C mode. The amplifier can be used for the AMPS 800 or the GSM 900 operation or any other cellular operation such as the PCS 1900 and the it can be switched between the two operations by simply applying a proper control signal to the amplifier.Type: GrantFiled: May 18, 1998Date of Patent: June 5, 2001Assignee: Anadigics, Inc.Inventor: Aharon Adar
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Patent number: 5952860Abstract: The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.Type: GrantFiled: May 5, 1998Date of Patent: September 14, 1999Assignee: Anadigics, Inc.Inventors: John van Saders, Robert J. Bayruns
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Patent number: 5892400Abstract: The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.Type: GrantFiled: December 12, 1996Date of Patent: April 6, 1999Assignee: Anadigics, Inc.Inventors: John van Saders, Robert J. Bayruns
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Patent number: 5774017Abstract: A GaAs MMIC dual-band amplifier for wireless communications is disclosed for operation at either the 800 MHz or the 1900 MHz band and it provides desired gain and input and output impedance. Switching impedance networks are used at the input and output of the amplifier to provide matching input impedance and desired output impedance for operation in the two bands. Switching impedance networks are also used between any successive stages of the amplifier to provide proper interstage impedance. The dual band amplifier includes a bias control circuit which biases the amplifier to operate in A, B, AB or C mode. The amplifier can be used for the AMPS 800 or the GSM 900 operation or any other cellular operation such as the PCS 1900 and the it can be switched between the two operations by simply applying a proper control signal to the amplifier.Type: GrantFiled: June 3, 1996Date of Patent: June 30, 1998Assignee: Anadigics, Inc.Inventor: Aharon Adar
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Patent number: 5748049Abstract: A multiple-frequency local oscillator for providing an LO signal at one of a multiple of predetermined resonant frequencies associated with a number of resonators is disclosed. It includes a number of LO input ports for coupling to a plurality of resonators, respectively, each resonator having a predetermined resonant frequency; the local oscillator is controlled to selectively provide at its LO output port an output LO signal at any one of the resonant frequencies.Type: GrantFiled: November 23, 1994Date of Patent: May 5, 1998Assignee: Anadigics, Inc.Inventors: John Thomas Bayruns, Raymond Mitchell Waugh, Phillip W. Wallace, Robert J. Bayruns, Thomas D. DeNigris
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Patent number: 5736913Abstract: Low impedance means are provided for coupling a common circuit ground of a microwave circuit to the ground potential. The low impedance means include a plurality of resonators, each having a distinct resonant frequency at which it displays a minimum impedance. The resonant frequencies of the resonators are chosen and arranged such that the resonators together operate to provide a low impedance band in the frequency spectrum within which low impedance coupling between the common circuit ground and the ground potential is achieved. In a preferred embodiment, resonators include capacitors connected in series with inductive bonding wires, and different resonant frequencies are obtained by using capacitors with different capacitance.Type: GrantFiled: February 14, 1996Date of Patent: April 7, 1998Assignee: Anadigics, Inc.Inventors: Kenneth S. Sanyigo, Raymond M. Waugh, John T. Bayruns
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Patent number: 5646573Abstract: Automatic Gain Transimpedance Amplifiers for analog applications having high bandwidth, wide dynamic range, and ultra-high linearity. The transimpedance amplifiers includes an operational amplifier and a variable feedback resistance means connected between the input and the output of the amplifier. The variable feedback resistance means may include a single feedback PIN diode, two serially connected feedback PIN didoes, a PIN diode connected to a feedback resistor in parallel, or two serially connected PIN diodes connected to a feedback resistor in parallel. Ultra-high linearity is achieved because the dynamic resistance of the PIN diode under forward bias is substantially linearly dependent on the inverse of the current that passes the diode.Type: GrantFiled: February 28, 1995Date of Patent: July 8, 1997Assignee: Anadigics, Inc.Inventors: Robert J. Bayruns, Timothy M. Laverick
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Patent number: 5625307Abstract: A monolithic upconverter integrated circuit is described which performs the first frequency conversion of a dual conversion cable television (CATV) receiver. The upconverter chip includes three functional blocks: a Gilbert type image-rejecting mixer, a phase splitter, and a voltage-controlled oscillator. Mixing is performed by a novel Gilbert type mixer including image-rejection inductors to improve the noise figure of the mixer. A differential circuit topology allows the monolithic upconverter chip to utilize a plastic dual inline batwing package without considerable performance loss. On-chip RF bypass networks, in the form of series RC terminations, also help compensate for the undesirable effects of pin inductances in the dual inline package. A resistor-based DC biasing scheme dramatically reduces power-up latency, allowing faster testing.Type: GrantFiled: March 3, 1992Date of Patent: April 29, 1997Assignee: Anadigics, Inc.Inventor: Norman R. Scheinberg
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Patent number: 5602510Abstract: An automatic transimpedance control amplifier is disclosed. The amplifier incorporates an automatic gain control circuit which simultaneously and automatically adjust the value of transimpedance and the voltage gain at each gain stage of the amplifier according to the input current. The amplifier has wide bandwidth, high sensitivity/and more importantly, wide dynamic range.Type: GrantFiled: June 8, 1995Date of Patent: February 11, 1997Assignee: Anadigics, Inc.Inventors: Robert J. Bayruns, Timothy M. Laverick
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Patent number: 5563545Abstract: A monolithic upconverter integrated circuit is described which performs the first frequency conversion of a dual conversion cable television (CATV) receiver. The upconverter chip includes three functional blocks: a Gilbert type image-rejecting mixer, a phase splitter, and a voltage-controlled oscillator. Mixing is performed by a novel Gilbert type mixer including image-rejection inductors to improve the noise figure of the mixer. A differential circuit topology allows the monolithic upconverter chip to utilize a plastic dual inline batwing package without considerable performance loss. On-chip RF bypass networks, in the form of series RC terminations, also help compensate for the undesirable effects of pin inductances in the dual inline package. A resistor-based DC biasing scheme dramatically reduces power-up latency, allowing faster testing.Type: GrantFiled: September 27, 1994Date of Patent: October 8, 1996Assignee: Anadigics, Inc.Inventor: Norman R. Scheinberg
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Patent number: 5557144Abstract: A plastic package for microwave applications up to 14 Ghz is disclosed. The plastic package includes a plastic platform, a lead frame embedded on the surface of the platform and, in one embodiment, a plastic cap mounted on the platform so as to seal the chip within the package. The lead frame includes a baseplate for mounting at least one semiconductor chip, at least one ground lead attached to the baseplate and extending outwardly therefrom, and at least one signal lead for conducting signals to or from such semiconductor chip. The signal lead and at least one ground lead are configured as a microwave transmission line such as microwave coplanar strips, or microwave coplanar waveguide for transmitting microwave frequency signals. The package offers a low inductance ground path, good thermal characteristics, and low parasitic inductance and capacitance. It can be applied for high speed and high frequency applications.Type: GrantFiled: January 29, 1993Date of Patent: September 17, 1996Assignee: Anadigics, Inc.Inventors: Michael A. Rosenstock, Phillip W. Wallace, John T. Bayruns, Kenneth S. Sanyigo, George G. Gilbert
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Patent number: 5493718Abstract: An electrical circuit forming a dual-channel low current Low Noise Block (LNB) downconverter comprising two downconverting circuits electrically connected in series with each other and each electrically connected in parallel with a Zener diode such that power consumption is minimized and component life improved.Type: GrantFiled: August 26, 1993Date of Patent: February 20, 1996Assignee: Anadigics, Inc.Inventors: Robert J. Bayruns, Philip W. Wallace, Thomas D. DeNigris
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Patent number: 5442321Abstract: An automatic transimpedance control amplifier is disclosed. The amplifier incorporates an automatic gain control circuit which simultaneously and automatically adjust the value of transimpedance and the voltage gain at each gain stage of the amplifier according to the input current. The amplifier has wide bandwidth, high sensitivity, and more importantly, wide dynamic range.Type: GrantFiled: July 8, 1993Date of Patent: August 15, 1995Assignee: Anadigics, Inc.Inventors: Robert J. Bayruns, Timothy M. Laverick
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Patent number: 5428837Abstract: Technique for reducing local oscillator leakage in integrated frequency conversion circuits is disclosed, which provides coupling an external portion of a resonator circuit to the integrated frequency conversion circuit. The coupling is accomplished without using any of the DC power or ground pins of the conversion circuit. A frequency conversion circuit based on this technique includes resonator, oscillator, and mixer circuits. Part of the oscillator and mixer circuit is encapsulated in a package, whereas at least a portion of the resonator circuit is located outside the package. The outside portion of the resonator circuit connects to at least two external resonator pins of the package such that, during the operating of the conversion circuit, the net current entering the package via said external resonator pins is approximately zero.Type: GrantFiled: January 13, 1993Date of Patent: June 27, 1995Assignee: Anadigics, Inc.Inventors: Robert J. Bayruns, Scott D. Sweeney, Osvaldo J. Lopez
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Patent number: 5138285Abstract: A simple and broadly applicable method for reducing phase noise in varactor tuned voltage-controlled oscillators (VCOs) is described. In particular, it is shown that by appropriately selecting the inductance of a choke inductor used to isolate the varactor from its DC bias supply, this inductor will also perform a noise filtering function by shunting off part of the internally generated low frequency random electronic noise through the DC supply, thus reducing a primary contributor of oscillator phase noise. Versions of this phase noise reduction method appropriate for the Colpitts, Hartley, and Clapp type LC voltage-controlled oscillator topologies are illustrated.Type: GrantFiled: July 19, 1991Date of Patent: August 11, 1992Assignee: Anadigics, Inc.Inventor: Ronald L. Michels
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Patent number: 4743862Abstract: A JFET current mirror is employed in the voltage level shifting section of an operational amplifier. The JFET current mirror includes a first and second JFET coupled at their gates for conducting current I1 and I2 respectively. The gate of a third JFET is connected to the drain of the first JFET and the source of the third JFET is connected by a plurality of diodes to the gate of the first JFET. Current flowing through the diodes produces a voltage drop across the diodes sufficient to bias the first JFET into saturation so that I2 will track I1. A fixed resistance R in the path of I2 produces a predetermined voltage level shift provided that I1 is constant. Therefore, a voltage applied to one terminal of R is level shifted by a predetermined voltage with respect to the other terminal of R. The voltage shifted output is then coupled to an internal amplifier section and the output buffer section of the operational amplifier.Type: GrantFiled: May 2, 1986Date of Patent: May 10, 1988Assignee: Anadigics, Inc.Inventor: Norman R. Scheinberg
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Patent number: 4739282Abstract: An FET amplifier having a current bleeder includes a positive feedback path for increasing the overall gain of the device. The positive feedback path includes an additional FET having its drain source path connected to the current bleeder and its gate connected to the output of the amplifier. The positive feedback causes the current through the current bleeder to vary in direct response to the output of the amplifier, thereby significantly increasing its overall gain.Type: GrantFiled: July 21, 1986Date of Patent: April 19, 1988Assignee: Anadigics, Inc.Inventor: Norman R. Scheinberg