Patents Assigned to Anadigics, Inc.
  • Patent number: 6719518
    Abstract: A portable tube holder apparatus and tube loading method facilitates safe and rapid loading of tubes containing electronic components into a machine. The tube holder has a tube guide sized to receive a plurality of tubes and a support to selectively hold the tubes in that guide. The holder can be loaded with a relatively large number of tubes at a workstation area and then used to safely transport the tubes to the machine without risk of the components falling out of the tubes. The support, which is preferably slidable, permits all of the tubes in the guide to be readily released into the machine's feeding system, enabling fast loading of the machine and also minimizing down-time for machines that cannot run while being loaded. The portable tube holder preferably has an interface designed to facilitate alignment of the tube holder's guide with the feeding system guide in the machine.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: April 13, 2004
    Assignee: Anadigics, Inc.
    Inventors: Peter Wong, Scott Allaway, Andrew Plitz, Glen Schneider
  • Patent number: 6710657
    Abstract: A current steering-type gain control circuit provides a non-zero minimum gain in response to readily reproducible control signal conditions and without requiring sophisticated control-signal-generating circuitry. The gain control circuit is adapted from a conventional differential pair of current-steering transistors, biased by first and second control signals respectively. To provide a well-defined non-zero minimum gain, the gain control circuit includes at least one additional current steering transistor that further steers current to the output when conducting in the minimum gain state. By further including one or more additional pairs of current steering transistors, the gain control circuit also provides a plurality of well-defined states with gains between the maximum and minimum gain values of the circuit. The minimum and intermediate gain values, may be selected by varying the physical characteristics of the current steering transistors which may be BJTs or FETs.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 23, 2004
    Assignee: Anadigics, Inc.
    Inventor: Ming Yang
  • Patent number: 6664500
    Abstract: A laser system and method for cleanly trimming or severing resistive links fabricated on in undoped gallium arsenide substrate without damaging or affecting adjacent circuit structures or the underlying or surrounding substrate is disclosed. The system includes a laser source adapted to generate an output at a wavelength within the range of 0.9 to 1.5 &mgr;m, a resistive film structure formed on an undoped gallium arsenide substrate, and a beam positioner and alignment system to align the laser source with the target structure. The method includes generating a laser output at a wavelength in a range of about 0.9 to 1.5 &mgr;m and directing the laser output to illuminate a resistive thin-film structure fabricated on a gallium arsenide substrate. The resistive film structure includes a first layer of protective dielectric and a layer of resistive thin-film material. Preferably, a second layer of protective dielectric lies upon the layer of resistive thin-film material.
    Type: Grant
    Filed: December 16, 2000
    Date of Patent: December 16, 2003
    Assignee: Anadigics, Inc.
    Inventors: Mark Steven Wilbur, Sheo Kumar Khetan
  • Patent number: 6645790
    Abstract: The present invention is generally drawn to a system and method for creating RF integrated microwave circuits that can support multiple applications where many RF functions can be derived from a generic integrated circuit after the RF integrated microwave circuit is manufactured. More specifically, the present invention can provide active and passive device building blocks of respective monolithic microwave integrated circuit (MMIC) arrays and substrates that can be coupled together in various ways after manufacture of the integrated circuits to achieve multiple applications. This can accomplished by manufacturing chips with multiple active device blocks that can support various and multiple applications and that can be coupled together in various ways, adjusted, or tuned after manufacture.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: November 11, 2003
    Assignee: Anadigics, Inc.
    Inventors: Sanjay B. Moghe, Carl S. Chun, Pranav N. Patel, Seung-yup Yoo
  • Patent number: 6642578
    Abstract: A field effect transistor used in radio frequency switching applications and having a linear performance characteristic is disclosed. The transistor comprises a plurality of gate lines, a source terminal, a drain terminal, and two feed forward capacitors electrically coupled to the source and drain terminals and the gate line at a plurality of points along the line. An improved transistor preferably includes three or more gate lines to help improve harmonic suppression.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: November 4, 2003
    Assignee: Anadigics, Inc.
    Inventors: Brian Scott Arnold, Steven William Cooper
  • Patent number: 6639466
    Abstract: An circuit and method are provided for amplifying RF input signal to produce RF output signals with third-order intermodulation distortion products. The circuit and method use a feedback signal to control the bias voltage of the amplifier, such that the output third-order intermodulation distortion product increases monotonically with the RF input signal power. Specifically, the third-order intermodulation distortion product responds over a predetermined output power range by increasing three decibels in response to each one-decibel increase in input power.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: October 28, 2003
    Assignee: Anadigics Inc.
    Inventor: Douglas Matthew Johnson
  • Patent number: 6580321
    Abstract: An active clamping circuit for a multi-stage power amplifier includes a feedback circuit which affects the gain of the amplifier. The feedback circuit feeds an output via a filter and a clamping transistor to an input of at least one stage of the power amplifier. The output fed to the filter and clamping transistor may be tapped from one or more diodes belonging to a diode stack connected to the power amplifier's output.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: June 17, 2003
    Assignee: Anadigics, Inc.
    Inventors: Thomas William Arell, Henry Liwinski, Joel Morison Lott, Osvaldo J. Lopez
  • Patent number: 6577198
    Abstract: A single-input/multiple output power splitter having internal feedback circuitry. A separate amplifying circuit, such as a transistor, is used to drive each of the outputs. The transistors may be arranged in a common source/emitter amplifying configuration in which the gates/bases are connected together as an input node. Each transistor has an associated feedback circuit including passive circuit elements, such as resistors. The passive circuit elements are connected between the drain/collector of its corresponding transistor and a common intermediate connecting node to which all feedback resistors are also connected. The common intermediate node is connected to the single input via a separate input resistor.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: June 10, 2003
    Assignee: Anadigics, Inc.
    Inventor: John Thomas Bayruns
  • Patent number: 6559722
    Abstract: A power amplifier circuit is disclosed, whose power efficiency is optimized by operating its stages in substantially close to a Class B mode by reducing the quiescent current during low driver signal levels. As the driver signal amplitude increases, the amplifier is dynamically biased to operate in a Class AB mode. A further enhancement to the power amplifier circuit includes a temperature compensation circuit to adjust the bias of the amplifier so as to stabilize the performance over a wide temperature range.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: May 6, 2003
    Assignee: Anadigics, Inc.
    Inventors: Osvaldo Jorge Lopez, Robert Bayruns, Mahendra Singh
  • Patent number: 6554949
    Abstract: A wafer demounting receptacle comprises a substantially circular plate member and an upstanding rim structure provided around a periphery of the plate member. The rim structure is stepped and includes a first step defining a first diameter, and a second step defining a second diameter grater than the first diameter. The riser of the first step has a very low height so that a gap between the plate member and a fragile semiconductor wafer bonded to a carrier having a peripheral abutment surface resting on the run of the first step, limits the bending of an edge portion of the wafer in a direction towards the plate member while the wafer is partially demounted from a wafer carrier. The plate member is further provided with a pattern of holes that generates eddy currents in a solvent that flows over the wafer, carrier, and receptacle so as to soften and dissolve the mounting adhesive between the wafer and carrier such that the wafer is separated from the carrier.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: April 29, 2003
    Assignee: Anadigics, Inc.
    Inventors: Bhola De, Daniel Stofman
  • Publication number: 20030072640
    Abstract: A portable tube holder apparatus and tube loading method facilitates safe and rapid loading of tubes containing electronic components into a machine. The tube holder has a tube guide sized to receive a plurality of tubes and a support to selectively hold the tubes in that guide. The holder can be loaded with a relatively large number of tubes at a workstation area and then used to safely transport the tubes to the machine without risk of the components falling out of the tubes. The support, which is preferably slidable, permits all of the tubes in the guide to be readily released into the machine's feeding system, enabling fast loading of the machine and also minimizing down-time for machines that cannot run while being loaded. The portable tube holder preferably has an interface designed to facilitate alignment of the tube holder's guide with the feeding system guide in the machine.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Applicant: Anadigics, Inc.
    Inventors: Peter Wong, Scott Allaway, Andrew Plitz, Glen Schneider
  • Patent number: 6515546
    Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains die mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: February 4, 2003
    Assignee: Anadigics, Inc.
    Inventor: Henry Z. Liwinski
  • Publication number: 20030020540
    Abstract: An circuit and method are provided for amplifying RF input signal to produce RF output signals with third-order intermodulation distortion products. The circuit and method use a feedback signal to control the bias voltage of the amplifier, such that the output third-order intermodulation distortion product increases monotonically with the RF input signal power. Specifically, the third-order intermodulation distortion product responds over a predetermined output power range by increasing three decibels in response to each one-decibel increase in input power.
    Type: Application
    Filed: June 11, 2002
    Publication date: January 30, 2003
    Applicant: ANADIGICS, INC.
    Inventor: Douglas Matthew Johnson
  • Publication number: 20030015286
    Abstract: A wafer demounting receptacle comprises a substantially circular plate member and an upstanding rim structure provided around a periphery of the plate member. The rim structure is stepped and includes a first step defining a first diameter, and a second step defining a second diameter grater than the first diameter. The riser of the first step has a very low height so that a gap between the plate member and a fragile semiconductor wafer bonded to a carrier having a peripheral abutment surface resting on the run of the first step, limits the bending of an edge portion of the wafer in a direction towards the plate member while the wafer is partially demounted from a wafer carrier. The plate member is further provided with a pattern of holes that generates eddy currents in a solvent that flows over the wafer, carrier, and receptacle so as to soften and dissolve the mounting adhesive between the wafer and carrier such that the wafer is separated from the carrier.
    Type: Application
    Filed: September 17, 2002
    Publication date: January 23, 2003
    Applicant: Anadigics, Inc.
    Inventors: Bhola De, Daniel Stofman
  • Publication number: 20030017660
    Abstract: A MESFET has a conduction channel provided with a first doping profile in a first portion which extends between the source and the gate, and a second doping profile in a second portion which extends between the gate and the drain. A background p-type region is provided beneath the first portion, but not necessarily behind the second portion.
    Type: Application
    Filed: September 10, 2002
    Publication date: January 23, 2003
    Applicant: Anadigics, Inc.
    Inventor: Weiqi Li
  • Patent number: 6501331
    Abstract: A GaAs MMIC dual-band amplifier for wireless communications is disclosed for operation at either the 800 MHz or the 1900 MHz band and it provides desired gain and input and output impedance. Switching impedance networks are used at the input and output of the amplifier to provide matching input impedance and desired output impedance for operation in the two bands. Switching impedance networks are also used between any successive stages of the amplifier to provide proper interstage impedance. The dual band amplifier includes a bias control circuit which biases the amplifier to operate in A, B, AB or C mode. The amplifier can be used for the AMPS 800 or the GSM 900 operation or any other cellular operation such as the PCS 1900 and the it can be switched between the two operations by simply applying a proper control signal to the amplifier.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: December 31, 2002
    Assignee: Anadigics, Inc.
    Inventor: Aharon Adar
  • Patent number: 6491083
    Abstract: A wafer demounting receptacle comprises a substantially circular plate member and an upstanding rim structure provided around a periphery of the plate member. The rim structure is stepped and includes a first step defining a first diameter, and a second step defining a second diameter grater than the first diameter. The riser of the first step has a very low height so that a gap between the plate member and a fragile semiconductor wafer bonded to a carrier having a peripheral abutment surface resting on the run of the first step, limits the bending of an edge portion of the wafer in a direction towards the plate member while the wafer is partially demounted from a wafer carrier. The plate member is further provided with a pattern of holes that generates eddy currents in a solvent that flows over the wafer, carrier, and receptacle so as to soften and dissolve the mounting adhesive between the wafer and carrier such that the wafer is separated from the carrier.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: December 10, 2002
    Assignee: Anadigics, Inc.
    Inventors: Bhola De, Daniel Stofman
  • Patent number: 6470946
    Abstract: A wafer demounting receptacle comprises a substantially circular plate member and an upstanding rim structure provided around a periphery of the plate member. The rim structure is stepped and includes a first step defining a first diameter, and a second step defining a second diameter grater than the first diameter. The riser of the first step has a very low height so that a gap between the plate member and a fragile semiconductor wafer bonded to a carrier having a peripheral abutment surface resting on the run of the first step, limits the bending of an edge portion of the wafer in a direction towards the plate member while the wafer is partially demounted from a wafer carrier. The plate member is further provided with a pattern of holes that generates eddy currents in a solvent that flows over the wafer, carrier, and receptacle so as to soften and dissolve the mounting adhesive between the wafer and carrier such that the wafer is separated from the carrier.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: October 29, 2002
    Assignee: Anadigics, Inc.
    Inventor: Bhola De
  • Patent number: 6458640
    Abstract: A MESFET has a conduction channel provided with a first doping profile in a first portion which extends between the source and the gate, and a second doping profile in a second portion which extends between the gate and the drain. A background p-type region is provided beneath the first portion, but not necessarily behind the second portion.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: October 1, 2002
    Assignee: Anadigics, Inc.
    Inventor: Weiqi Li
  • Patent number: 6437585
    Abstract: An electrical contactor for establishing an electrical contact between a chip and a printed circuit board for testing chips comprising a conductive layer and a ground contact pedestal. The ground contact pedestal is preferably press fit and soldered onto a ground layer of the printed circuit board for establishing good ground contact with the chip. In addition, the contactor preferably has a thin profile that does not electrically interfere with sensitive electronics contained within the chip. The contactor also does not use a plastic frame for mounting purposes. Such plastic frames reduce accessibility to the printed circuit board, making fine tuning electronics in the printed circuit board more difficult. Rather, the contactor preferably includes two holes in its conductive layer that mount on dowels in the printed circuit board and is secured to the dowels by two O-rings.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: August 20, 2002
    Assignee: Anadigics, Inc.
    Inventors: Joseph John Mickey, III, Erik Wayne Demarest