Abstract: A electrochemical or other sensor interface circuit architecture can deliver substantial DC offset bias to an electrochemical or other sensor separately or independently from delivering a time-varying AC excitation signal, which can then be provided with higher resolution, which, in turn, can allow better resolution of the measured response signal providing the impedance characteristic of sensor condition. For example, a differential time-varying AC excitation signal for the sensor condition characteristic can be delivered separately and independently from a differential stable (e.g., DC or other) bias signal, such as by using separate digital-to-analog converters (DACs), so that providing the more stable signal does not limit the resolution and accuracy of the time-varying signal, such as by using up the dynamic range of a single DAC.

Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.

Abstract: A microelectronic circuit having at least one component adjacent a carrier that is not a semiconductor or sapphire. The circuit includes a component bearing stack of one or more layers having one or more passive components, which are adjacent or bonded to the carrier. In certain embodiments, the circuit also includes an etch stop layer of a material having a slower etch rate than silicon and a bond layer bonding the carrier and the component bearing one or more layers.

Abstract: A device for controlling an electronic switch between a power supply and a load includes a sensing circuit to measure a current to the load and a control circuit to control operation of the electronic switch if the current exceeds a current limit. The control circuit includes a normal current circuit to output a first switch control current to the electronic switch and a boost current circuit to output a second switch control current to the electronic switch, the first switch control current being higher than the second switch control current.

Abstract: A system comprises a plurality of power supplies, wherein a power supply provides a supply voltage rail to a voltage domain of the system; a plurality of power supply voltage sequencer devices electrically coupled to multiple power supplies of the plurality of power supplies, wherein a voltage sequencer device is configured to activate the multiple power supplies in a specified sequence; and a bus electrically coupled to the plurality of power supply voltage sequencer devices, wherein the bus is configured to communicate state information of the plurality of power supply voltage sequencer devices.

Abstract: A charge injection compensation circuit compensates for charge injection by a field-effect transistor (FET) switch regardless of a supply voltage. The charge injection compensation circuit includes a main switch that injects charge into an electronic circuit when switched off, and a charge storage device that stores the injected charge until it can be dissipated to a dissipating node. Upon the main switch being controlled to switch off, a pulse generator circuit controls a charge storage switch to switch on to transfer the charge injected from the main switch to the charge storage device and then switch off. A dissipation circuit dissipates the charge from the charge storage device to a dissipating node.

Abstract: This disclosure relates to data communication networks. An example data communication apparatus includes physical (PHY) layer circuitry that includes transceiver circuitry, decoder circuitry, and a signal analysis unit. The transceiver circuitry receives encoded data symbols via a network link. The received encoded data symbols are encoded using trellis coded modulation (TCM). The decoder circuitry decodes the received encoded data symbols using maximum-likelihood (ML) decoding to map a received symbol sequence to an allowed symbol sequence using a trace-back depth. A trace-back depth value is a number of symbols in the received symbol sequence used by the ML decoding to identify the allowed symbol sequence from the received symbol sequence. The signal analysis unit determines one or more link statistics of the network link, and sets the trace-back depth value according to the one or more link statistics.

Abstract: Phase detectors for clock and data recovery circuits are provided herein. In certain implementations, a phase detector includes sampling circuitry that generates a plurality of samples of an input data signal based on timing of a plurality of clock signals, a binary response circuit that processes the plurality of samples to generate a plurality of binary output signals providing a binary detector response, and a linear response circuit that processes the plurality of samples to generate a plurality of linear output signals providing a linear detector response. The phase detector generates one or more data output signals based on the plurality of samples to thereby recover data from the input data signal.

Abstract: Sensor error detection with an additional sensing channel is disclosed herein. First, second, third sensing elements can be disposed at angles relative to one another. In some embodiments, the first, second, and third sensing elements can be magnetic sensing elements, such as anisotropic magnetoresistance (AMR) sensing elements. Sensor data from first, second, and third sensing channels, respectively having the first, second, and third sensing elements, can be obtained. Expected third sensing channel data can be determined and compared to the obtained third sensing channel data to indicate error.

Abstract: Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.

Abstract: A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.

Abstract: An envelope tracking scheme can be used, such as to modulate a supply node of a power amplifier circuit to improve efficiency. For example, a magnitude or amplitude envelope of a signal to be modulated can be scaled and used to drive a node, such as a drain, of the power amplifier circuit. An envelope tracking signal can be generated such as having a bandwidth that is compressed as compared to a full-bandwidth envelope signal. A peak-value “look ahead” technique can be used, for example, so that amplitude compression or clipping of the transmit signal is suppressed when the bandwidth-compressed envelope tracking signal is used to modulate a supply node of the power amplifier used to amplify the transmit signal.

Abstract: Systems and methods are provided for automated analog fault injection including creating a list of fault models for injection to an analog circuit, adding a first fault placeholder to the analog circuit, running fault simulations by replacing the first fault placeholder with a first fault model from the list of fault models, and determining whether the first fault model is detected.

Abstract: In one particular example, this disclosure provides an efficient mechanism to determine the degree of parallelization possible for a loop in the presence of possible memory aliases that cannot be resolved at compile-time. Hardware instructions are provided that test memory addresses at run-time and set a mode or register that enables a single instance of a loop to run the maximum number of SIMD (Single Instruction, Multiple Data) lanes to run in parallel that obey the semantics of the original scalar loop. Other hardware features that extend applicability or performance of such instructions are enumerated.

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.

Abstract: Techniques to increase a data throughput rate of a filter circuit by preloading selectable memory circuits of the filter circuit with reference data, sampling input data at an input of the filter circuit, combining the sampled input data with the preloaded reference data, and generating a filter output based on the combined sampled input data and preloaded reference data.

Abstract: A BAW gyroscope is configured to operate with two pairs of orthogonal modes instead of a single pair in order to mitigate the impact of changes in gaps (e.g., introduced from external stresses such as thermal gradients, external shocks, mechanical stress/torque, etc.). Specifically, the BAW gyroscope resonator is configured to be simultaneously driven to resonate with a two disparate resonant modes (referred to herein as the “fundamental” mode and the “compound” mode), with the same set of drive electrodes used to drive both resonant modes (i.e., all of the drive electrodes are used to drive the two drive modes). When the sensor experiences external rotation, energy couples from the driven modes of vibration to two corresponding orthogonal sense modes via the Coriolis force. The same set of sense electrodes is used to sense both sense modes (i.e., all of the sense electrodes are used to sense the two sense modes).

Abstract: Various examples are directed to systems and methods for wideband digital predistortion. A digital pre-distortion circuit may be programmed to receive a complex baseband signal and generate a pre-distorted signal. Generating the pre -distorted signal may comprise applying to the complex baseband signal a first correction for an Nth order distortion of a power amplifier at an Ith harmonic frequency zone centered at about an Ith harmonic of a carrier frequency and applying to the complex baseband signal a second correction for the Nth order distortion at a Jth harmonic frequency zone centered at about a Jth harmonic of the carrier frequency different than the Ith harmonic of a carrier frequency.

Abstract: Techniques for indicating a load level of a DC-DC switching converter are provided. IN an example, a method for real-time load current detection for a switching converter using a discontinuous conduction mode (DCM) of operation can include generating a minimum DCM current threshold based on an reference current source and a duty cycle of the switching converter, receiving a representation of inductor charge current from power switch of the switching converter at a comparator, comparing the representation to the DCM current threshold, and controlling the power switch using a discontinuous conduction mode of the switching converter when a peak of the representation exceeds the minimum DCM current threshold.