Patents Assigned to Analog Devices Global
  • Patent number: 10295580
    Abstract: A chip includes a phase-locked loop (PLL) and a test controller. The PLL includes an oscillator and a phase detector. In a normal mode, a first feedback loop includes a phase detector and an oscillator that generates an output based on a frequency input signal. In a test mode, the PLL is re-configured. The output of the loop filter can be decoupled from the input of the oscillator in the test mode and instead be coupled to the input of the phase detector. The oscillator can receive a test tuning signal provided by the test controller. In this test mode configuration, the PLL can measure the frequency of the oscillator.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: May 21, 2019
    Assignee: Analog Devices Global
    Inventors: Vamshi Krishna Chillara, Pablo Cruz Dato, Declan M. Dalton
  • Patent number: 10291214
    Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Bartholomeus Jacobus Thijssen, Eric Antonius Maria Klumperink, Bram Nauta, Philip Eugene Quinlan
  • Patent number: 10290194
    Abstract: System and techniques for an occupancy sensor are described herein. Images from a camera can be received. Here, the camera has a certain a field of view. A proximity indicator from a proximity detector can be received when an object enters the field of view. The images from the camera are processed to provide an occupancy indication. A first technique is used for the occupancy indication in the absence of the proximity indicator and a second technique is used otherwise.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global
    Inventor: Akshayakumar Haribhatt
  • Patent number: 10288582
    Abstract: An integrated ion-sensitive probe is provided. In an example, an ion-sensitive probe can include a semiconductor substrate and a first passive electrode attached to the semiconductor substrate. The first passive electrode can be configured to contact a solution and to provide a first electrical voltage as function of a concentration of an ion within the solution. In certain examples, a passive reference electrode can be co-located on the semiconductor substrate. In some examples, processing electronics can be integrated on the semiconductor substrate.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global
    Inventors: Helen Berney, William Allan Lane, Patrick Martin McGuinness, Thomas G. O'Dwyer
  • Patent number: 10288674
    Abstract: A electrochemical or other sensor interface circuit architecture can deliver substantial DC offset bias to an electrochemical or other sensor separately or independently from delivering a time-varying AC excitation signal, which can then be provided with higher resolution, which, in turn, can allow better resolution of the measured response signal providing the impedance characteristic of sensor condition. For example, a differential time-varying AC excitation signal for the sensor condition characteristic can be delivered separately and independently from a differential stable (e.g., DC or other) bias signal, such as by using separate digital-to-analog converters (DACs), so that providing the more stable signal does not limit the resolution and accuracy of the time-varying signal, such as by using up the dynamic range of a single DAC.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global
    Inventors: GuangYang Qu, Junbiao Ding, Tony Yincai Liu, Shurong Gu, Yimiao Zhao, Hanqing Wang, Leicheng Chen
  • Patent number: 10290532
    Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global
    Inventors: Alan John Blennerhassett, Bernard Patrick Stenson
  • Patent number: 10283582
    Abstract: A microelectronic circuit having at least one component adjacent a carrier that is not a semiconductor or sapphire. The circuit includes a component bearing stack of one or more layers having one or more passive components, which are adjacent or bonded to the carrier. In certain embodiments, the circuit also includes an etch stop layer of a material having a slower etch rate than silicon and a bond layer bonding the carrier and the component bearing one or more layers.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: May 7, 2019
    Assignee: Analog Devices Global
    Inventors: Bernard P. Stenson, Michael Morrissey, Seamus A. Lynch
  • Patent number: 10277433
    Abstract: This disclosure relates to data communication networks. An example data communication apparatus includes physical (PHY) layer circuitry that includes transceiver circuitry, decoder circuitry, and a signal analysis unit. The transceiver circuitry receives encoded data symbols via a network link. The received encoded data symbols are encoded using trellis coded modulation (TCM). The decoder circuitry decodes the received encoded data symbols using maximum-likelihood (ML) decoding to map a received symbol sequence to an allowed symbol sequence using a trace-back depth. A trace-back depth value is a number of symbols in the received symbol sequence used by the ML decoding to identify the allowed symbol sequence from the received symbol sequence. The signal analysis unit determines one or more link statistics of the network link, and sets the trace-back depth value according to the one or more link statistics.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: April 30, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Jacobo Riesco-Prieto, Philip Curran, Michael McCarthy
  • Patent number: 10277220
    Abstract: A device for controlling an electronic switch between a power supply and a load includes a sensing circuit to measure a current to the load and a control circuit to control operation of the electronic switch if the current exceeds a current limit. The control circuit includes a normal current circuit to output a first switch control current to the electronic switch and a boost current circuit to output a second switch control current to the electronic switch, the first switch control current being higher than the second switch control current.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: April 30, 2019
    Assignee: Analog Devices Global
    Inventors: Marcus O'Sullivan, Aldo Togneri
  • Patent number: 10277223
    Abstract: A charge injection compensation circuit compensates for charge injection by a field-effect transistor (FET) switch regardless of a supply voltage. The charge injection compensation circuit includes a main switch that injects charge into an electronic circuit when switched off, and a charge storage device that stores the injected charge until it can be dissipated to a dissipating node. Upon the main switch being controlled to switch off, a pulse generator circuit controls a charge storage switch to switch on to transfer the charge injected from the main switch to the charge storage device and then switch off. A dissipation circuit dissipates the charge from the charge storage device to a dissipating node.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: April 30, 2019
    Assignee: Analog Devices Global
    Inventors: Jofrey G. Santillan, David Aherne
  • Patent number: 10277068
    Abstract: A system comprises a plurality of power supplies, wherein a power supply provides a supply voltage rail to a voltage domain of the system; a plurality of power supply voltage sequencer devices electrically coupled to multiple power supplies of the plurality of power supplies, wherein a voltage sequencer device is configured to activate the multiple power supplies in a specified sequence; and a bus electrically coupled to the plurality of power supply voltage sequencer devices, wherein the bus is configured to communicate state information of the plurality of power supply voltage sequencer devices.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: April 30, 2019
    Assignee: Analog Devices Global
    Inventors: Navdeep Singh Dhanjal, Shengbing Zhou, Michael Edward Bradley, Hossain Opal, Douglas Chisholm, Clint Wolff
  • Patent number: 10267870
    Abstract: Sensor error detection with an additional sensing channel is disclosed herein. First, second, third sensing elements can be disposed at angles relative to one another. In some embodiments, the first, second, and third sensing elements can be magnetic sensing elements, such as anisotropic magnetoresistance (AMR) sensing elements. Sensor data from first, second, and third sensing channels, respectively having the first, second, and third sensing elements, can be obtained. Expected third sensing channel data can be determined and compared to the obtained third sensing channel data to indicate error.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 23, 2019
    Assignee: Analog Devices Global
    Inventors: Gavin Patrick Cosgrave, Dermot G. O'Keeffe
  • Publication number: 20190113476
    Abstract: Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 18, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Michael Coln, Mark Daniel de Leon Alea
  • Patent number: 10256831
    Abstract: A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: April 9, 2019
    Assignee: Analog Devices Global
    Inventors: Sandeep Monangi, Mahesh Madhavan
  • Patent number: 10250194
    Abstract: An envelope tracking scheme can be used, such as to modulate a supply node of a power amplifier circuit to improve efficiency. For example, a magnitude or amplitude envelope of a signal to be modulated can be scaled and used to drive a node, such as a drain, of the power amplifier circuit. An envelope tracking signal can be generated such as having a bandwidth that is compressed as compared to a full-bandwidth envelope signal. A peak-value “look ahead” technique can be used, for example, so that amplitude compression or clipping of the transmit signal is suppressed when the bandwidth-compressed envelope tracking signal is used to modulate a supply node of the power amplifier used to amplify the transmit signal.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: April 2, 2019
    Assignee: Analog Devices Global
    Inventors: Patrick Pratt, Joseph Bradford Brannon, Ronald Dale Turner
  • Publication number: 20190095298
    Abstract: Systems and methods are provided for automated analog fault injection including creating a list of fault models for injection to an analog circuit, adding a first fault placeholder to the analog circuit, running fault simulations by replacing the first fault placeholder with a first fault model from the list of fault models, and determining whether the first fault model is detected.
    Type: Application
    Filed: September 22, 2017
    Publication date: March 28, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Courtney E. FRICANO, Paul P. WRIGHT, David BROWNELL
  • Patent number: 10236221
    Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: March 19, 2019
    Assignee: Analog Devices Global
    Inventor: Alan John Blennerhassett
  • Patent number: 10236905
    Abstract: Techniques to increase a data throughput rate of a filter circuit by preloading selectable memory circuits of the filter circuit with reference data, sampling input data at an input of the filter circuit, combining the sampled input data with the preloaded reference data, and generating a filter output based on the combined sampled input data and preloaded reference data.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: March 19, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Andreas Callanan, Adrian Sherry, Gabriel Banarie, Colin G. Lyden
  • Patent number: 10234288
    Abstract: A BAW gyroscope is configured to operate with two pairs of orthogonal modes instead of a single pair in order to mitigate the impact of changes in gaps (e.g., introduced from external stresses such as thermal gradients, external shocks, mechanical stress/torque, etc.). Specifically, the BAW gyroscope resonator is configured to be simultaneously driven to resonate with a two disparate resonant modes (referred to herein as the “fundamental” mode and the “compound” mode), with the same set of drive electrodes used to drive both resonant modes (i.e., all of the drive electrodes are used to drive the two drive modes). When the sensor experiences external rotation, energy couples from the driven modes of vibration to two corresponding orthogonal sense modes via the Coriolis force. The same set of sense electrodes is used to sense both sense modes (i.e., all of the sense electrodes are used to sense the two sense modes).
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: March 19, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Siddharth Tallur, Sunil Ashok Bhave
  • Patent number: 10224951
    Abstract: A continuous-time sigma delta modulator circuit includes a scaling circuit that scales an input analog signal by a selectable range of different scaling factors in order to change a range of signal levels of the input analog signal to a desired range of signal levels in a scaled analog signal prior to conversion of the scaled analog signal to a digital signal. The scaling factor is selected based on the range of signal levels of the input analog signal in order to provide signal levels of the scaled signal within a desired range. The scaling circuit maintains current flow of the input analog signal at a substantially constant level regardless of the different scaling factors that are used to scale the input analog signal.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: March 5, 2019
    Assignee: Analog Devices Global
    Inventors: Venkata Aruna Srikanth Nittala, Avinash Gutta