Patents Assigned to Analog Devices Global
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Patent number: 10386324Abstract: Subject matter herein can include identifying a biochemical test strip assembly electrically, such as using the same test circuitry as can be used to perform an electrochemical measurement, without requiring use of optical techniques. The identification can include using information about a measured susceptance of an identification feature included as a portion of the test strip assembly. The identification can be used by test circuitry to select test parameters or calibration values, or to select an appropriate test protocol for the type of test strip coupled to the test circuitry. The identification can be used by the test circuitry to validate or reject a test strip assembly, such as to inhibit use of test strips that fail meet one or more specified criteria.Type: GrantFiled: February 22, 2016Date of Patent: August 20, 2019Assignee: Analog Devices GlobalInventors: Liam Riordan, Tudor M Vinereanu, Paul V. Errico, Dermot G. O'Keeffe, Camille L. Huin, Donal Bourke
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Patent number: 10389507Abstract: Techniques for duplex communication and power transfer across an isolator are provided. In an example, a first transceiver coupled to a first side of an isolator can include a transmit modulator configured to receive first data and timing signals, to provide control signals to oscillate an output of the transceiver to transmit power and to order each half-cycle of an oscillation cycle of the output to transmit the first data. A second transceiver coupled to a second side of the isolator can include a receive detection circuit configured to compare a received oscillation cycle with a plurality of thresholds and to provide a plurality of comparator outputs indicative of reception of the positive half-cycle and the negative half-cycle, and a receive decoder configured to identify the order of half-cycles and to provide an output indicative of logic level of the first data.Type: GrantFiled: October 18, 2016Date of Patent: August 20, 2019Assignee: Analog Devices GlobalInventors: Andreas Koch, Stefan Hacker
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Publication number: 20190253286Abstract: A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters.Type: ApplicationFiled: February 14, 2018Publication date: August 15, 2019Applicant: Analog Devices Global Unlimited CompanyInventors: Hajime Shibata, Brian Holford, Trevor Clifford Caldwell, Siddharth Devarajan
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Patent number: 10381948Abstract: A power conversion apparatus or system can be configured to receive a high voltage alternating current (AC) signal at an input and to provide in dependence thereon a low voltage direct current (DC) signal from an output stage. The power conversion apparatus can include a main path comprising a high voltage capacitor in series with the input. In an example, the capacitor comprises a portion of an electric field energy harvesting system.Type: GrantFiled: March 16, 2018Date of Patent: August 13, 2019Assignee: Analog Devices GlobalInventors: Jonathan Ephraim David Hurwitz, Seyed Amir Ali Danesh, William Michael James Holland
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Patent number: 10374409Abstract: Power systems having a DC content, such as photovoltaic (solar) panels present a problem if an arc fault appears because of a small break in a cable. The present disclosure describes an arc fault detection system that captures data in segments, examines the frequency spectrum to remove ‘false arc’ signatures and interference from a power converter of the power system, and then examines the cleaned frequency spectrum for arc events.Type: GrantFiled: January 3, 2017Date of Patent: August 6, 2019Assignee: Analog Devices GlobalInventor: Martin Murnane
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Patent number: 10367411Abstract: A power factor correction device for providing tolerance to a fault condition in an input supply can include a first boost circuit, a second boost circuit, and a controller circuit. The controller circuit can interleave operation of the first boost circuit and operation of the second boost circuit such as to generate an output voltage when the input supply is received at the power factor correction device. The controller circuit can route, in response to the fault condition, a stored supply of the second boost circuit to an input of the first boost circuit. The controller circuit can control the first boost circuit to maintain the output voltage.Type: GrantFiled: December 20, 2017Date of Patent: July 30, 2019Assignee: Analog Devices Global Unlimited CompanyInventor: Francis Martin
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Patent number: 10367516Abstract: This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.Type: GrantFiled: August 11, 2017Date of Patent: July 30, 2019Assignee: Analog Devices GlobalInventors: Frederick Carnegie Thompson, Varun Agrawal, Jose Barreiro Silva, Declan M. Dalton
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Patent number: 10365322Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.Type: GrantFiled: April 18, 2017Date of Patent: July 30, 2019Assignee: ANALOG DEVICES GLOBALInventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
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Patent number: 10365332Abstract: An example method to reduce data handling on lithium ion battery monitors is provided and includes receiving a request from a micro-controller for data associated with one or more cells, receiving signals corresponding to monitored properties from the cells, calculating derivative properties from the monitored properties, dividing a default data into a plurality of portions, and sending the derivative properties and one of the portions to the micro-controller according to at least a first compute logic option or a second compute logic option. The default data can include cell voltages, auxiliary inputs, stack voltage, reference output voltage, analog voltage output, analog voltage input, temperature, and reference buffer voltage. The default data is provided sequentially to the micro-controller in as many consecutive read backs as the number of portions, where each portion corresponds to the default data measured at a distinct time instant.Type: GrantFiled: September 24, 2013Date of Patent: July 30, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventor: Jeremy R. Gorbold
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Patent number: 10359449Abstract: Described are various current measurement techniques that can compensate for drift in shunt resistance. Determining a resistance of a shunt resistor, e.g., coupled to a battery terminal, can include introducing a known signal in sync with the chop phases of a dual system chop scheme, chopping the known signal out in the main signal path, and explicitly extracting the known signal in a parallel, additional signal deprocessing path.Type: GrantFiled: March 29, 2017Date of Patent: July 23, 2019Assignee: Analog Devices GlobalInventor: Andreas Callanan
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Patent number: 10361711Abstract: Residue generation systems for use in continuous-time and hybrid ADCs are disclosed. An example residue generation system includes at least one stub filter, configured to generate a modified analog input based on an analog input, and a quantizer, configured to generate a digital input to a feedforward DAC based on the modified analog input generated by the filter. The feedforward DAC is configured to generate a feedforward path analog output based on the digital input generated by the quantizer, and the system may further be configured to generate a residue signal based on the feedforward path analog output. Providing one or more stub filters that filter the analog input before it is quantized by the quantizer advantageously allows blockers to be attenuated before they are sampled and aliased by the quantizer.Type: GrantFiled: December 13, 2018Date of Patent: July 23, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: Shanthi Pavan Yendluri, Hajime Shibata, Christopher W. Mangelsdorf
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Patent number: 10360926Abstract: Many processes for audio signal processing can benefit from voice activity detection, which aims to detect the presence of speech as opposed to silence or noise. The present disclosure describes, among other things, leveraging energy-based features of voice and insights on first and second formant frequencies of vowels to provide a low-complexity and low-power voice activity detector. A pair of two channels is provided whereby each channel is configured to detect voice activity in respective frequency bands of interest. Simultaneous activity detected in both channels can be a sufficient condition for determining that voice is present. More channels or pairs of channels can be used to detect different types of voices to improve detection and/or to detect voices present in different audio streams.Type: GrantFiled: July 7, 2015Date of Patent: July 23, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: Mikael M. Mortensen, Kim Spetzler Berthelsen, Robert Adams, Andrew Milia
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Patent number: 10352742Abstract: An interface circuit to an electromagnetic flow sensor is described. In an example, it can provide a DC coupled signal path from the electromagnetic flow sensor to an analog-to-digital converter (ADC) circuit. Examples with differential and pseudo-differential signal paths are described. Examples providing DC offset or low frequency noise compensation or cancellation are described. High input impedance examples are described. Coil excitation circuits are described, such as can provide on-chip inductive isolation between signal inputs and signal outputs. A switched mode power supply can be used to actively manage a bias voltage of an H-Bridge, such as to boost the current provided by the H-Bridge to the sensor coil during select time periods, such as during phase shift time periods of the coil, which can help reduce or minimize transient noise during such time periods.Type: GrantFiled: December 18, 2015Date of Patent: July 16, 2019Assignee: Analog Devices GlobalInventor: Ke Li
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Patent number: 10355602Abstract: A flyback power conversion circuit can be operated by selectively establishing and interrupting a current through a first inductance to store energy. A portion of the energy from a second inductance can be transferred to a storage device to provide an output voltage, where the second inductance is magnetically coupled to the first inductance. Information transmitted across an isolation barrier can be monitored, such as information indicative of the output voltage. The monitoring can include detecting whether information from at least two sources is consistent. An operating mode of the flyback power conversion circuit can be selected, such as response to the detecting whether the information from at least two sources is consistent, or whether valid information is being transmitted across the isolation barrier, or in response to one or more other criteria.Type: GrantFiled: January 18, 2017Date of Patent: July 16, 2019Assignee: Analog Devices GlobalInventor: Gavin Galloway
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Patent number: 10348319Abstract: Techniques to use reservoir capacitors in ADC to supply most of the charge to bit-trial capacitors as bit-trials are performed. An accurate reference voltage source, e.g., a reference buffer circuit, only needs to supply the difference, e.g., an inaccuracy, in the charge supplied by the reservoir capacitors. Instead of having to resettle for each bit-trial, the accurate reference voltage source has only to deliver the initial charge to the reservoir capacitors during acquisition and once more when the ADC is ready to sample onto the residue amplifier. These techniques can ease the demands on the reference buffer circuit and requirement of external decoupling capacitors, for example.Type: GrantFiled: May 18, 2018Date of Patent: July 9, 2019Assignee: Analog Devices Global Unlimited CompanyInventors: Sandeep Monangi, Anoop Manissery Kalathil, Vinayak Mukund Kulkarni, Michael C. W. Coln
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Patent number: 10348250Abstract: The noise power of an amplifier or buffer can increase towards the unity gain crossover frequency of the amplifier. The inventor realized that many applications do not require the full bandwidth capability of the amplifier all of the time and hence step could be taken to reduce the bandwidth at the output of the amplifier and hence the noise power can be reduced when appropriate, taking other operating requirements into consideration.Type: GrantFiled: October 23, 2017Date of Patent: July 9, 2019Assignee: Analog Devices Global Unlimited CompanyInventor: Dennis A. Dempsey
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Patent number: 10346273Abstract: Systems and methods are provided for an automated analog fault injection including creating a list of fault models for injection to an analog circuit, adding a first fault placeholder to the analog circuit, running fault simulations by replacing the first fault placeholder with a first fault model from the list of fault models, and determining whether the first fault model is detected.Type: GrantFiled: September 22, 2017Date of Patent: July 9, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: Courtney E. Fricano, Paul P. Wright, David Brownell
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Patent number: 10338224Abstract: A system and method for operating a high dynamic range analog front-end receiver for long range LIDAR with a transimpedance amplifier (TIA) include a clipping circuit to prevent saturation of the TIA. The output of the clipping circuit is connected via a diode or transistor to the input of the TIA and regulated such that the input voltage of the TIA remains close to or is only slightly above the saturation threshold voltage of the TIA. The regulation of the input voltage of the TIA can be improved by connecting a limiting resistor in series with the diode or transistor. A second clipping circuit capable of dissipating higher input currents and thus higher voltages may be connected in parallel with the first clipping circuit. A resistive element may be placed between the first and second clipping circuits to further limit the input current to the TIA.Type: GrantFiled: September 7, 2017Date of Patent: July 2, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: Yalcin Alper Eken, Alp Oguz
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Patent number: 10340902Abstract: Multiplying delay locked loops (MDLLs) with compensation for realignment error are provided. In certain implementations, an MDLL includes a control circuit, a multiplexed oscillator, and an integrate and subtract circuit. The control circuit selectively injects a reference clock signal into the multiplexed oscillator, which operates with an injected period when the reference clock signal is injected and with a natural period when the reference clock signal is not injected. The integrate and subtract circuit receives an oscillator signal from the multiplexed oscillator, and tunes an oscillation frequency of the multiplexed oscillator based on a difference between an integration of the oscillator signal over the injected period and an integration of the oscillator signal over the natural period.Type: GrantFiled: April 30, 2018Date of Patent: July 2, 2019Assignee: Analog Devices Global Unlimited CompanyInventors: Justin L. Fortier, Rachel Katumba
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Patent number: 10340926Abstract: Aspects of this disclosure relate to reducing settling time of a sawtooth ramp signal in a phase-locked loop. Information from a loop filter of the phase-locked loop can be stored and used within the loop filter so as to improve the settling time of the sawtooth ramp signal. In certain embodiments, the settling time of a periodic sawtooth ramp signal can be reduced to less than one microsecond. An output frequency at the end of the sawtooth chirp can be brought back to an initial value without significantly modifying phase error in disclosed embodiments.Type: GrantFiled: October 3, 2016Date of Patent: July 2, 2019Assignee: Analog Devices GlobalInventors: Vamshi Krishna Chillara, Declan M. Dalton, Pablo Cruz Dato