Abstract: Embodiments of the present invention provide a sample and hold amplifier that provides a preamplifier with a multi-stage zeroing architecture. The multi-stage architecture reduces effects of parasitic capacitance exponentially over prior attempts, which yields increased accuracy.

Abstract: An asynchronous sample rate converter prevents the folding back of a signal in the passband of an input sample rate into the passband of the output sample by adaptively controlling the decimation rate. The ASRC includes an adaptive decimation rate controller that selectably controls a decimation filter based on the ratio of the input sampling rate to the output sampling rate. By adaptively controlling the decimation rate in the ASRC, a significant amount of area and power is saved.

Abstract: A simplified bus arrangement using only three signal lines allows TDM data to be conveyed to or from a number of slave-only devices without the use of separate command line(s) and without any of the slave-only devices having to operate as a bus master or even support a master operating mode.

Abstract: Techniques for use in a data communication system having a number of communicatively coupled device include techniques for synchronization and re-synchronization of frame and bit clocks, techniques for assigning device address, techniques for dynamically controlling transmit power based on the number of devices, and techniques for serialized signal processing.

Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with an on-chip reservoir capacitor to provide charges to the DAC in lieu of traditional external reference voltages. The DAC may include the on-chip reservoir capacitor having a first plate and a second plate, an array of DAC capacitors to generate a DAC output, and an array of switches controlled by a DAC input word to couple the DAC capacitors to the reservoir capacitor. The charge redistribution DAC may further comprise a first switch connecting the first plate to an external terminal for a first external reference voltage, and a second switch connecting the second plate to an external terminal for a second external reference voltage. One embodiment may provide an ADC that includes the charge redistribution DAC.

Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.

Abstract: Multiplication engines and multiplication methods are provided. A multiplication engine for a digital processor includes a first multiplier to generate unequally weighted partial products from input operands in a first multiplier mode; a second multiplier to generate equally weighted partial products from input operands in a second multiplier mode; a multiplexer to select the unequally weighted partial products in the first multiplier mode and to select the equally weighted partial products in the second multiplier mode; and a carry save adder array configured to combine the selected partial products in the first multiplier mode and in the second multiplier mode.

Abstract: A system for digitizing the magnitude of a first parameter, which can be inferred by applying to a second parameter and digitizing the magnitude of a resulting third parameter. The circuit which applies the second parameter has an associated bias point with which the magnitude of the second parameter varies. The value of the first parameter can result in an error in the value of the second parameter which results in an error being incurred when the digitized value of the third magnitude is used to infer a digitized value of the magnitude of the first parameter. This is avoided by adjusting the bias point with each successive trial and employing a sequential-trial ADC which performs sequential comparisons between the third magnitude and respective decision thresholds, such that there is no error in the magnitude of the second parameter when the third magnitude is equal to the decision threshold for a particular trial.

Abstract: An interface system between an RDC and a connected resolver dynamically matches an input range of the RDC to the output range of the resolver's output signals. The interface system may include methods and/or apparatuses to determine the amplitude of sinusoidal input signals presented to the RDC by the resolver and to compare the amplitude against high and low threshold values. A gain control signal may be generated, which may be corrected if the detected amplitude either exceeds the high threshold or falls below the low threshold. The gain control signal may be output to a circuit in the RDC or in the resolver that corrects any mismatch that occurs between the RDC input and the resolver output. For example, the gain control signal may control the amplitude of an excitation signal applied to a primary of the resolver or the gain control signal may be applied to an analog to digital converter at the input of the RDC to control its effective input range.

Abstract: Previously available analog domain decimation techniques are limited to simple equally-weighted averaging of photosite outputs. Decimation of a Bayer pattern image by an even-factor, such as by two or six, using simple equally-weighted averaging of photosite outputs in the analog domain results in effective sampling locations that are unevenly spaced apart. Standard interpolation of the unevenly spaced effective sampling locations generates image artifacts that reduce the quality of the reconstructed image in the smaller format because standard interpolation methods assume that the effective sampling locations are evenly spaced. Implementations of systems, methods and apparatus disclosed herein aim to produce substantially evenly spaced effective sampling locations in the analog domain.

Abstract: A vertical mount pre-molded type package for use with a MEMS sensor may be formed with a low moisture permeable molding material that surrounds a portion of the leadframes and forms a cavity in which one or multiple dies may be held. The package includes structures to reduce package vibration, reduce die stress, increase vertical mount stability, and improve solder joint reliability. The vertical mount package includes a first leadframe having first leads and molding material substantially surrounding at least a portion of the first leads. The molding material forms a cavity for holding the MEMS sensor and forms a package mounting plane for mounting the package on a base. The cavity has a die mounting plane that is substantially non-parallel to the package mounting plane. The first leads are configured to provide electrical contacts within the cavity and to provide electrical contacts to the base.

Abstract: Microelectromechanical systems (MEMS) microphone devices and methods for packaging the same include a package substrate having an acoustic pathway therethrough that opens to an interior of the device. A MEMS microphone die having an integrated filter and a movable membrane is positioned within the interior of the device. The package substrate includes a conductive layer facing the interior of the device, and a package filter formed from the conductive layer is provided along the acoustic pathway, resulting in increased packaged MEMS microphone device yield.

Abstract: A gated-clock shift register including a series of clocked flip-flops with preceding outputs connected to subsequent inputs as a horizontal digital shift register. Each flip-flop (or other state holding device) includes a clock buffer between the respective flip-flop's clock, and the global clock. Each clock buffer propagates the clock signal when it determines the associated flip-flop will have a state change during that clock cycle (e.g., via an XOR of the flip-flops input and output signals). In the absence of a state change, that buffer does not propagate the clock signal, essentially only clocking the relevant flip-flops. Further, the clock buffer may be implemented with only NMOS devices (or alternatively, only PMOS devices), which offers power savings over an otherwise required CMOS implementation.

Abstract: Inertial sensors with reduced sensitivity to quadrature errors and micromachining inaccuracies include a gyroscope incorporating two specially-configured single-axis gyroscopes for sensing rotations about two orthogonal axes (the axes of sensitivity) in the device plane, where each single-axis gyroscope includes a resonator having two rotationally-dithered shuttles interconnected by a fork and each shuttle is configured to tilt out-of-plane along a tilt axis perpendicular to the axis of sensitivity and includes corresponding Coriolis sensing electrodes positioned along an axis perpendicular to the tilt axis (i.e., parallel to the axis of sensitivity). The two single-axis gyroscopes may be interconnected, e.g., by one or more in-phase or anti-phase couplings interconnecting the forks and/or the shuttles.

Abstract: A microchip system has a package forming a hermetically sealed interior, and MEMS structure within the interior. The system also has a gas sensor for detecting the concentration of at least one of oxygen or hydrogen within the interior.

Abstract: A microphone system has a primary microphone for producing a primary signal, a secondary microphone for producing a secondary signal, and a selector operatively coupled with both the primary microphone and the secondary microphone. The system also has an output for delivering an output audible signal principally produced by one of the to microphones. The selector selectively permits either 1) at least a portion of the primary signal and/or 2) at least a portion of the secondary signal to be forwarded to the output as a function of the noise in the primary signal.

Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.

Abstract: A MEMS sensing system includes a movable mass having at least one contact surface, a stopper system for stopping the movement of the mass, the stopper system having at least one contact surface that contacts a corresponding contact surface of the mass if a sufficient movement of the mass occurs in a direction, at least one stopper gap formed between the at least one contact surface of the stopper system and the corresponding contact surface of the mass, and a spring system in communication with the at least one stopper gap.

Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.

Abstract: The present invention provides a haptics control system that may include a driver to generate a continuous drive signal and to output the drive signal to a mechanical system on an electrical signal line, wherein the continuous drive signal causes the mechanical system to vibrate to produce a haptic effect. The haptics control system may further include a monitor, coupled to the electrical signal line, to capture a Back Electromotive Force (BEMF) signal generated by the mechanical system in the electrical signal line, to measure a BEMF signals attribute, and to transmit an adjustment signal to the driver based on the BEMF signals attribute. The driver is further configured to adjust the continuous drive signal according to the adjustment signal.