Abstract: There is disclosed herein programmable delay lines and control methods having glitch suppression. In particular, the programmable delay lines may include latches that are triggered based on a trigger event of an input signal (which is often an edge of the input signal). The programmable delay lines may include one or more latches coupled between capacitor and transistor subassemblies and the latches, where the latches cause a delay between the time the trigger event arrives at the capacitor and transistor subassemblies and the latches. The delay can prevent the latches from updating at the same time that the edge of the input signal arrives at the capacitor and transistor subassemblies, which can suppress glitches that can causes errors in operation.

Abstract: A plethysmography (“PPG”) measurement system may include at least one source of PPG radiation and at least one auxiliary sensor for detection of PPG radiation. The radiation source emits a portion of the PPG radiation toward a subject and another portion along an optical path for direct communication between the PPG radiation source and the auxiliary sensor. The auxiliary sensor may develop a profile against which measurements from primary PPG sensors, which receive light returning from the subject, may be compared. From this comparison, new PPG signals may be generated that exhibit lower noise than the PPG signals output by PPG sensors. These noise mitigation techniques may be used advantageously by a PPG system to generate more accurate measurements and also to reduce power consumption by the radiation sources.

Abstract: A method of verifying proper functionalization of a sensor and a negative test result obtained by exposing a sensing element functionalized to detect a target analyte to a test sample is described. The method may include, subsequent to or simultaneously with the exposing the sensing element to the test sample, exposing the sensing element to a test confirmation sample, the test confirmation sample comprising at least one of the target analyte in an amount greater than a detection limit of the sensing element and a recombinant protein of the target analyte in an amount greater than a detection limit of the sensing element and performing a measurement using the sensing element to obtain a subsequent test result.

Abstract: In an optical detection system, received light can be concentrated and presented to a single-pixel photodetector (or an array of relatively few photodetectors). Concentration of received light can be performed by curved concentrator such as a continuously-curved or faceted reflector. A portion or an entirety of the detector might be blinded (e.g., desensitized) by bright interferers such as the sun. An electro-optic shutter such as a liquid crystal (LC) structure can be used to selectively transmit or mask-off portions of the received light. For example, an LC structure can have regions of selectable opacity for a specified polarization of incident light. The LC structure can be controlled to render certain region opaque, such as to suppress interference from unwanted interferers such as the sun, bright lights, or unwanted reflections. An LC structure can also be used to implement a scanned transmit/receive technique.

Abstract: Aspects of the present disclosure are directed to a measurement module for measurement of a multi-electrode resistive sensing element with improved noise performance and accuracy. In some embodiments, stimulation to the sensing element is provided by a current path that originates from a signal source, through a switch block, through a pair of terminals, and ending at a reference node such as ground. An analog-to-digital converter (ADC) is coupled directly to one or both of the terminals to digitize a voltage. The ADC is coupled to terminals on the sensing element to measure a sensed voltage signal before the sensed signal goes through the switch block. As a result, the measured voltage signal may be free of noise that could be picked up from passing through the switch block, and accuracy of the resistance measurements on the sensing element can be improved.

Abstract: A force-sense system can provide signals to, or receive signals from, a device under test (DUT) at a first DUT node. The system can include output buffer circuitry configured to provide a DUT signal to the DUT in response to a force control signal at a buffer control node, and controller circuitry configured to provide the force control signal at the buffer control node. The system can include bypass circuitry configured to selectively bypass the controller circuitry and provide an auxiliary control signal at the buffer control node. The auxiliary control signal can be used for system calibration. In an example, an external calibration circuit can provide the auxiliary control signal in response to information received from the DUT.

Abstract: Angular accelerometers are described, as are systems employing such accelerometers. The angular accelerometers may include a proof mass and rotational acceleration detection beams directed toward the center of the proof mass. The angular accelerometers may include sensing capabilities for angular acceleration about three orthogonal axes. The sensing regions for angular acceleration about one of the three axes may be positioned radially closer to the center of the proof mass than the sensing regions for angular acceleration about the other two axes. The proof mass may be connected to the substrate though one or more anchors.

Abstract: There is disclosed herein examples of systems and methods for compressing a signal. Samples of the signal can be segmented and the samples within each of the segments can be averaged to produce a value that can represent the samples within the segment. The number of samples to average in each segment may be determined based on an error threshold, such that the number of samples being averaged can be maximized to produce less data to be transmitted while maintaining the representation of the samples within the error threshold. In some embodiments, a signal can be separated into a timing reference, a representative periodic function, and a highly compressible error signal. The error signal can be utilized for reproducing a representation of the signal.

Abstract: An inexpensive IR photodetector assembly that can provide high performance in SWIR applications, such as LIDAR. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor. The hybrid photodetector can be composed of one or more absorber layer materials from a first semiconductor family, e.g., p-type InGaAs, laying on one or more wide-band gap semiconductor transducer layer materials from a second semiconductor family, e.g., aluminum gallium nitride (AlGaN) and gallium nitride (GaN), or AlGaN/n-GaN. As such, the absorber layer material and the wide band gap materials can be from two different semiconductor families, making the IR photodetector a hybrid of semiconductor families. After shining IR light onto the absorber layer material, the photo-generated electron-hole pairs can be collected as photocurrent in the photo-voltaic mode.

Abstract: Techniques to use energy band gap engineering (or band offset engineering) to produce a photodetector semiconductor assembly that can be tuned to absorb light in one or more wavelengths. For example, the assembly can be tuned to receive infrared (IR) and/or ultraviolet (UV) light. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor.

Abstract: An apparatus is described and includes a current integrating phase interpolator core having a programmable bias current; an inverter circuit coupled to an output of the current integrating phase interpolator core for receiving a signal comprising a periodic sawtooth waveform therefrom; a digital-to-analog (D/A) converter for setting an input common mode voltage of the inverter circuit; a duty cycle measurement (DCM) circuit for measuring a duty cycle distortion (DCD) of a clock signal output from the inverter circuit; and a circuit for computing a difference between a first state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a high voltage and a second state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a low voltage.

Abstract: In a test system that provides a high fidelity output signal, a transition driving circuit can selectively enable multiple, parallel current paths based on a desired voltage transition. The transition driving circuit can include a first switch configured to switch a first current path between an output node and a first current source/sink, and a second switch configured to switch a second current path between the output node and the first current source/sink. The transition driving circuit can include a control circuit that is configured to receive information about a desired voltage transition and, depending on a magnitude of the desired voltage transition, to selectively turn on one or both of the first and second switches to enable one or both of the first and second current paths to provide respective portions of the output signal from the first current source/sink to the output node of the test system.

Abstract: In one aspect, an electric coil structure is disclosed. The electric coil structure includes a magnetic core and a substrate. The substrate comprises a conductive material that is embedded in an insulating material. The substrate has a first portion and a second portion and the first portion of the substrate is wrapped around the core. The substrate can have a first portion having a plurality of contacts and a second portion having a corresponding plurality of edge contacts. The coil structure includes an alignment structure. The alignment structure can facilitate attachment of the first portion to the second portion to define a coil about the magnetic core. The alignment structure can comprise a redistribution substrate. The redistribution substrate can be disposed between the first portion and the second portion with the conductive material of the first portion electrically connected to the conductive material of the second portion through the redistribution substrate to define at least one winding.

Abstract: An integrated device package is disclosed. The integrated device package can include a substrate that has an upper side and a lower side opposite the upper side. The integrated device package can include an integrated device die that is mounted to the lower side of the substrate. The integrated device die has a first side facing the lower side of the substrate and a second side opposite the first side. The package can include a molding material in which the integrated device die is at least partially embedded. The package can include a thermally conductive element coupled to the second side of the integrated device die. At least a portion of the thermally conductive element can be exposed through the molding material. The thermally conductive element can be a heat sink. The package can include an interconnect that is configured to provide an external connection. The interconnect extends at least partially through the molding material from the lower side of the substrate.

Abstract: Systems and methods for interfacing an application circuit to an industrial network include first and second interfaces, one or more controllers, and one or more memory devices. The one or more memory devices store instructions, which when executed, cause the controllers perform operations to convert messages between a specified message format according to a protocol of the industrial network and a protocol agnostic format.

Abstract: Disclosed herein are example systems and approaches for decomposition of composite signals. Decomposition of the composite signals may include derivation of two or more signals from the composite signals. An upper envelope and lower envelope may be determined for a composite signal in accordance with a smoothness parameter. A smooth estimate may be produced based on the upper envelope and the lower envelope, where the smooth estimate provides an estimate for a smooth component of the composite signal, which may be more accurate than legacy approaches.

Abstract: An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.

Abstract: System and apparatus for measuring biopotential and implementation thereof. A device for mitigating electromagnetic interference (EMI) thereby increasing signal-to-noise ratio is disclosed. Specifically, the present disclosure relates to an elegant, novel circuit for measuring a plurality of biopotentials in useful in a variety of medical applications. This allows for robust, portable, low-power, higher S/N devices which have historically required a much bigger footprint.

Abstract: Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).

Abstract: A current detection module capable of differentiating and quantifying contribution to a current signal generated by a sensor in response to stimulation by a certain target source from contributions from sources other than the target source (ambient sources) is disclosed. As long as the contribution from the target source comprises a pulsed signal, the module may synchronize itself to the pulse(s) so that there is a predetermined phase relationship between the pulse(s) and functions carried out by various stages of the module. The module may be re-used to also detect and quantify contributions from ambient sources by presenting these contributions to the module as pulses that trigger synchronization of the module. To that end, a detection system disclosed herein is based on the use of such current detection module and allows mode switching where, depending on the selected mode of operation, the module is configured to perform different measurements.