Abstract: An apparatus and method for inter-channel data exchange in multi-channel data acquisition systems is disclosed. A multi-channel data acquisition system may include a data exchange layer coupling two or more channels of the data acquisition system. Data may be transmitted via the data exchange layer between the channels, enabling data from one channel to be processed and output by another channel. The data exchange layer may include serial or parallel communication means.

Abstract: A system, computer program product and method of obtaining a performance parameter associated with a sensor, such as an accelerometer, is provided. The method includes applying an acceleration to the accelerometer and a first frequency to obtain a sensitivity of the accelerometer at the first frequency. A first self-test is performed on the accelerometer. The first self-test includes stimulating the accelerometer with a first self-test stimulation signal encoded with the first frequency, such that the accelerometer outputs a first signal. A self-test equivalent acceleration is then determined based, at least in part, on the first signal and the accelerometer sensitivity at the first frequency. A second self-test is performed on the accelerometer. The second self-test includes stimulating the accelerometer with a second self-test stimulation signal encoded with the second frequency, such that the accelerometer outputs a second signal.

Abstract: A method of detecting activity in a MEMS accelerometer captures an acceleration bias, measures acceleration at a predetermined time, calculates a change in acceleration using the measured acceleration and the acceleration bias, and compares the change in acceleration to a threshold to detect activity. A method of detecting inactivity uses a similar technique along with a timer. The method of detecting inactivity in a MEMS accelerometer captures an acceleration bias, measures acceleration at a predetermined time, calculates a change in acceleration using the measured acceleration and the acceleration bias, and compares the change in acceleration to a threshold to detect inactivity. The method further determines if the change in acceleration is less than the threshold and, if so, determines if a predetermined period of time has elapsed to detect inactivity.

Abstract: A packaged microchip has a lead frame with a die directly contacting at least a single, contiguous portion of the lead frame. The portion of the lead frame has a top surface forming a concavity and contacting the die. The packaged microchip also has mold material substantially encapsulating part of the top surface of the portion of the lead frame.

Abstract: An integrated circuit includes a substrate, a storage device formed in the substrate to hold bias settings, and operational blocks formed in the substrate, each operational block including an operational circuit and a charge pump to provide well bias voltages to the operational circuit in response to one or more of the bias settings. A method for testing an integrated circuit having two or more operational blocks includes: (a) determining a maximum operating speed of each of the blocks at a minimum supply voltage; (b) selecting a block that has a slow operating speed; (c) selecting a well bias to speed up the selected block; (d) selecting a supply voltage to meet a target operating frequency at the selected well bias and measuring power; (e) repeating acts (b)-(d) while the measured power is less than a baseline power; and (f) saving the selected well bias and supply voltage settings for operation of the integrated circuit.

Abstract: A successive approximation analog to digital converter comprising a plurality of capacitors which during a successive approximation conversion are selectively connectable to a first reference or a second reference under the command of a controller. During a conversion step where the connections of a given capacitor may be varied, the switches to the given capacitor are both placed in a high impedance state during a decision period of a comparator.

Abstract: A system and apparatus for compensating cable losses in a video signal transmission system includes feedback circuits to determine the spectral attenuation of a received signal and to control an equalizer circuit to amplify selected frequencies of the received signal, and to determine the various times of arrival of two or more video signals and selectively adjust one or more delay lines to reduce the differences in their arrival times.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses; and a multiplexer configured to supply first and second current memory addresses to selected ones of the first and second memory pipelines in response to a control signal.

Abstract: An auto-nulled bandgap reference system employing a substrate bandgap reference circuit with primary and auxiliary amplifiers and a switching circuit which in a first mode develops a voltage to null the offset and noise errors of the auxiliary amplifier and then in the second mode uses the nulled auxiliary amplifier to develop a voltage to null the offset and noise errors of the primary amplifier; and a strobe circuit including an output storage device and a strobe control circuit for periodically powering up a bandgap reference circuit to charge the output storage device and powering down the bandgap reference circuit to conserve power.

Abstract: An input biasing system for accommodating a floating power supply to the range of an input signal includes input terminals for receiving a input signal and a biasing circuit including a first impedance connected between one of the input terminals and a floating power supply and a second impedance connected between another of the input terminals and the ground of the floating power supply for bracketing the floating power supply about the input signal.

Abstract: A balanced, differential, cross-coupled amplifier including an input stage for receiving a differential input and including an input transconductance differential pair and a feedback transconductance differential pair; and an output stage responsive to the input stage for providing a differential output; the differential input being connected to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair, the differential output being fed back to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair for balancing the currents in the transconductance differential pairs over the input range.

Abstract: A sensor device formed on a semiconductor substrate. The device comprises a thermal radiation sensor including a sensing cell and a referencing cell which are co-operable for providing a first output signal indicative of the temperature fluctuation resulting from incident radiation. A gradient sensor including a pair of cells spatially located on the semiconductor substrate is provided which are co-operable to provide a second output signal indicative of the temperature gradient across the semiconductor substrate for facilitating calibrating the first output signal. At least one of the cells of the gradient sensor is not common to the cells of the thermal radiation sensor.

Abstract: A system and method of widening the synchronization range for a discrete multitone multicarrier single pilot tone system includes detecting a first phase error in a received pilot tone; detecting a second phase error in a received second two bit constellation data channel; converting the second phase error to a first quadrant angle between 0-90° and combining the first phase error and the converted phase error to obtain the actual phase error up to and beyond 360°.

Abstract: An output driver in an integrated circuit includes a driver circuit operable by a power supply voltage and coupled to an output pad, and a driver power conditioner configured to generate a fractional pad voltage in response to a voltage on the output pad and to provide the fractional pad voltage to at least one transistor of the driver circuit as a protected supply voltage in response to an absence of the power supply voltage.

Abstract: A differential current output driver and a method for overvoltage protection of a differential current output driver circuit are provided. The output driver includes a differential current output driver circuit operable by a power supply voltage and including first and second driver transistors in a differential current configuration and first and second output pads, and an overvoltage protection circuit configured to generate a protected voltage in response to a voltage on at least one of the first and second output pads and an absence of the power supply voltage, and to apply the protected voltage to at least one transistor of the differential current output driver circuit.

Abstract: In one aspect, an automatic gain control (AGC) for applying a variable gain to a broadband signal is provided. The AGC comprises a variable gain amplifier adapted to receive the broadband signal as an input, the variable gain amplifier configured to apply a variable gain to the broadband signal based on a value of a gain signal to provide an amplified broadband signal, and a controller to provide the gain signal to the variable gain amplifier, the controller adapted to determine the value of the gain signal based on at least one characteristic of the amplified broadband signal. In a further aspect, the one or more characteristic is a power characteristic of the broadband signal that facilitates control of the broadband signal within a desired power range.

Abstract: A bandgap voltage reference circuit is provided that includes a PTAT source whose polarity reverses at a determinable temperature. The PTAT source is combined with a CTAT source in a manner to remove the effects of the slope of the CTAT source such that a voltage reference may be generated. A method of operating such a circuit is also described.

Abstract: Clock generator embodiments are provided to generate half-rate I and Q clock signals. The generators are configured to insure fan-out limitations, to insure correct phasing at startup, to reduce the number of signal inverters in a critical path, and to reduce the total number of inverter structures to thereby substantially extend generator operational frequency. An exemplary generator embodiment requires only two tri-state inverters and four inverters. These clock generators are particularly suited for variety of electronic systems such as high speed data serializers.

Abstract: A microprocessor to provide software development debugging capabilities while providing security for confidential and/or sensitive information. The processor may operate in one of an open, a secure entry, and a secure mode. In open mode, security measures may prevent access to certain registry bits and access to a private memory area. Secure entry mode may be entered upon receipt of a request to run secure code and/or access the private memory area. The secure code may be authenticated in secure entry mode. Authentication may be performed using digital signatures. Secure mode may be entered if authentication is successful. Authenticate code may be executed in the secure mode environment. The private memory area may be accessible in secure mode.

Abstract: The invention comprises a hardware constructed address generator for a circular buffer which can be of any size and be in any position in memory. The address generator calculates both an absolute value and a wrapped value and selects one in accordance with whether the wrapped value falls within the boundaries of the buffer.