Abstract: The application provides a switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the input node to the output node in response to a switching signal. A sensor is provided for sensing the voltage between the input and output nodes and providing a sense signal in response thereto. A driver coupled to the sensor adjusts the switching signal in response to the sense signal.

Abstract: Transmitter signals are modulated with one or more codes which may represent a pulse even though the code(s) are not shaped as pulses. The code(s) may be generated by defining a pulse by its Fourier components, and then adding random phases to the Fourier components. A time-domain signal may then be created, which may serve as the code to be modulated on a carrier wave. Upon reflection of the transmitter signal, the received signal may be processed by a receiver to recover the pulse. The time-of-flight of the transmitter signal can then be determined, enabling distance measurements to be made.

Abstract: Versatile control pin electronics are disclosed. The control pin electronics are coupled to a control pin and allow for the passing of both analog and digital control signals. The control pin electronics work with digital logic having logic levels that are compatible with analog signals having predefined voltage and current limits. The versatile control pin electronics include both a voltage regulator that sets a regulated voltage at the control pin and a current limiter. The versatile control pin electronics can be coupled to a comparator to provide both hysteresis and latching functionality from a single pin.

Abstract: An apparatus and method is provided for optimizing LED driver efficiency. The present invention offers low cost solutions for powering LEDs while minimizing overall power dissipation in devices powered by a depletable power source. Low system cost is attained using a charge pump to increase LED drive voltage level and implementing combinations of drive techniques to overcome the inefficiency of the charge pump. A switch bypasses the charge pump when depletable power source output voltage is sufficient to directly drive an LED load. At certain output voltage levels, the switch can be opened causing the charge pump to boost drive voltage. The output voltage may also be PWM modulated to drive the LED load and, at some voltages, the depletable power source may drive the LED load directly. Efficiency levels of 90-97% are attainable.

Abstract: A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibers to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibers are a tight fit therein for securing the optical fibers in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses; and a multiplexer configured to supply first and second current memory addresses to selected ones of the first and second memory pipelines in response to a control signal.

Abstract: A method of forming a MEMS device provides a wafer having a base with a conductive portion. The wafer also has an intermediate conductive layer. After it provides the wafer, the method adds a diaphragm layer to the wafer. The method removes at least a portion of the intermediate conductive layer to form a cavity between the diaphragm layer and the base. At least a portion of the diaphragm layer is movable relative to the base. After it forms the cavity, the method seals the cavity.

Abstract: A digital controller for use with a full-bridge power converter which includes an isolation transformer that conducts first and second currents of opposite polarity during respective power-transfer phases. A current transformer senses the currents, and a non-zero current Iin is generated when either of the first or second currents is >0. The controller includes a sigma-delta modulator arranged to integrate a current applied to its input and to modulate the integrated signal to a bitstream. Iin is integrated by a first integrator and the bitstream is decimated to a digital word by a first decimation filter during the first power-transfer phase, and is integrated by a second integrator and decimated with a second decimation filter during the second phase. The difference between the digital values is used to adjust the pulses that operate the full-bridge switches as necessary to reduce any imbalance between the first and second currents.

Abstract: Integrated circuit package assemblies and packaging methods are provided. An integrated circuit package assembly includes a first circuit package including a first substrate having a top surface and a bottom surface, a first circuit die containing a programmable processor mounted to and electrically connected to the bottom surface of the first substrate, a bottom connector on the bottom surface of the first substrate and top circuit connections on the top surface of the first substrate, and a second circuit package mounted on the top surface of the first substrate and electrically connected to the top circuit connections of the first circuit package.

Abstract: Amplifier embodiments are provided that are well suited for systems which require high signal gains and high transient currents that can drive various loads (e.g., capacitive loads). At least one amplifier embodiment is realized with a cascoded complementary differential input stage, a complementary differential output stage, and a bias controller. The output stage includes lower and upper differential pairs of transistors that respectively have lower and upper coupled back gates and the bias controller is configured to provide bias voltages for the lower and upper coupled back gates.

Abstract: An improved programmable compute system and method for executing an H.264 binary decode symbol using only a single instruction and two compute units is achieved by providing not just one rLPS value but all four next possible rLPS values of the current context next state so that there is no delay initially while calculating the correct rLPS because all four are present and any one can be chosen; further all the parameters e.g. value, range, context, and rLPS can be served by only two available 32 bit registers by generating, locally, the MSP ninth bit, of range based on the fact that the range is normalized to a known value in the MSB.

Abstract: An apparatus, method, and article to dynamically adjust a data signal using a regenerated clock signal in an emulator to increase communication speed between the emulator and the evaluation board is disclosed. In one embodiment, this is achieved by applying a reference clock signal at a predetermined frequency to a digital circuit. A delayed return data signal is then sampled from the digital circuit. The sampled delayed return data signal is then compared to an expected return data signal. The delayed return data signal is then adjusted as a function of the comparison to increase the communication speed between the emulator and the evaluation board.

Abstract: A method of manufacturing semiconductor devices by applying a pattern of adhesive pads on an active surface of a semiconductor wafer, the semiconductor wafer product so made and a stacked die package in which an adhesive wall leaves an air gap atop a bottom die. The wall may be in the form of a ring of adhesive about a central hollow area. The wafer carrying the pattern of adhesive pads on its active surface is singulated into individual dies, each die having an adhesive pad thereon. The bottom die is attached to a base with an adhesive which cures without curing the adhesive pad.

Abstract: A DC to DC converter comprising: an inductor; a plurality of switches for controlling current flow in the inductor such that the inductor is connected to a supply in a first phase of operation such that the inductor receives energy from the supply, and such that the inductor is connected to an output in a second phase of operation in order to deliver energy to the output; and a controller arranged to monitor the current flow in the inductor at the end of the second phase of operation and to modify the relative duration of the second phase compared to the first phase as a function of the current flow.

Abstract: A low-power, low-voltage feedback class AB operational amplifier is disclosed. The minimum supply voltage is one gate-source voltage and two saturation voltages. Currents on the output p-type and n-type transistors are monitored as part of the feedback loop control. Accurate monitoring is achieved by connecting current monitors directly to the corresponding voltage rail. Additional output stages may be selectively connected to the primary output stage to dynamically adjust to changes source conditions. Thus by connecting the appropriate number and type of additional output stages, continuous time adaptive power supply compensation is achieved. Both single ended and differential topologies are described.

Abstract: A packaged microchip has a base, at least one spacer coupled to the base, and first and second microchips mounted to the at least one spacer. The at least one spacer is configured to substantially prevent leakage current between the first and second microchips.

Abstract: A method of producing a MEMS device forms structure on a non-standard device wafer. To that end, the method provides the noted non-standard device wafer, which has a wafer outer diameter and a non-standard thickness. As known by those in the art, a standard device wafer has a standard thickness when its outer diameter equals the wafer outer diameter. In illustrative embodiments, however, the non-standard thickness is smaller than the standard thickness. The method then forms structure on the non-standard device wafer.

Abstract: A mobile TV system architecture for a mobile terminal that reduces the processing required by the main processor during reception of digital broadcasts such as DVB-H. The mobile terminal architecture includes a main processor system and a mobile TV receiver device. The mobile TV receiver device includes units for SI/PSI processing, IP processing and decryption engine. The SI/PSI (service information/program specific information) processing unit receives non-protected transport stream (TS) packets and extracts SI/PSI tables which can be stored in memory local to the receiver device. The IP processing unit receives decrypted error-corrected protected packets containing multimedia content. The receiver device may include an HTTP server for communicating with a browser application running on the main processor system. The browser application presents multimedia content, received via HTTP, corresponding to a URL entered or selected by a user.

Abstract: A method of forming a variable pattern across a wafer using a reticle forms a plurality of first patterns on the wafer. The first pattern is repeated across the wafer and each first pattern has a first readable element. The method also forms a plurality of second patterns on the wafer. The second patterns is repeated across the wafer and each second pattern has a second readable element. The second patterns are positioned relative to the first patterns by aligning a first second pattern relative to one portion of a corresponding first pattern and then incrementally misaligning each successive second pattern in a row or a column relative to its corresponding first pattern. Thus, each corresponding first readable element and second readable element form a corresponding variable pattern.

Abstract: A method and system for providing sensorless brushless DC motor control using predictive switch timing requires connecting a stator coil in a bridge configuration, applying a positive excitation voltage across the coil for a predetermined time period, deactivating the excitation voltage, and monitoring the voltage (VEMF) generated due to electro-motive force (EMF) across the coil. The polarity of VEMF changes when the rotor has moved a known distance—typically 90°. After detecting a polarity change, a negative excitation voltage is applied across the coil, deactivated, and VEMF monitored to detect a polarity change. This sequence is repeated to maintain the rotation of the rotor. The motor is preferably set into motion using a start-up routine, which also determines the predetermined time period used during steady-state operation.