Abstract: A method and apparatus are provided for generating a directional output signal from sound received by at least two microphones arranged as microphone array. The method includes transforming the sound received by each of said microphones and represented by analog-to-digital converted time-domain signals provided by each of said microphones into corresponding complex-valued frequency-domain microphone signals each having a frequency component value for each of a plurality of frequency components, and calculating, for each of the plurality of frequency components of the complex-valued frequency-domain microphone signal of at least one of said microphones, a respective tolerance compensated frequency component value by multiplying the frequency component value of the complex-valued frequency-domain microphone signal of said microphone with a frequency-specific real-valued correction factor.

Abstract: A method and apparatus are provided for generating a directional output signal from sound received by at least two microphones arranged as microphone array. The method includes transforming the sound received by each of said microphones and represented by analog-to-digital converted time-domain signals provided by each of said microphones into corresponding complex-valued frequency-domain microphone signals each having a frequency component value for each of a plurality of frequency components, calculating, for each of the plurality of frequency components, real-valued Wind Reduction Factors as minima of the reciprocal and non-reciprocal frequency components of a plurality of real-valued Deviation Spectra if said minimum is below a preselected deviation threshold and set to one if said minimum is above or equal to said deviation threshold, and for each of the plurality of frequency components, forming a frequency-domain wind-reduced output signal.

Abstract: A force-sense system can provide signals to, or receive signals from, a device under test (DUT) at a first DUT node. The system can include output buffer circuitry configured to provide a DUT signal to the DUT in response to a force control signal at a buffer control node, and controller circuitry configured to provide the force control signal at the buffer control node. The system can include bypass circuitry configured to selectively bypass the controller circuitry and provide an auxiliary control signal at the buffer control node. The auxiliary control signal can be used for system calibration. In an example, an external calibration circuit can provide the auxiliary control signal in response to information received from the DUT.

Abstract: The present disclosure relates to an electrostatic shield for providing electrostatic shielding for a current sensing coil. Current sensing coils are configured to enable the measurement of a current carried by an electrical conductor passing through a core of the current sensing coil. The electrostatic shield of the present disclosure is configured to provide electrostatic shielding to a core of the current sensing coil in order to reduce or eliminate electrostatic coupling between the electrical conductor and the current sensing coil, thereby improving the accuracy of current measurement that may be achieved by the current sensing coil.

Abstract: Angular accelerometers are described, as are systems employing such accelerometers. The angular accelerometers may include a proof mass and rotational acceleration detection beams directed toward the center of the proof mass. The angular accelerometers may include sensing capabilities for angular acceleration about three orthogonal axes. The sensing regions for angular acceleration about one of the three axes may be positioned radially closer to the center of the proof mass than the sensing regions for angular acceleration about the other two axes. The proof mass may be connected to the substrate though one or more anchors.

Abstract: There is disclosed herein examples of systems and methods for compressing a signal. Samples of the signal can be segmented and the samples within each of the segments can be averaged to produce a value that can represent the samples within the segment. The number of samples to average in each segment may be determined based on an error threshold, such that the number of samples being averaged can be maximized to produce less data to be transmitted while maintaining the representation of the samples within the error threshold. In some embodiments, a signal can be separated into a timing reference, a representative periodic function, and a highly compressible error signal. The error signal can be utilized for reproducing a representation of the signal.

Abstract: Disclosed herein are transconductance circuits, as well as related methods and devices. In some embodiments, a transconductance circuit may include an amplifier having a first input coupled to a voltage input of the transconductance circuit, and a switch coupled between an output of the amplifier and a second input of the amplifier.

Abstract: A magnetic sensor is disclosed. The magnetic sensor can include a sensing element and a magnetic shield. The sensing element and the magnetic shield can be vertically stacked with one another. The magnetic shield can be a magnetic shield plate that includes ferromagnetic portions spaced laterally by a non-ferromagnetic material. The sensing element can have a first side and a second side opposite the first side. The magnetic shield that can be vertically stacked over the first side of the sensing element. The magnetic shield can be spaced apart from the sensing element by an isolation layer. A passivation layer can cover at least a portion of the sensing element or the magnetic shield. The sensing element can be configured to sense a magnetic field property of a magnetic field source that is positioned on the second side of the sensing element.

Abstract: A Power over Data Lines (PoDL) system includes a Powered Device (PD) logic circuit for conveying classification information to Power Sourcing Equipment (PSE), during a classification phase, via a wire pair. The logic circuit controls a shunting switch for selectively shunting the wires together for communication with the PSE during the classification phase. A holdup capacitor supplies power to the logic circuit during the classification phase. The logic circuit controls a full-bridge rectifier to ensure the capacitor is charged with a proper polarity voltage and to ensure a proper polarity voltage is supplied to a PD load. The PD has a controller for controlling the rectifier to cause a current path between terminals of the capacitor, via the shunting switch, when the shunting switch is to be turned on.

Abstract: An inexpensive IR photodetector assembly that can provide high performance in SWIR applications, such as LIDAR. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor. The hybrid photodetector can be composed of one or more absorber layer materials from a first semiconductor family, e.g., p-type InGaAs, laying on one or more wide-band gap semiconductor transducer layer materials from a second semiconductor family, e.g., aluminum gallium nitride (AlGaN) and gallium nitride (GaN), or AlGaN/n-GaN. As such, the absorber layer material and the wide band gap materials can be from two different semiconductor families, making the IR photodetector a hybrid of semiconductor families. After shining IR light onto the absorber layer material, the photo-generated electron-hole pairs can be collected as photocurrent in the photo-voltaic mode.

Abstract: A system and method are described for monitoring batteries at various phases of their lifecycle. The batteries may be monitored in non-operational and operational states. The monitoring may be done wirelessly. The information gathered from monitoring the batteries may be used to make decisions about the use of a battery.

Abstract: Bias arrangements for amplifiers are disclosed. An example arrangement includes a bias circuit, configured to produce a bias signal for the amplifier, and a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal based on an RF signal indicative of an RF input signal to be amplified by the amplifier. The linearization circuit includes a bias signal input for receiving the bias signal, an RF signal input for receiving the RF signal, and an output for providing a modified bias signal. The linearization circuit further includes at least a first linearization transistor, having a first terminal, a second terminal, and a third terminal, where each of the bias signal input and the RF signal input of the linearization circuit is coupled to the first terminal of the first linearization transistor, and the output of the linearization circuit is coupled to the third terminal of the first linearization transistor.

Abstract: Systems, methods, and apparatuses for improving reliability and/or reducing the likelihood of breakdown of an amplifier or a component thereof. A system can include a sensing circuit electrically coupled to a transistor of the amplifier and configured to sense an AC voltage associated with the transistor. A protection circuit can be electrically coupled to the sensing circuit and the amplifier and can be configured to supply a DC voltage to the transistor of the amplifier based on the AC voltage sensed by the sensing circuit.

Abstract: Techniques to use energy band gap engineering (or band offset engineering) to produce a photodetector semiconductor assembly that can be tuned to absorb light in one or more wavelengths. For example, the assembly can be tuned to receive infrared (IR) and/or ultraviolet (UV) light. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor.

Abstract: An apparatus is described and includes a current integrating phase interpolator core having a programmable bias current; an inverter circuit coupled to an output of the current integrating phase interpolator core for receiving a signal comprising a periodic sawtooth waveform therefrom; a digital-to-analog (D/A) converter for setting an input common mode voltage of the inverter circuit; a duty cycle measurement (DCM) circuit for measuring a duty cycle distortion (DCD) of a clock signal output from the inverter circuit; and a circuit for computing a difference between a first state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a high voltage and a second state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a low voltage.

Abstract: In a test system that provides a high fidelity output signal, a transition driving circuit can selectively enable multiple, parallel current paths based on a desired voltage transition. The transition driving circuit can include a first switch configured to switch a first current path between an output node and a first current source/sink, and a second switch configured to switch a second current path between the output node and the first current source/sink. The transition driving circuit can include a control circuit that is configured to receive information about a desired voltage transition and, depending on a magnitude of the desired voltage transition, to selectively turn on one or both of the first and second switches to enable one or both of the first and second current paths to provide respective portions of the output signal from the first current source/sink to the output node of the test system.

Abstract: Aspects of the present disclosure relate to decoding the output of a multi-turn magnetic sensor using a successive approximation technique to detect a number of turns of a magnetic target. A decoder circuit can decode a turn count of the multi-turn magnetic sensor by obtaining measurements at nodes that are determined from values of previous measurements.

Abstract: A peak-buck peak-boost current mode control structure and scheme for a synchronous four-switch and non-synchronous two-switch buck-boost regulators sense input and output voltages to smoothly transition between buck mode, buck-boost mode, and boost mode for high power efficiency and low output ripples. With the inductor current sensing, the control scheme achieves the best performance in continuous conduction and discontinuous condition mode operations.

Abstract: One factor in limiting the speed of conventional implementations of mixture models is that the algorithm involves many decisions where different operations are fetched and performed depending on the outcome of the decisions. These decisions cause flushing of the pipeline, and thus prevent the realization of a highly parallel pipeline in a processor. Without parallelism, the throughput of the pipeline in the processor, i.e., the ability to process many samples of the digital input at a time, is limited. To alleviate this issue, implementation of the mixture model is reformulated, among other things, by embedding decisions into the process flow as multiplicative factors. The resulting implementation alleviates the need to use if-else statements for the decisions and reduces the number of times the pipeline has to be flushed. The implementation enables a pipeline with a higher degree of parallelism and thereby increases throughput and speed of the implementation.

Abstract: Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.