Patents Assigned to Analog Devices
  • Patent number: 11296005
    Abstract: An integrated device package is disclosed. The integrated device package can include a substrate that has an upper side and a lower side opposite the upper side. The integrated device package can include an integrated device die that is mounted to the lower side of the substrate. The integrated device die has a first side facing the lower side of the substrate and a second side opposite the first side. The package can include a molding material in which the integrated device die is at least partially embedded. The package can include a thermally conductive element coupled to the second side of the integrated device die. At least a portion of the thermally conductive element can be exposed through the molding material. The thermally conductive element can be a heat sink. The package can include an interconnect that is configured to provide an external connection. The interconnect extends at least partially through the molding material from the lower side of the substrate.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: April 5, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Brian Hall, David Frank Bolognia
  • Patent number: 11294003
    Abstract: Apparatus and methods provide sensing of quadrants, angles, or distance using magnetoresistive elements. A quadrant or angle sensor can have magnetoresistive elements split into multiple angles to generate an output with reduced harmonics. A distance sensor can have magnetoresistive elements split and spaced apart to generate an output with reduced harmonics. A biasing conductor can alternatingly carry different amounts of current (different in at least one of magnitude or direction) for DC offset compensation or cancellation.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 5, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jochen Schmitt, Jan Kubik
  • Patent number: 11295891
    Abstract: In one aspect, an electric coil structure is disclosed. The electric coil structure includes a magnetic core and a substrate. The substrate comprises a conductive material that is embedded in an insulating material. The substrate has a first portion and a second portion and the first portion of the substrate is wrapped around the core. The substrate can have a first portion having a plurality of contacts and a second portion having a corresponding plurality of edge contacts. The coil structure includes an alignment structure. The alignment structure can facilitate attachment of the first portion to the second portion to define a coil about the magnetic core. The alignment structure can comprise a redistribution substrate. The redistribution substrate can be disposed between the first portion and the second portion with the conductive material of the first portion electrically connected to the conductive material of the second portion through the redistribution substrate to define at least one winding.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: April 5, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Vikram Venkatadri, David Frank Bolognia, Kelvin Po Leung Pun, Chee Wah Cheung
  • Patent number: 11295828
    Abstract: Systems and methods for multi-chip programming for phased arrays are provided herein. In certain embodiments, a semiconductor device includes one or more inputs configured to receive frame data, an internal memory configured to store the received frame data, and a shift register configured to receive the frame data and comprising a plurality of shift register bit positions. The device further includes a latch configured to store a command type, a first multiplexor configured to select at least one first bit from the shift register based on the command type and provide the at least one first bit to the latch, an output configured to output the frame data, and a second multiplexor configured to select at least one second bit from the shift register based on the command type and provide the at least one second bit to the output.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: April 5, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Stuart John McCracken, Mohamed El-Nozahi, Mohamed Abdelsalam
  • Patent number: 11290291
    Abstract: In a Power over Data Lines (PoDL) system that conducts differential data and DC power over the same wire pair, various DC coupling techniques are described that improve DC voltage coupling while attenuating AC common mode noise and avoiding mode conversion. A first CMC and AC coupling capacitors are connected in series between a PHY and a twisted wire pair. A DC power supply is DC coupled to the wires via a series connection of a DMC and either matched inductors or a second CMC. Coupled between the DMC and the inductors/CMC is an RC termination circuit comprising a first capacitor coupled to one leg and a matched second capacitor coupled to the other leg. The two capacitors are connected to the same resistor coupled to ground.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: March 29, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Andrew Gardner, Gitesh Bhagwat
  • Patent number: 11288218
    Abstract: Systems and methods for interfacing an application circuit to an industrial network include first and second interfaces, one or more controllers, and one or more memory devices. The one or more memory devices store instructions, which when executed, cause the controllers perform operations to convert messages between a specified message format according to a protocol of the industrial network and a protocol agnostic format.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: March 29, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Troy S. Turpin, Samantha L. Jaramillo
  • Publication number: 20220094317
    Abstract: High-performance radio frequency analog-to-digital converters (RF ADCs) demand high bandwidth, high linearity, and low noise input amplifiers. A Class-AB amplifier, including common-gate transistor devices and common-source transistor devices operating in parallel, offers high bandwidth and high linearity, while offering lower power operation when compared to Class-A amplifiers. The Class-AB amplifier can be followed by a Class-AB unity gain buffer comprising common-source transistor devices to provide additional isolation for the RF ADC from the circuitry preceding the Class-AB amplifier.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Applicant: Analog Devices International Unlimited Company
    Inventors: Gabriele MANGANARO, Athanasios RAMKAJ, Filip TAVERNIER
  • Publication number: 20220087588
    Abstract: System and apparatus for measuring biopotential and implementation thereof. A device for mitigating electromagnetic interference (EMI) thereby increasing signal-to-noise ratio is disclosed. Specifically, the present disclosure relates to an elegant, novel circuit for measuring a plurality of biopotentials in useful in a variety of medical applications. This allows for robust, portable, low-power, higher S/N devices which have historically required a much bigger footprint.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Applicant: Analog Devices, Inc.
    Inventor: Shrenik DELIWALA
  • Publication number: 20220087618
    Abstract: Disclosed herein are example systems and approaches for decomposition of composite signals. Decomposition of the composite signals may include derivation of two or more signals from the composite signals. An upper envelope and lower envelope may be determined for a composite signal in accordance with a smoothness parameter. A smooth estimate may be produced based on the upper envelope and the lower envelope, where the smooth estimate provides an estimate for a smooth component of the composite signal, which may be more accurate than legacy approaches.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Analog Devices, Inc.
    Inventor: Ilker BAYRAM
  • Publication number: 20220094315
    Abstract: An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.
    Type: Application
    Filed: September 20, 2020
    Publication date: March 24, 2022
    Applicant: Analog Devices, Inc.
    Inventor: Devrim AKSIN
  • Publication number: 20220094306
    Abstract: Segmented power amplifier (PA) arrangements are disclosed. An example PA arrangement includes at least first and second PA segments, each having a respective combination of a PA and a feedforward adaptive bias circuit, configured to generate a bias signal for the corresponding PA. Each bias signal has a first DC component, at least one tone component, and at least one harmonic of the at least one tone component. The PA arrangement further includes a power splitting circuit, configured to split an input signal for the PA arrangement into a first PA input signal for the first PA segment and a second PA input signal for the second PA segment, where a power of the first PA input signal is greater than a power of the second PA input signal.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Applicant: Analog Devices International Unlimited Company
    Inventor: Mohamed Moussa Ramadan Esmael
  • Patent number: 11283351
    Abstract: This disclosure describes techniques to control switching operations of a switching regulator. The disclosure includes a system comprising a switching regulator configured to use an inductor to generate an output voltage signal from a. pulse-width-modulated (PWM) signal by controlling one or more switches of the switching regulator that vary charging operations of the inductor; transient handling circuitry coupled to receive a feedback voltage based on the output voltage signal and configured to generate first and second current signals that represent a difference between the feedback voltage and a reference voltage; and control circuitry configured to generate the PWM signal based on the first and second current signals such that the first current signal changes a frequency of an oscillator used to generate the PWM signal and the second current signal changes a bandwidth of a feedback loop associated with the switching regulator.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: March 22, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Yingyi Yan, Yiding Gu
  • Patent number: 11280639
    Abstract: A system includes a multiturn counter that can store a magnetic state associated with a number of accumulated turns of a magnetic field. The multiturn counter includes a plurality of magnetoresistive elements electrically coupled in series with each other. A matrix of electrical connections is arranged to connect magnetoresistive elements of the plurality of magnetoresistive elements to other magnetoresistive elements of the plurality of magnetoresistive elements.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: March 22, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventor: Jochen Schmitt
  • Patent number: 11279614
    Abstract: Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in the parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. Formation of trenches enables an increase in the vertical separation between a sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. The stationary electrode of the sense capacitor may be placed between the proof mass and the trench. The trench may be filled with a dielectric material. Part of the trench may be filled with air, in some circumstances, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may serve, among other types of inertial sensors, as accelerometers and/or gyroscopes. Fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 22, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Charles Blackmer, Jeffrey A. Gregory, Nikolay Pokrovskiy, Bradley C. Kaanta
  • Patent number: 11280645
    Abstract: Various examples are directed to methods and system of managing a sensor. A measurement system may receive from the host device, a first register map describing a first configuration of the measurement system for the first sensor. The first configuration may indicate a first measurement frequency for the first sensor. The measurement system may configure a switch matrix to provide a first excitation signal to the first sensor. The measurement system may configure the switch matrix to connect an analog-to-digital converter (ADC) of the measurement system to the first sensor. The measurement system may sample a first raw sensor signal from the first sensor with the ADC at a first measurement frequency described by the first configuration. The measurement system may generate first digital measurement data based at least in part on the first raw sensor signal and send the first digital measurement data to the host device.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: March 22, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Claire Croke, Aine McCarthy, Adrian Sherry, Giovanni C. Dotta, Dan O'Donovan, Sean Wilson, Mary McCarthy, Colin G. Lyden, Fiona Treacy, Michael Byrne
  • Patent number: 11283479
    Abstract: Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: March 22, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Prathamesh H. Pednekar, Song Lin
  • Publication number: 20220085762
    Abstract: One embodiment is a reconfigurable mixer topology for selectively implementing one of a harmonic rejection mixer (HRM) and a subharmonic mixer (SHM), the reconfigurable mixer topology comprising a mixer core comprising a plurality of differential mixers each having a first clock input and a second clock input; a clock generator for generating a plurality of clock signals each having a different phase; and a clock distributor for distributing the plurality of clock signals to the first and second clock inputs of the differential mixers in accordance with a designated operation of the reconfigurable mixer as an HRM or an SHM.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 17, 2022
    Applicant: Analog Devices, Inc.
    Inventors: Peter DELOS, Ed BALBONI
  • Publication number: 20220082627
    Abstract: Described herein is a device for autonomously monitoring a battery is provided. The device is integrated with the battery (e.g., by being electrically coupled to the battery). The device obtains measurement data by injecting electrical signals into the battery and measuring an electrical response of the battery. The device participates in an authentication protocol with a computing device to verify a unique identity of the device to the computing device. After performing the authentication protocol verifying the unique identity of the device, the device transmits battery data to the computer. Further, techniques for verifying the identity of the battery using measurement data obtained by the device are described herein. The techniques generate a battery signature using the measurement data that is then used to verify the identity of the battery. For example, the battery signature may be used to determine whether the battery is counterfeit or defective.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 17, 2022
    Applicant: Analog Devices International Unlimited Company
    Inventors: Shane O'Mahony, Narsimh Dilip Kamath, Tze Lei Poo, Gina G. Aquilano, Hemtej Gullapalli, Lance Robert Doherty
  • Patent number: 11277101
    Abstract: The present disclosure provides a current-to-voltage signal converter which may operate at an adjusted voltage. The current-to-voltage converter includes a trans-impedance amplifier which converts a current input into a voltage output. The voltage output may operate around an undesirable predetermined voltage, and must therefore be adjusted in order to make it suitable for any downstream signal processing circuitry, such as an ADC. As such, a subtractor circuit is coupled to the output of the trans-impedance amplifier. At the input of the subtractor circuit, a voltage adjustment circuit is employed, to adjust the voltage input to the subtractor circuit. As such, the input to the subtractor is adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor circuit may therefore be a low-voltage component.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: March 15, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jun Gao, Tony Liu, Sharad Vijaykumar
  • Patent number: RE48996
    Abstract: A current detection module capable of differentiating and quantifying contribution to a current signal generated by a sensor in response to stimulation by a certain target source from contributions from sources other than the target source (ambient sources) is disclosed. As long as the contribution from the target source comprises a pulsed signal, the module may synchronize itself to the pulse(s) so that there is a predetermined phase relationship between the pulse(s) and functions carried out by various stages of the module. The module may be re-used to also detect and quantify contributions from ambient sources by presenting these contributions to the module as pulses that trigger synchronization of the module. To that end, a detection system disclosed herein is based on the use of such current detection module and allows mode switching where, depending on the selected mode of operation, the module is configured to perform different measurements.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: March 29, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Shrenik Deliwala, Steven J. Decker, Gregory T. Koker, Dan M. Weinberg