Patents Assigned to Analog Devices
  • Patent number: 11847847
    Abstract: A method for fine-tuning a convolutional neural network (CNN) and a sensor system based on a CNN are disclosed. The sensor system may be deployed at a deployment location. The CNN may be fine-tuned for the deployment location using sensor data, e.g., images, captured by a sensor device of the sensor system at the deployment location. The sensor data may include objects that are not present in an initial data set used for training the CNN. The sensor data and the initial data set may be input to the CNN to train the CNN and obtain fine-tuned parameters of the CNN. The CNN can thus be fine-tuned to the deployment location of the sensor system, with an increased chance of recognizing objects when using the sensor system and the CNN to recognize objects in captured sensor data.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: December 19, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Neeraj Pai, Raka Singh, Srinivas Prasad
  • Patent number: 11846598
    Abstract: A reference electrode with a liquid-impermeable enclosure comprises a chamber for a reference electrolyte. The reference electrode also comprises a first electrode element comprises a reference electrolyte electrode surface arranged to contact a reference electrolyte located within the chamber and a second electrode element is provided at least partially outside the enclosure and comprises a sample electrode surface for contacting a sample. The first and second electrode are electrically connected through the enclosure. Alternatively or additionally, a conductive connecting element defining a part of the enclosure and/or extending through the enclosure electrically connects the first electrode element and the second electrode element.
    Type: Grant
    Filed: December 31, 2021
    Date of Patent: December 19, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Youri Victorvitch Ponomarev, Alfonso Berduque
  • Patent number: 11848610
    Abstract: A switching converter circuit comprises a converting circuit stage, an error amplifier, and a control circuit. The converting circuit stage includes a magnetic circuit element and a switching circuit configured to convert an input voltage to a regulated output voltage by charging and discharging the magnetic circuit element using activation pulses generated using a system clock signal. The error amplifier generates a control voltage using the output voltage. The control circuit varies time between successive activation pulses according to the control voltage, and the successive activation pulses are synchronized to the system clock signal.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 19, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Hua Chen
  • Patent number: 11841727
    Abstract: A reference generator system can include a PTAT circuit coupled to a signal supply node and configured to provide a voltage reference signal or a current reference signal that is based on a physical characteristic of one or more components of the PTAT circuit and a correction signal. The system can include a CTAT circuit coupled to the PTAT circuit and configured to provide the correction signal to the PTAT circuit. In an example, the reference generator system can be implemented at least in part using NMOS devices that comprise a portion of an indium gallium zinc oxide (IGZO) substrate.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Fergus John Downey
  • Patent number: 11844178
    Abstract: An electronic device and a method of forming such an electronic device are disclosed. The electronic device can include an integrated device package and a component. The integrated device package includes a substrate and a package body over the substrate, and a hole formed through the package body to expose a conductive pad of the substrate. The component is mounted over the package body, and includes a component body and a lead extending from the component body through the hole. The lead includes an insulated portion and a distal exposed portion, and the insulated portion includes a conductor and an insulating layer disposed about the conductor, wherein the distal exposed portion is uncovered by the insulating layer such that the conductor is exposed at the distal portion. The electronic device can also include a conductive material that electrically connects the distal exposed portion to the conductive pad of the substrate.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: John David Brazzle, Sok Mun Chew
  • Patent number: 11841386
    Abstract: The response of a coil based current measuring circuit is often proportional to frequency. To correct for this a low pass or integrating function is applied to the response to linearize it. The low pass filter is made from real resistors and capacitors, and tolerances in their values significantly affect the estimate of current. The present approach can provide a way of addressing such problems. This allows consumers of electricity to have confidence in the accuracy of, for example, their electricity meter.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Jonathan Ephraim David Hurwitz
  • Patent number: 11843360
    Abstract: A power combiner/divider circuit can be structured having a base structure with the addition of an odd-mode capacitor and a low pass network at an end of the base structure or structured having a base structure with the addition of an inductor and a high pass network at an end of the base structure. The power combiner/divider circuit can be implemented as a port coupled to multiple ports with low pass networks or high pass networks arranged at the ends of paths to the multiple ports. In embodiments using low pass base structures or low pass networks coupled to the base structures, inductors in such low pass sections can be positively coupled on a pair-wise basis.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Song Lin, Xudong Wang, Kefei Wu, Christopher Eugene Hay
  • Patent number: 11841428
    Abstract: A system and method for storing sensed values in an optical receiver corresponding to time-of-flight windows for receiving optical signals elicited by emitted optical pulses includes at least one photodetector, a storage array, and a control circuit. The at least one photodetector is configured to generate output signals indicative of received optical signals. The storage array includes a plurality of storage elements and is connected to receive and store the output signals from the at least one photodetector corresponding to at least a portion of a time-of-flight receive window.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Tairan Sun, Libo Meng
  • Patent number: 11843708
    Abstract: The present disclosure relates to a PUF apparatus for generating a persistent, random number. The random number is determined by selecting one or more PUF cells, each of which comprise a matched pair of capacitors that are of identical design, and determining a value that is accurately and reliably indicative of a random manufacturing difference between them, based in which the random number is generated. The random manufacturing differences between the capacitors creates the randomness in the generated random number. Furthermore, because the random manufacturing difference should be relatively stable over time, the generated random number should be persistent.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Jonathan Ephraim David Hurwitz
  • Publication number: 20230396264
    Abstract: High speed, high dynamic range SAR ADC method and architecture. The SAR DAC comparison method can make fewer comparisons with less charge/fewer capacitors. The architecture makes use of a modified top plate switching (TPS) DAC technique and therefore achieves very high-speed operation. The present disclosure proffers a unique SAR ADC method of input and reference capacitor DAC switching. This benefits in higher dynamic range, no external decoupling capacitory requirement, wide common mode range and overall faster operation due to the absence of mini-ADC.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Applicant: Analog Devices International Unlimited Company
    Inventor: Mahesh Madhavan Kumbaranthodiyil
  • Patent number: 11833910
    Abstract: A method of monitoring a battery system includes connecting a voltage divider circuit to a battery of the battery system; measuring a first battery voltage; sampling a first chassis voltage for less than a settling time of the first chassis voltage and estimating a settled value of the first chassis voltage using sampled values of the first chassis voltage; changing a configuration of the voltage divider circuit; measuring a second battery voltage; sampling a second chassis voltage for less than a settling time of the second chassis voltage and estimating a settled value of the second chassis voltage using sampled values of the second chassis voltage; and determining isolation impedance of the battery to a chassis using the first and second battery voltages and the estimated settled values of the first and second chassis voltages.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: December 5, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Bostjan Bitene
  • Patent number: 11835584
    Abstract: A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: December 5, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jeremy R. Gorbold, Paul Joseph Maher, Andreas Callanan
  • Patent number: 11837403
    Abstract: Systems and methods involving nanomaterial-based electrodes, such as supercapacitor and battery electrodes that can be flexible, are described.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: December 5, 2023
    Assignees: Massachusetts Institute of Technology, Analog Devices, Inc.
    Inventors: Karen K. Gleason, Brian L. Wardle, Estelle Cohen, Yue Zhou, Xiaoxue Wang, Yosef Stein
  • Patent number: 11830289
    Abstract: Far field devices typically rely on audio only for enabling user interaction and involve only audio processing. Adding a vision-based modality can greatly improve the user interface of far field devices to make them more natural to the user. For instance, users can look at the device to interact with it rather than having to repeatedly utter a wakeword. Vision can also be used to assist audio processing, such as to improve the beamformer. For instance, vision can be used for direction of arrival estimation. Combining vision and audio can greatly enhance the user interface and performance of far field devices.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: November 28, 2023
    Assignee: ANALOG DEVICES, INC.
    Inventors: Atulya Yellepeddi, Kaushal Sanghai, John Robert McCarty, Brian C. Donnelly, Nicolas Le Dortz, Johannes Traa
  • Patent number: 11829864
    Abstract: An energy-efficient multiplication circuit uses analog multipliers and adders to reduce the distance that data has to move and the number of times that the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula generate a matrix multiplication result in form of a current that is then digitized for further processing.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: November 28, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Sung Ung Kwak, Robert Michael Muchsel
  • Publication number: 20230375610
    Abstract: Systems and techniques for line diagnostics. In particular, disclosed herein are systems and techniques for line diagnostics that sense a state of an electrical cable by using multiple, time-spaced stimuli and detecting their signal reflection time at different threshold levels. Information derived from multiple reflections may be used to determine cable characteristics (e.g., “wire short,” “wire open,” “correctly terminated,” etc.). The systems and techniques disclosed herein may advantageously require less complex hardware and implementation algorithms than conventional time domain reflectometry (TDR) approaches, and thus may be implemented in settings in which TDR was previously unsuitable. Further, if a cable issue is detected, the systems and techniques disclosed herein may determine the approximate location of the cable issue along the cable, accelerating correction of the issue.
    Type: Application
    Filed: December 6, 2021
    Publication date: November 23, 2023
    Applicant: Analog Devices International Unlimited Company
    Inventors: Peter SEALEY, Martin KESSLER, Dan BOYKO, Md Kamruzzaman SHUVO, Matthew PUZEY
  • Publication number: 20230375627
    Abstract: Sensors and methods for determining the state of charge of a battery are described. The state of charge is determined in some instances by applying a current perturbation having a frequency to the battery terminals, monitoring the response signal, and determining the phase of the response signal. The phase may be correlated to the state of charge of the battery, so that once the phase is determined, a determination of the state of charge of the battery may be made. In some situations, the state of charge may be used to determine the operating condition of a load connected to the battery. In some embodiments, the state of charge may be used to determine whether the battery is defective.
    Type: Application
    Filed: April 14, 2023
    Publication date: November 23, 2023
    Applicant: Analog Devices International Unlimited Company
    Inventors: Hemtej Gullapalli, Erfan Soltanmohammadi, Han Zhang, Michael W. O'Brien
  • Patent number: 11824245
    Abstract: Systems, devices, and methods related to phase shifters are provided. An example apparatus includes a first node to receive an input signal, a second node, a first signal path coupled between the first node and the second node, and a second signal path coupled between the first node and the second node. The first signal path includes a positively coupled transformer. The second signal path includes a negatively coupled transformer. The second signal path is out-of-phase with the first signal path at the second node. The apparatus further includes a plurality of switches to select the first signal path or the second signal path. The apparatus may further include tuning capacitors to improve phase-shifting performance of the apparatus.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: November 21, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Xudong Wang, Jinzhou Cao, Song Lin
  • Patent number: 11824451
    Abstract: A multi-phase buck-boost converter circuit comprises a buck circuit stage, a boost circuit stage, and a control circuit. The buck circuit stage is connected to an input of the buck-boost converter circuit to receive an input voltage. The boost circuit stage includes multiple boost circuits connected in parallel. The boost circuit stage is coupled to the buck circuit stage and an output of the multi-phase buck-boost converter circuit. Each boost circuit includes an inductor coupled to the buck circuit stage. The control circuit operates the multiple boost circuit stages out of phase with respect to each other in a boost mode, operates the buck circuit stage in a buck mode, and operates the multiple boost circuit stages out of phase with respect to each other and operates the buck circuit stage in a buck-boost mode.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: November 21, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Dongwon Kwon, Min Kyu Song, Jindong Zhang, Min Chen
  • Patent number: 11824506
    Abstract: An amplifier circuit comprises a first gain circuit path configured to provide a first signal gain to an input signal, a second gain circuit path configured to provide a second signal gain to an input signal, an auxiliary gain circuit path configured to provide an auxiliary signal gain to an auxiliary input signal, wherein the auxiliary signal gain is equal to the first signal gain minus the second signal gain, a summing circuit configured to sum the second gain signal path and the auxiliary signal path, and logic circuitry configured to change an output of the circuit between the first gain circuit path and the sum of the second gain signal path and the auxiliary signal path, and set the auxiliary input signal equal to the input signal before the changing.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: November 21, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Anthony Eric Turvey, Michael E. Harrell, Murat Demirkan