Abstract: Power systems having a DC content, such as photovoltaic (solar) panels present a problem if an arc fault appears because of a small break in a cable. The present disclosure describes an arc fault detection system that captures data in segments, examines the frequency spectrum to remove ‘false arc’ signatures and interference from a power converter of the power system, and then examines the cleaned frequency spectrum for arc events.

Abstract: Techniques for linearizing a field effect transistor (FET) are provided. In an example, a method can include averaging a voltage at a drain node of the FET and a voltage at a source node of the FET to provide an average voltage, and applying the average voltage to a gate node of the FET.

Abstract: A method of fabricating a super-capacitor provides a substrate, and then adds an electrode and electrolyte template film, having a well for receiving the electrode, to the substrate. The method also adds a second electrolyte to the electrode and electrolyte template.

Abstract: A method is described and in one embodiment includes detecting a transition of a data signal comprising a data packet received at a circuit while the circuit is in a first hysteresis mode; placing the circuit in a second hysteresis mode subsequent to the detecting; and returning the receiver to the first hysteresis mode subsequent to completion of receipt of the data packet to await receipt of a next data packet. In certain embodiments, the first hysteresis mode is a high hysteresis mode and the second hysteresis mode is a standard hysteresis mode. In some embodiments, a level of each of the first and second hysteresis modes is dynamically tunable.

Abstract: It is often desirable to transmit data between circuits or components operating at a relatively high voltage and circuits operating at a relatively low voltage. Such a task can be performed by use of an isolator. Some isolator designs use magnetic coupling to transfer the data as this is more robust against inadvertently transmitting high voltage transients than capacitor based isolators. However it is often desirable to encode the data for exchange across the transformer of the isolator and decode after transmission across the transformer. This requires power for the encoding and decoding circuits. To ensure both sides are powered, power may be transferred by another transformer. The transformer primary is driven by an oscillating signal. The system disclosed in some embodiments herein varies the frequency of the oscillating signal to mitigate the risk of it interfering with other circuits or systems associated with the isolator.

Abstract: This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.

Abstract: A power factor correction device for providing tolerance to a fault condition in an input supply can include a first boost circuit, a second boost circuit, and a controller circuit. The controller circuit can interleave operation of the first boost circuit and operation of the second boost circuit such as to generate an output voltage when the input supply is received at the power factor correction device. The controller circuit can route, in response to the fault condition, a stored supply of the second boost circuit to an input of the first boost circuit. The controller circuit can control the first boost circuit to maintain the output voltage.

Abstract: In a cascaded integrator comb (CIC) filter, a time-varying gain is added before the last integrating stage transforming its sub optimal boxcar impulse response into an FIR filter of arbitrary length. Make the coefficients sparse and taking them from a set of small integers leads to an efficient hardware implementation that does not compromise any of the essential CIC filter characteristics especially the overflow handling. The proposed sparse CIC structure can improve the worst case stop band attenuation by as much as 10 dB while occupying 77% of the chip area and consuming 30% less power compared to a standard a 5th order CIC filter, and reducing the overall bit growth of the filter and the amount of high rate operations. Design examples are given illustrating the advantages and flexibility of the proposed structure.

Abstract: Using various circuits and methods, current can be controlled when a circuit board is plugged into a powered system using two charging paths so that a first current can be supplied between a supply voltage and the load in a first charging path during a first time period and a second current can be supplied between the supply voltage and the load in a second charging path during a second time period.

Abstract: The present disclosure provides systems and methods to provide a constant common mode voltage at the input terminals of a difference amplifier. A difference amplifier can receive an input signal and can deliver an amplified version of the received input signal at an output of the difference amplifier. In a system where a difference amplifier can receive an output of a digital-to-analog converter (DAC), the DAC performance can deteriorate in situations where common mode voltage at the input terminals of the difference amplifier are changing. A difference amplifier including feedback circuitry can provide a constant common mode voltage at the input terminals of the difference amplifier, leading to improved performance in a system where the difference amplifier receives an input signal from a DAC.

Abstract: Described are various current measurement techniques that can compensate for drift in shunt resistance. Determining a resistance of a shunt resistor, e.g., coupled to a battery terminal, can include introducing a known signal in sync with the chop phases of a dual system chop scheme, chopping the known signal out in the main signal path, and explicitly extracting the known signal in a parallel, additional signal deprocessing path.

Abstract: Circuits and methods for compensating microelectromechanical system (MEMS) gyroscopes for quality factor variations are described. Quality factor variations arise when mechanical losses are introduced in the gyroscope's resonator, for example due to thermoelastic damping or squeeze-film damping, which may hinder the gyroscope's ability to accurately sense angular velocity. Quality factor compensation may be performed by generating a compensation signal having a time decay rate that depends on the quality factor of resonator. In this way, artifacts that may otherwise arise in gyroscope's output are limited. Additionally, or alternatively, quality factor compensation may be performed by controlling the force with which the gyroscope's resonator is driven. This may be achieved, for example, by controlling the average value of the drive signal.

Abstract: A flyback power conversion circuit can be operated by selectively establishing and interrupting a current through a first inductance to store energy. A portion of the energy from a second inductance can be transferred to a storage device to provide an output voltage, where the second inductance is magnetically coupled to the first inductance. Information transmitted across an isolation barrier can be monitored, such as information indicative of the output voltage. The monitoring can include detecting whether information from at least two sources is consistent. An operating mode of the flyback power conversion circuit can be selected, such as response to the detecting whether the information from at least two sources is consistent, or whether valid information is being transmitted across the isolation barrier, or in response to one or more other criteria.

Abstract: A sigma-delta ADC circuit with an analog loop filter circuit can be multiplexed between different inputs by flushing the memory of the analog loop filter integrators and the digital decimation filter and filling it with new data for the current input. However, filling the memory can be slow with respect to the sampling frequency because the information about past history has to be built up before meaningful output data can be generated. Thus, the multiplexing rate between channels using a sigma-delta ADC circuit can be slowed by such memory flushing. A multiplexed sigma-delta ADC circuit is described that can overcome these problems so as to be able to support cycle-by-cycle sampling of multiple channels. These techniques can provide a fast sigma-delta analog-to-digital converter (ADC) circuit that is small in area and that can multiplex over a number of channels dynamically.

Abstract: An interface circuit to an electromagnetic flow sensor is described. In an example, it can provide a DC coupled signal path from the electromagnetic flow sensor to an analog-to-digital converter (ADC) circuit. Examples with differential and pseudo-differential signal paths are described. Examples providing DC offset or low frequency noise compensation or cancellation are described. High input impedance examples are described. Coil excitation circuits are described, such as can provide on-chip inductive isolation between signal inputs and signal outputs. A switched mode power supply can be used to actively manage a bias voltage of an H-Bridge, such as to boost the current provided by the H-Bridge to the sensor coil during select time periods, such as during phase shift time periods of the coil, which can help reduce or minimize transient noise during such time periods.

Abstract: Techniques to use reservoir capacitors in ADC to supply most of the charge to bit-trial capacitors as bit-trials are performed. An accurate reference voltage source, e.g., a reference buffer circuit, only needs to supply the difference, e.g., an inaccuracy, in the charge supplied by the reservoir capacitors. Instead of having to resettle for each bit-trial, the accurate reference voltage source has only to deliver the initial charge to the reservoir capacitors during acquisition and once more when the ADC is ready to sample onto the residue amplifier. These techniques can ease the demands on the reference buffer circuit and requirement of external decoupling capacitors, for example.

Abstract: The noise power of an amplifier or buffer can increase towards the unity gain crossover frequency of the amplifier. The inventor realized that many applications do not require the full bandwidth capability of the amplifier all of the time and hence step could be taken to reduce the bandwidth at the output of the amplifier and hence the noise power can be reduced when appropriate, taking other operating requirements into consideration.

Abstract: According to some aspects, a power regulation system for energy harvesters that lacks a battery is provided. In some embodiments, the power regulation system may receive power from multiple energy harvesters that generate energy from different sources, such as wind currents and ambient light. In these embodiments, the power regulation system may selectively provide power from one or more of the energy harvesters to a load as environmental conditions change and power itself with energy from the energy harvesters. Thereby, the power regulation system may start and operate without a battery and provide power to the load over a wider range of environmental conditions.

Abstract: Multiplying delay locked loops (MDLLs) with compensation for realignment error are provided. In certain implementations, an MDLL includes a control circuit, a multiplexed oscillator, and an integrate and subtract circuit. The control circuit selectively injects a reference clock signal into the multiplexed oscillator, which operates with an injected period when the reference clock signal is injected and with a natural period when the reference clock signal is not injected. The integrate and subtract circuit receives an oscillator signal from the multiplexed oscillator, and tunes an oscillation frequency of the multiplexed oscillator based on a difference between an integration of the oscillator signal over the injected period and an integration of the oscillator signal over the natural period.

Abstract: A voltage regulator circuit having an internally compensated effective series resistance includes a control circuit to generate an out current at a regulated output voltage based on a reference voltage. The control circuit includes an amplifier, a resistive element to feedback output voltage to an input of the amplifier, and a compensation circuit to couple the internally compensated effective series resistance into the control circuit. The compensation circuit includes a first current sense device to generate a first sensed current proportional to a current through an N-type pass device, a second current sense device arranged to generate a second sensed current proportional to the current through the N-type pass device, and a bias circuit coupled to sink the first sensed current and the second sensed current to reduce a bias voltage across the resistive element below a threshold voltage.