Patents Assigned to Analog Technologies, Inc.
  • Isolation structures for integrated circuit devices
    Publication number: 20080217729
    Abstract: An isolated CMOS pair of transistors formed in a P-type semiconductor substrate includes an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
    Type: Application
    Filed: February 14, 2008
    Publication date: September 11, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Method of fabricating isolated semiconductor devices in epi-less substrate
    Patent number: 7422938
    Abstract: An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.
    Type: Grant
    Filed: August 14, 2004
    Date of Patent: September 9, 2008
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Isolated CMOS transistors
    Publication number: 20080210980
    Abstract: Isolated CMOS transistors formed in a P-type semiconductor substrate include an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
    Type: Application
    Filed: February 14, 2008
    Publication date: September 4, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Processes for forming isolation structures for integrated circuit devices
    Publication number: 20080213972
    Abstract: Processes for forming isolation structures for semiconductor devices include forming a submerged floor isolation region and a filed trench which together enclose an isolated pocket of the substrate. One process aligns the trench to the floor isolation region. In another process a second, narrower trench is formed in the isolated pocket and filled with a dielectric material while the dielectric material is deposited so as to line the walls and floor of the first trench. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
    Type: Application
    Filed: February 14, 2008
    Publication date: September 4, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Planarized and silicided trench contact
    Patent number: 7419878
    Abstract: Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends above a substrate surface. The gate bus trench and/or gate structures in the device trenches can contain a metal/silicide to reduce resistance, where polysilicon layers surround the metal/silicide to prevent metal atoms from penetrating the gate oxide in the device trenches. CMP process can remove excess polysilicon and metal and planarize the conductive gate structure and/or overlying insulating layers. The processes are compatible with processes forming self-aligned or conventional contacts in the active device region.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: September 2, 2008
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Semiconductor integrated circuit substrate containing isolation structures
    Publication number: 20080203543
    Abstract: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
    Type: Application
    Filed: April 30, 2008
    Publication date: August 28, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Isolation structure for semiconductor integrated circuit substrate
    Publication number: 20080203520
    Abstract: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
    Type: Application
    Filed: April 30, 2008
    Publication date: August 28, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Isolation and termination structures for semiconductor die
    Publication number: 20080197445
    Abstract: Various integrated circuit devices, including a lateral DMOS transistor, a quasi-vertical DMOS transistor, a junction field-effect transistor (JFET), a depletion-mode MOSFET, and a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 21, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Isolated diode
    Publication number: 20080197446
    Abstract: Various integrated circuit devices, in particular a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 21, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Isolated quasi-vertical DMOS transistor
    Publication number: 20080197408
    Abstract: Various integrated circuit devices, in particular a quasi-vertical DMOS transistor, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 21, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Reverse Current Comparator Circuit and Method for Switching Regulators
    Publication number: 20080197827
    Abstract: A reverse current comparator for use in switching regulators includes a differential stage configured to encode the difference in voltage between an N and a P input. The differential stage feeds one or more gain stages. At least one of the gain stages includes one or more hysteresis devices. When the voltage of the N input exceeds the voltage of the P input by a predetermined margin, the hysteresis device causes the regulator to enter a triggered state in which it outputs a non-zero output voltage. Subsequent changes to the N and P inputs do not change the regulator output until a RESET input is asserted and which point the regulator enters a reset state and is ready to be triggered.
    Type: Application
    Filed: February 22, 2008
    Publication date: August 21, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Robert Wrathall
  • Isolated transistor
    Publication number: 20080191277
    Abstract: Various integrated circuit devices, in particular a transistor, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 14, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • High-efficiency DC/DC voltage converter including down inductive switching pre-regulator and capacitive switching post-converter
    Publication number: 20080158915
    Abstract: A DC/DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Application
    Filed: August 8, 2007
    Publication date: July 3, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • High-efficiency DC/DC voltage converter including capacitive switching pre-converter and up inductive switching post-regulator
    Publication number: 20080157732
    Abstract: A DC/DC converter includes a pre-converter stage, which may include a charge pump, and a post-regulator stage, which may include a boost converter. The duty factor of the post-regulator stage is controlled by a feedback path that extends from the output terminal of the DC/DC converter to an input terminal in the post-regulator stage. The pre-converter steps the input DC voltage up or down by a positive or negative integral or fractional value, and the post-regulator steps the voltage up by a variable amount depending on the duty factor at which the post-regulator is driven. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Application
    Filed: August 8, 2007
    Publication date: July 3, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • High-efficiency DC/DC voltage converter including up inductive switching pre-regulator and capacitive switching post-converter
    Publication number: 20080157733
    Abstract: A DC/DC converter includes a pre-regulator stage, which may include a boost converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage up by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Application
    Filed: August 8, 2007
    Publication date: July 3, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Publication number: 20080122006
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 29, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Publication number: 20080116513
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 22, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Battery Charger Apparatus With A Digital Charge Reduction Loop
    Publication number: 20080111521
    Abstract: A battery charger apparatus for charging a battery, comprises a charge-current control circuit for receiving a charge-current control signal to control an amount of charge current being drawn from an input source, e.g.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 15, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: John Sung Ko So, David Alan Brown
  • Supply Power Control with Soft Start
    Publication number: 20080094865
    Abstract: Charge storage devices (e.g., batteries or supercapacitors) need to be charged from time to time. In an apparatus, to protect a charge storage device as well as the supply used to charge it, the apparatus typically includes power loop control circuitry. One approach to implementing the power loop control employs a temperature sensor in combination with soft start circuitry in order to protect the circuitry from a rapidly increasing temperature when charge current increases. The soft start circuitry allows for controlled step-wise increase and regulation of the current. The approach preferably allows for selecting the number and resolution of such incremental steps. Various embodiments of the invention include devices and methods for controlling power and may take into account temperature in step-wise regulation of the charge current.
    Type: Application
    Filed: May 16, 2007
    Publication date: April 24, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: John So, David Yen Wai Wong
  • Charging Scheme
    Publication number: 20080094042
    Abstract: Mobile devices have limited power sources. In some cases, such as camera flash operations in cell phones or digital cameras, the power required to provide bright illumination is significant and exceeding the battery voltage level. In order to supply burst power or continuous high power to light sources, such as white LEDs (light emitting diodes), mobile devices typically employ charge storage functioning as energy reservoir that can supply the required power. One such charge storage is a supercapacitor that can supply the needed power repeatedly by discharging and recharging. Various embodiments of the present invention include devices and methods for providing the charge energy and controlling the charge and discharge operations.
    Type: Application
    Filed: November 14, 2006
    Publication date: April 24, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Bruno Ferrario