Abstract: Embodiments of the disclosure provide methods of manufacturing electronic devices that meet compressive stress requirements for PMOS transistors and tensile stress requirements for NMOS transistors. Each P-metal stack and P-metal stack: is formed on a top surface of a channel located between a source and a drain on a semiconductor substrate, and comprises nanosheet channel layers and trenches between each nanosheet channel layer, and has at least one side defining a gate trench. Some embodiments include forming a work function layer in the channel and inducing a work function layer strain in the channel. Some embodiments include forming a gate metal fill layer on each of the P-metal stack and the N-metal stack and inducing a gate metal fill layer strain in the channel. The gate metal fill layer covers the at least one side of each of the P-metal stack and the N-metal stack and fills the gate trench.

Abstract: Embodiments herein are directed to localized stress modulation by implanting a first side of a substrate to reduce in-plane distortion along a second side of the substrate. In some embodiments, a method may include providing a substrate, the substrate comprising a first main side opposite a second main side, wherein a plurality of features are disposed on the first main side, performing a metrology scan to the first main side to determine an amount of distortion to the substrate due to the formation of the plurality of features, and depositing a stress compensation film along the second main side of the substrate, wherein a stress and a thickness of the stress compensation film is determined based on the amount of distortion to the substrate. The method may further include directing ions to the stress compensation film in an ion implant procedure.

Abstract: A method and apparatus for substrate processing and a cluster tool including a transfer chamber assembly and a plurality of processing assemblies. Processing chamber volumes are sealed from the transfer chamber volume using a support chuck on which a substrate is disposed. A seal ring assembly is coupled to the support chuck. The seal ring assembly includes an inner assembly, an assembly bellows circumscribing the inner assembly, and a bellows disposed between the inner and outer platform. An inner ring is disposed between inner assembly of the seal ring assembly and the bottom surface of the support chuck. An outer ring disposed between the seal ring assembly and the lower sealing surface of the process chamber wall. The support chuck is raised to form an isolation seal between the processing chamber volume and the transfer chamber volume using the bellows, the inner ring, and the outer ring.

Abstract: A radio frequency (RF) source may be used to generate a capacitively coupled plasma to perform a plasma-based process on a substrate in a plasma processing chamber. A controller may cause the RF source and a switching element to route an RF signal to electrodes in the pedestal that generate the plasma in the processing chamber as part of a recipe performed on a substrate during etch or deposition processes. Between processes, the controller may cause the same RF source to generate a second RF signal that is instead routed by the switching element to inductive coils to generate an inductively coupled plasma for a cleaning process to remove film deposits on the interior of the plasma processing chamber.

Abstract: Embodiments herein generally relate to chemical mechanical polishing (CMP) systems used in the manufacturing of electronic devices. In one embodiment, a substrate carrier for polishing a surface of a substrate includes a retaining ring configured to surround a substrate during a polishing process. The retaining ring includes a first surface that is configured to contact a surface of a polishing pad during the polishing process, a second surface that is on a side of the retaining ring that is opposite to the first surface, and an array of recesses formed in the second surface.

Abstract: Embodiments described herein relate to flat optical devices and methods of forming flat optical devices. One embodiment includes a substrate having a first arrangement of a first plurality of pillars formed thereon. The first arrangement of the first plurality of pillars includes pillars having a height h and a lateral distance d, and a gap g corresponding to a distance between adjacent pillars of the first plurality of pillars. An aspect ratio of the gap g to the height h is between about 1:1 and about 1:20. A first encapsulation layer is disposed over the first arrangement of the first plurality of pillars. The first encapsulation layer has a refractive index of about 1.0 to about 1.5. The first encapsulation layer, the substrate, and each of the pillars of the first arrangement define a first space therebetween. The first space has a refractive index of about 1.0 to about 1.5.

Abstract: A chemical mechanical polishing system includes a support to hold a polishing pad, a carrier head to hold a substrate against the polishing pad during a polishing process, an in-situ monitoring system configured to generate a signal indicative of an amount of material on the substrate, a temperature control system to control a temperature of the polishing process, and a controller coupled to the in-situ monitoring system and the temperature control system. The controller is configured to cause the temperature control system to vary the temperature of the polishing process in response to the signal.

Abstract: A substrate processing system includes a process chamber, one or more robot, a substrate measurement system, and a computing device. The process chamber may process a substrate that will comprise a film and/or feature after the processing. The one or more robot, to move the substrate from the process chamber to a substrate measurement system. The substrate measurement system may measure the film and/or feature on the substrate and generate a profile map of the film and/or feature. The computing device may process data from the profile map using a first trained machine learning model, wherein the first trained machine learning model outputs a first chamber component condition estimation for a first chamber component of the process chamber. The computing device may then determine whether to perform maintenance on the first chamber component of the process chamber based at least in part on the first chamber component condition estimation.

Abstract: Implementations disclosed describe an inspection device capable of being transferred by a robot blade into a processing chamber of a manufacturing machine, the inspection device comprising an optical sensor to detect light reflected from a target located within the processing chamber, wherein the optical sensor is to output, to a processing device, a signal representative of a state of a region of a surface of the target.

Abstract: Embodiments disclosed herein include diagnostic substrates and methods of using the diagnostic substrates to extract plasma parameters. In an embodiment, a diagnostic substrate comprises a substrate and an array of resonators across the substrate. In an embodiment, the array of resonators comprises at least a first resonator with a first structure and a second resonator with a second structure. In an embodiment, the first structure is different than the second structure.

Abstract: Lid separators for vacuum processing chamber lid separation and vacuum processing chambers incorporating same are provided herein. In some embodiments, a lid separator for a vacuum processing chamber includes: a shaft having a first end and an opposing second end, wherein the shaft is threaded along at least a first portion of the shaft; and a contact pad having an outer diameter greater than an outer diameter of the shaft, a recess disposed in a first side of the contact pad, and a central opening disposed through a second side of the contact pad, opposite the first side, and into the recess, wherein the shaft is coupled to the contact pad, wherein the first end of the shaft extends through the central opening and into the recess without reaching the first side of the contact pad, and wherein the first portion and the second end of the shaft extend away from the second side of the contact pad.

Abstract: Disclosed herein is an apparatus for processing a substrate using an inductively coupled plasma source. An inductively coupled plasma source utilizes a power source, a shield member, and a coil coupled to the power source. In certain embodiments, the coils are arranged with a horizontal spiral grouping and a vertical extending helical grouping. The shield member, according to certain embodiments, utilizes a grounding member to function as a Faraday shield. The embodiments herein reduce parasitic losses and instabilities in the plasma created by the inductively coupled plasma in the substrate processing system.

Abstract: A flow apparatus and process chamber having the same are described herein. In one example, flow apparatus for use in semiconductor processing comprises an inject assembly and an inductive heater coupled to the inject assembly. The inject assembly comprises an inject body, a first gas inlet configured to flow a first gas through the inject body, and a plurality of flow channels disposed in the inject body, the plurality of flow channels coupled to the first gas inlet. The inductive heater is configured to heat a gas and comprises a heater housing, a graphite rod disposed in the heater housing, the graphite rod having a distal end and proximate end, an inductive coil disposed around the graphite rod, and a second gas inlet configured to flow a second gas between the heater housing and a graphite rod.

Abstract: A semiconductor device and a method for manufacturing thereof. A substrate is provided. One or more groups of layers are formed on top of the substrate. A compensation layer is formed on top of at least one group of layers. At least one silicon layer is formed on top of the compensation layer. At least a portion of one or more layers in the one or more groups of layers is etched. The semiconductor device is formed.

Abstract: Disclosed herein is a processing system. The processing system has an upper chamber body and a lower chamber body defining a processing environment. An upper heater is moveably disposed in the upper chamber body. The upper heater has a moveable support and an upper step formed along an outer perimeter. A lower showerhead is fixedly disposed in the lower chamber body. The lower showerhead includes a top surface configured to support a substrate, a lower step disposed along an outer perimeter wherein the substrate is configured to extend from the top surface partially over the lower step. Lift pins are disposed in the lower showerhead and configured to extend through the top surface and support the substrate thereon. Gas holes are disposed in a first zone along the top surface and a second zone on the step and configured to independently flow both a process and non-process gas.

Abstract: Disclosed herein are methods for forming MOSFET trenches with improved corner properties. In some embodiments, a method may include providing a device structure including an epitaxial layer and a hard mask over the epitaxial layer, and forming a trench through the well and the epitaxial layer, wherein the trench is defined by a sidewall, a bottom, and a corner at an intersection of the sidewall and the bottom. The method may further include implanting the device structure by delivering ions into the corner and into the bottom of the trench, and etching the trench to increase rounding of the corner.

Abstract: Gas distribution assemblies for semiconductor devices are described. The gas distribution assemblies include a backplate, a faceplate, a counterbored hole, and at least one orifice. The at least one orifice includes, for example, at least one straight orifice, or at least two angled orifices. Some embodiments of the gas distribution assemblies provide for reduced plasma damage in a processing chamber. Some embodiments of the gas distribution assemblies provide for reduced jetting on a substrate in a processing chamber. Methods of reducing plasma damage in gas distribution assemblies are also described.

Abstract: Exemplary semiconductor processing methods may include performing a pre-treatment on a substrate housed within a processing region of a semiconductor processing chamber. The substrate may include a layer of silicon-and-carbon-containing material. The pre-treatment may remove native oxide or residue from a surface of the layer of silicon-and-carbon-containing material. The methods may include providing a silicon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the silicon-containing precursor. The contacting may deposit a layer of silicon-containing material on the layer of silicon-and-carbon-containing material. The methods may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the oxygen-containing precursor.

Abstract: Approaches herein provide devices and methods for forming gate-all-around transistors with improved gate spacer k-values. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, wherein the first implant is performed at a temperature greater than 30° Celsius and forming a S/D material in the S/D cavity following the first implant.

Abstract: A processing chamber and port adaptor are provided. Processing chambers include a chamber body having a lid coupled to the first end of the chamber body, a gas ring adjacent the first end of the chamber body, and a substrate support, where a processing region is defined between the substrate support and the lid. The processing chamber includes a port adapter coupled to the second end of the chamber body. The port adapter includes a body defining a plurality of apertures in fluid communication with the processing region, where each of the apertures are spaced apart along the body such that a distance between adjacent apertures is within about 20% of an average aperture spacing distance, an individually controllable valve fluidly coupled to one or more of the plurality of apertures, and an exhaust system in fluid communication with a system foreline and the plurality of apertures.