Abstract: According to one aspect of the present disclosure, a method of coating a substrate (100) with at least one cathode assembly (10) having a sputter target (20) and a magnet assembly (25) that is rotatable around a rotation axis (A) is provided. The method comprises: Coating of the substrate (100) while moving the magnet assembly in a reciprocating manner in a first angular sector (12); and subsequent coating of the substrate (100) while moving the magnet assembly (25) in a reciprocating manner in a second angular sector (14) different from the first angular sector (12). According to a second aspect, a coating apparatus for performing said method is provided.

Abstract: A method includes determining a plurality of features of a first original image of a first product that are expected to be different for one or more products to be produced via manufacturing parameters of a manufacturing process compared to the first product. The method further includes adjusting one or more of the plurality of features of the first original image to generate a first synthetic image. The method further includes providing a plurality of images including the first original image and the first synthetic image to train a machine learning model to generate a trained machine learning model configured to generate output associated with updating the manufacturing parameters of the manufacturing process.

Abstract: Some embodiments of the disclosure relate to methods for forming a bottom-up tungsten gapfill. Some embodiments of the disclosure relate to methods for reducing the deposition rate of tungsten by chemical vapor deposition. A molybdenum halide precursor is added to a tungsten halide precursor and a reductant. The co-flow of tungsten halide and molybdenum halide demonstrates either reduced or eliminated tungsten growth.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: Exemplary semiconductor processing methods may include providing a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the boron-containing precursor and the nitrogen-containing precursor in the processing region. A temperature of the substrate may be maintained at less than or about 500° C. The methods may include forming a layer of material on the substrate. The layer of material may include hexagonal boron nitride. The methods include subsequent forming the layer of material on the substrate for a first period of time, halting delivery of the boron-containing precursor. The methods may include maintaining a flow of the nitrogen-containing precursor for a second period of time, and increasing a plasma power while maintaining the flow of the nitrogen-containing precursor.

Abstract: A light-emitting pixel structure is described that may include a group of light-emitting diode structures, where each of the light-emitting diode structures is operable to emit light characterized by a different peak emission wavelength. The structures may also include a patterned light absorption barrier characterized by a group of openings in the barrier, where each of the openings permit a transmission of a portion of the light from one of the light-emitting diode structures through the barrier. The structures may further include a metasurface layer operable to change a direction of at least some of the light transmitted through the openings of the patterned light absorption barrier from the light-emitting diode structures.

Abstract: Disclosed herein is s computer-based method for obtaining and analyzing multi-die scan data of a patterned wafer. The method includes sequentially implementing an operation of scanning a respective plurality of sets of slices on a wafer, and, per each slice segment in a multiplicity of slice segments in the plurality of sets of slices, an operation of performing die-to-multi-die (D2MD) analysis of scan data of the slice segment in order to detect defects in the slice segment. Each set of slices may constitute a subset of the totality of slices on the respective die-column. Sets scanned in a same implementation are analogous to one another, thereby facilitating—in the die-to-multi-die analysis of scan data of a slice segment—taking into account, as reference, scan data of areas on other die-columns, which were scanned in the same implementation.

Abstract: A method of milling a sample that includes a first layer formed over a second layer, where the first and second layers are different materials, the method comprising: milling the region of the sample by scanning a focused ion beam over the region a plurality of iterations in which, for each iteration, the focused ion beam removes material from the sample generating byproducts from the milled region; detecting, during the milling, the partial pressures of one or more byproducts with a residual gas analyzer positioned to have a direct line of sight to the milled region; generating, in real-time, an output detection signal from the residual gas analyzer indicative of an amount of the one or more byproducts detected; and stopping the milling based on the output signal.

Abstract: Methods of generating a plasma in a semiconductor processing chamber comprise: applying a radio frequency (RF) power to generate a plasma in a plasma region of the processing chamber, the processing chamber containing: a showerhead, an ion blocker plate, and a substrate, and the plasma region being defined by a front surface of the showerhead and a back surface of the ion blocker plate; and applying a bias the ion blocker plate so that there is no light-up in the processing chamber. Some methods further include dynamically tuning the bias by assessing conditions of light-up or no light-up and adjusting the bias. Some methods further include applying the bias zonally.

Abstract: Methods of forming 3D NAND devices are discussed. Some embodiments form 3D NAND devices with a control gate and a floating gate disposed between a first insulating layer and a second insulating layer. A conformal blocking liner surrounds the floating gate and electrically isolates the control gate from the floating gate. Some embodiments form 3D NAND devices with decreased vertical and/or later pitch between cells.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.

Abstract: Embodiments disclosed herein include methods of developing a metal oxo photoresist. In an embodiment, the method comprises providing a substrate with the metal oxo photoresist into a vacuum chamber, where the metal oxo photoresist comprises exposed regions and unexposed regions. In an embodiment, the unexposed regions comprise a higher carbon concentration than the exposed regions. The method may further comprise vaporizing a halogenating agent into the vacuum chamber, where the halogenating agent reacts with either the unexposed regions or the exposed regions to produce a volatile byproduct. In an embodiment, the method may further comprise purging the vacuum chamber.

Abstract: A system includes a memory and at least one processing device operatively coupled to the memory to facilitate an etch recipe development process by performing a number of operations. The operations include receiving a request to initiate an iteration of an etch process using an etch recipe to etch a plurality of materials each located at a respective one of a plurality of reflectometry measurement points, obtaining material thickness data for each of the plurality of materials resulting from the iteration of the etch process, and determining one or more etch parameters based on the material thickness data.

Abstract: Implementations described herein provide a method for processing a substrate on a substrate support assembly which enables both lateral and azimuthal tuning of the heat transfer between an electrostatic chuck and a substrate. The method includes processing a first substrate using a first temperature profile on a substrate support assembly having primary heaters and spatially tunable heaters. A deviation profile is determined from a result of processing the first substrate. The spatially tunable heaters are controlled in response to the deviation profile to enable discrete lateral and azimuthal tuning of local hot or cold spots on the substrate support assembly in forming a second temperature profile. A second substrate is then processed using the second temperature profile.

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

Abstract: A polishing article has a polishing surface and an aperture, the aperture including a first section and a second section. The polishing article includes a projection extending inwardly into the aperture. The polishing article includes a lower portion on a side of the first surface farther from the polishing surface. A window has a first portion positioned in the first section of the aperture and a second portion extending into the second section of the aperture. The window has a second surface substantially parallel to the polishing surface. A first adhesive adheres the first surface of the projection to the second surface of the window to secure the window to the projection and a second adhesive of different material composition than the first adhesive. The second adhesive is positioned laterally between the second portion of the window and the lower portion of the polishing article.

Abstract: Semiconductor processing methods are described for forming UV-treated, low-? dielectric films. The methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-carbon-containing precursor. The methods may further include generating a deposition plasma from the deposition precursors within the substrate processing region, and depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The as-deposited silicon-and-carbon-containing material may be characterized by greater than or about 5% hydrocarbon groups. The methods may still further include exposing the deposited silicon-and-carbon-containing material to ultraviolet light. The exposed silicon-and-carbon-containing material may be characterized by less than or about 2% hydrocarbon groups.

Abstract: An equipment front end module (EFEM) includes sidewalls forming an EFEM chamber configured to receive inert gas from an inert gas supply. The sidewalls include a first sidewall configured to attach to a panel first side of a panel. The panel forms a panel opening extending between the panel first side and a panel second side. The panel second side is configured to attach to a side storage pod. The EFEM further includes a robot disposed in the EFEM chamber. The robot is configured to transfer substrates from the EFEM chamber into the side storage pod via the panel opening. An exhaust conduit is coupled to the side storage pod to exhaust gas from the side storage pod to an exterior of the side storage pod.

Abstract: Methods of selectively depositing films on substrates are described. A passivation film is deposited on a metal surface before deposition of a dielectric material. Also described is exposing a substrate surface comprising a metal surface and a dielectric surface to a docking precursor to form a passivation film.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.