Patents Assigned to Applied Material
-
Publication number: 20230096706Abstract: A method of characterizing plasmas during semiconductor processes may include receiving operating conditions for a semiconductor process, where the semiconductor process may be configured to generate a plasma inside of a chamber of a semiconductor processing system. The method may also include providing the operating conditions for the semiconductor process as inputs to a model, where the model may have been trained to characterize plasmas in the chamber. The method may also include generating, using the model, a characterization of the plasma in the chamber resulting from the operating conditions of the semiconductor process.Type: ApplicationFiled: September 27, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Soonwook Jung, Kenneth D. Schatz, Hunkee Cho
-
Publication number: 20230101155Abstract: A memory device architecture, and method of fabricating a three dimensional device are provided. The memory device architecture may include a plurality of memory blocks, arranged in an array, wherein a given memory block comprises: a cell region, the cell region comprising a three-dimensional array of memory cells, arranged in a plurality of n memory cell layers; and a staircase region, the staircase region being disposed adjacent to at least a first side of the cell region, the staircase region comprising a signal line assembly that is coupled to the three-dimensional array of memory cells.Type: ApplicationFiled: July 19, 2022Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Chang Seok Kang, Fred Fishburn, Tomohiko Kitajima, Sung-Kwan Kang, Sony Varghese, Gill Yong Lee
-
Publication number: 20230096518Abstract: A method of detecting failure causes in semiconductor processing systems may include receiving an indication of a failure in a semiconductor processing system and providing the indication of the failure as a query to a network representing the semiconductor processing system. The network may include nodes representing on-wafer effects and component functions, and relationships between the nodes that represent causal dependencies between the component functions and the on-wafer effects. The method may also include calculating a change in probabilities assigned to nodes representing the component functions resulting from the query, and generating an output indicating a probability of at least one of the component functions as a cause of the failure.Type: ApplicationFiled: September 24, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Anshul Ashok Vyas, Liem Ferryanto, Binbin Wang, Ravi C. Edupuganti
-
Publication number: 20230094012Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor in the processing region. The plasma may be at least partially formed by an RF power operating at between about 50 W and 1,000 W, at a pulsing frequency below about 100,000 Hz, and at a duty cycle between about 5% and 95%. The methods may include forming a layer of material on the substrate. The layer of material may include a silicon-containing material.Type: ApplicationFiled: September 15, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Ruitong Xiong, Bo Xie, Xiaobo Li, Yijun Liu, Li-Qun Xia
-
Publication number: 20230094180Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.Type: ApplicationFiled: December 5, 2022Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
-
Publication number: 20230096772Abstract: Apparatus and methods for supplying a vapor to a processing chamber such as a film deposition chamber are described. The vapor delivery apparatus comprises an inlet conduit and an outlet conduit, in fluid communication with an ampoule. A needle valve device restricts flow through the outlet conduit.Type: ApplicationFiled: December 5, 2022Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Maribel Maldonado-Garcia, Cong Trinh, Mihaela A. Balseanu, Kevin Griffin, Ning Li, Zohreh Razavi Hesabi
-
Publication number: 20230097400Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 ? to less than or equal to 50 ?. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-? metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.Type: ApplicationFiled: December 7, 2022Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Srinivas Gandikota, Steven C.H. Hung, Mandyam Sriram, Jacqueline S. Wrench, Yixiong Yang, Yong Yang
-
Publication number: 20230102972Abstract: A processing system including an ion source having a plasma chamber to house a plasma, an extraction assembly, disposed along a side of the plasma chamber, and including at least one extraction aperture, and an antenna assembly extending through the plasma chamber. The antenna assembly may include a dielectric enclosure and a plurality of conductive antennas extending through the dielectric enclosure, the conductive antennas having respective gas ports formed therein for delivering a gas into the dielectric enclosure. The processing system may further include a temperature regulation system coupled to the conductive antennas and to the dielectric enclosure for monitoring a temperature of the dielectric enclosure and regulating the gas delivered to the conductive antennas for regulating the temperature of the dielectric enclosure.Type: ApplicationFiled: September 27, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Adam Calkins, Jeffrey E. Krampert
-
Publication number: 20230095095Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a lid plate seated on the chamber body. The lid plate may define a plurality of apertures. The systems may include a plurality of lid stacks. The systems may include a plurality of substrate supports. The systems may include a plurality of peripheral valves. Each peripheral valve may be disposed in one of the processing regions. Each peripheral valve may include a bottom plate coupled with the chamber body. The peripheral valve may include a bellow. The bellow may be coupled with the bottom plate. The peripheral valve may include a sealing ring having a body defining a central aperture. A bottom surface of the body may be coupled with the bellow. The body may define a recess having a diameter greater than that of a support plate of a substrate support.Type: ApplicationFiled: September 27, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Saravanakumar Natarajan, Ryan Pakulski
-
Publication number: 20230102558Abstract: Methods of reducing wafer bowing in 3D DRAM devices are described using a 3-color process. A plurality of film stacks are formed on a substrate surface, each of the film stacks comprises two doped SiGe layers having different dopant amounts and/or Si:Ge ratios and a doped silicon layer. 3D DRAM devices are also described.Type: ApplicationFiled: September 28, 2021Publication date: March 30, 2023Applicant: Applied Materials, Inc.Inventors: Arvind Kumar, Mahendra Pakala, Ellie Y. Yieh, John Tolle, Thomas Kirschenheiter, Anchuan Wang, Zihui Li
-
Patent number: 11612978Abstract: Interpenetrating polymer networks (IPNs) for a forming polishing pad for a semiconductor fabrication operation are disclosed. Techniques for forming the polishing pads are provided. In an exemplary embodiment, a polishing pad includes an interpenetrating polymer network formed from a free-radically polymerized material and a cationically polymerized material.Type: GrantFiled: June 9, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Uma Sridhar, Sivapackia Ganapathiappan, Ashwin Murugappan Chockalingam, Mayu Felicia Yamamura, Daniel Redfield, Rajeev Bajaj, Yingdong Luo, Nag B. Patibandla
-
Patent number: 11616195Abstract: Exemplary semiconductor structures for neuromorphic applications may include a first layer overlying a substrate material. The first layer may be or include a first oxide material. The structures may include a second layer disposed adjacent the first layer. The second layer may be or include a second oxide material. The structures may also include an electrode material deposited overlying the second layer.Type: GrantFiled: May 26, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Deepak Kamalanathan, Archana Kumar, Siddarth Krishnan
-
Patent number: 11615944Abstract: Embodiments of the present disclosure generally relate to a process chamber for conformal oxidation of high aspect ratio structures. The process chamber includes a liner assembly located in a first side of a chamber body and two pumping ports located in a substrate support portion adjacent a second side of the chamber body opposite the first side. The liner assembly includes a flow divider to direct fluid flow away from a center of a substrate disposed in a processing region of the process chamber. The liner assembly may be fabricated from quartz minimize interaction with process gases, such as radicals. The liner assembly is designed to reduce flow constriction of the radicals, leading to increased radical concentration and flux. The two pumping ports can be individually controlled to tune the flow of the radicals through the processing region of the process chamber.Type: GrantFiled: March 27, 2018Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Christopher S. Olsen, Eric Kihara Shono, Lara Hawrylchak, Agus Sofian Tjandra, Chaitanya A. Prasad, Sairaju Tallavarjula
-
Patent number: 11613808Abstract: Exemplary semiconductor processing methods may include forming a seasoning film on a heater of a processing chamber by a first deposition process. The method may include performing a hardmask deposition process in the processing chamber. The method may include cleaning the processing chamber by a first cleaning process. The method may include monitoring a gas produced during the first cleaning process. The method may include cleaning the processing chamber using a second cleaning process different from the first cleaning process. The method may also include monitoring the gas produced during the second cleaning process.Type: GrantFiled: October 22, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Jiheng Zhao, Abdul Aziz Khaja, Prashant Kumar Kulshreshtha, Fang Ruan
-
Patent number: 11615973Abstract: A substrate carrier is described that uses a proportional thermal fluid delivery system. In one example the apparatus includes a heat exchanger to provide a thermal fluid to a fluid channel of a substrate carrier and to receive the thermal fluid from the fluid channel, the thermal fluid in the fluid channel to control the temperature of the carrier during substrate processing. A proportional valve controls the rate of flow of thermal fluid from the heat exchanger to the fluid channel. A temperature controller receives a measured temperature from a thermal sensor of the carrier and controls the proportional valve in response to the measured temperature to adjust the rate of flow.Type: GrantFiled: October 17, 2019Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Phillip Criminale, Justin Phi, Dan A. Marohl, Sergio Fukuda Shoji, Brad L. Mays
-
Patent number: 11613812Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: September 3, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
-
Patent number: 11614685Abstract: Methods for patterning of multi-depth layers for the fabrication of optical devices are provided. In one embodiment, a method is provided that includes disposing a resist layer over a device layer disposed over a top surface of a substrate, the device layer having a first portion and a second portion, patterning the resist layer to form a first resist layer pattern having a plurality of first openings and a second resist layer pattern having a plurality of second openings, and etching exposed portions of the device layer defined by the plurality of first openings and the plurality of second openings, wherein the plurality of first openings are configured to form at least a portion of a plurality of first structures within the optical device, and the plurality of second openings are configured to form at least a portion of a plurality of second structures within the optical device.Type: GrantFiled: December 8, 2021Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Ludovic Godet, Chien-An Chen, Brian Alexander Cohen, Wayne McMillan, Ian Matthew McMackin
-
Patent number: 11615966Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may define a feature within the semiconductor substrate. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. A bias power may be applied to the substrate support from a bias power source. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.Type: GrantFiled: July 19, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Shishi Jiang, Praket Prakash Jha, Abhijit Basu Mallick
-
Publication number: 20230092346Abstract: Exemplary electroplating systems may include a vessel. The systems may include a paddle disposed within the vessel. The paddle may be characterized by a first surface and a second surface. The first surface of the paddle may be include a plurality of ribs that extend upward from the first surface. The plurality of ribs may be arranged in a generally parallel manner about the first surface. The paddle may define a plurality of apertures through a thickness of the paddle. Each of the plurality of apertures may have a diameter of less than about 5 mm. The paddle may have an open area of less than about 15%.Type: ApplicationFiled: September 17, 2021Publication date: March 23, 2023Applicant: Applied Materials, Inc.Inventors: Charles Sharbono, Paul R. McHugh, Gregory J. Wilson, John L. Klocke, Nolan L. Zimmerman
-
Publication number: 20230089089Abstract: Methods for aligning a processing chamber using a centering ring and processing chambers having the centering ring are describes. The method includes determining an average central position for the centering ring based on the concentricity of the centering with the support surfaces and adjusting average position of centering ring to a final position based on the average central position.Type: ApplicationFiled: September 21, 2021Publication date: March 23, 2023Applicant: Applied Materials, Inc.Inventors: Kwok Feng Wong, Rakesh Ramadas, Ashutosh Agarwal
