Abstract: A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

Abstract: Methods and systems for rating a current substrate support assembly based on impedance circuit electron flow are provided. Data associated with an amount of radio frequency (RF) power flowed through an electrical component of a current substrate support assembly during a current testing process performed for the current substrate support assembly is provided as input to a trained machine learning model. One or more outputs of the trained machine learning model are obtained. A measurement value for an electron flow across an impedance circuit of the current substrate support assembly is extracted from the one or more outputs. In response to a determination that the extracted measurement value for the electron flow satisfies an electron flow criterion, a first quality rating is assigned to the current substrate support assembly.

Abstract: Embodiments provided herein generally include apparatus, plasma processing systems, and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having three MOSFETs and three series-connected capacitors. The capacitors are connected across a DC power supply and, depending on the value of the capacitors, voltage across each of them may be varied. Each of the top two capacitors is followed by a diode. The bottom capacitor is connected to the ground. The drain terminal of each MOSFET is connected to higher potential end of the series connected capacitors. Each MOSFET is followed by a diode and the cathode ends of the diodes are connected together. An electrode is connected between the common cathode and ground.

Abstract: Exemplary substrate processing chambers may include a chamber body defining a processing region. The chambers may include a backing plate disposed atop the chamber body, a diffuser above the processing region and supported by the backing plate, and a cooling frame disposed between the backing plate and the diffuser. The cooling frame may be coupled with the diffuser. The cooling frame may include a body having one or more fluid inlets and one or more fluid outlets. The body may define an opening. The fluid inlets may be in fluid communication with the one or more fluid outlets via one or more fluid lumens that each extend at least partially about a periphery of the opening. The fluid inlets may be in fluid communication with one or more fluid supply lumens. The fluid outlets may be in fluid communication with one or more fluid return lumens.

Abstract: Methods of manufacturing memory devices are provided. The method comprises forming a first epitaxial layer on a substrate; and forming a memory array on the first epitaxial layer, the memory array comprising a memory stack of alternating layers of an oxide material and a metal material on the first epitaxial layer, at least one memory cell extending from the first epitaxial layer through the memory stack, and a slit filled with a fill material adjacent to the at least one memory cell.

Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region, forming plasma effluents of the oxygen-containing precursor, and contacting the silicon-containing material with the plasma effluents of the oxygen-containing precursor to form a silicon-and-oxygen-containing material.

Abstract: A plasma processing apparatus. The plasma processing apparatus may include a plasma chamber, to define a plasma therein, and an extraction aperture, arranged along a first side of the plasma chamber, the extraction aperture to define an ion beam extracted therethrough. The plasma processing apparatus may further include a residence time tuning assembly, coupled to a portion of the plasma chamber, different from the first side, wherein the residence time tuning assembly comprises a pumping duct, connected to the plasma chamber on a first end, and defining a pumping path for extracting a gaseous species directly from the plasma chamber, separately from the extraction aperture.

Abstract: Exemplary semiconductor processing methods may include flowing a fluorine-containing precursor and a hydrogen-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include forming plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor and contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor to form a fluorinated portion of the stacked layers. The methods may include flowing an inert precursor into the processing region, forming plasma effluents of the inert precursor, and contacting the substrate with the plasma effluents of the inert precursor to remove the fluorinated portion of the stacked layers.

Abstract: Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or damaging other layers. In some embodiments, the barrier layer is treated with microwave radiation. The treatment process can be implemented in a processing tool including a modular high-frequency emission source.

Abstract: Exemplary methods of OLED device processing are described. The methods may include forming an anode on a substrate. Forming the anode may include forming a first metal oxide material on the substrate, forming a metal layer over the first metal oxide material, forming a protective barrier over the metal layer, and forming a second metal oxide material over the amorphous protection material. The protective barrier may be an amorphous protection material overlying the metal layer.

Abstract: Methods of depositing thin films for an electronic device, for example a semiconductor device include applying a first pulsed plasma with or without a reactant and a second continuous plasma with a reactant.

Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. A process for removal of germanium oxide is also disclosed.

Abstract: Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.

Abstract: A physical vapor deposition system includes a deposition chamber, a support to hold a substrate in the deposition chamber, a target in the chamber, a power supply configured to apply power to the target to generate a plasma in the chamber to sputter material from the target onto the substrate to form a piezoelectric layer on the substrate, and a controller configured to cause the power supply to alternate between deposition phases in which the power supply applies power to the target and cooling phases in which power supply does not apply power to the target. Each deposition phase lasts at least 30 seconds and each cooling phase lasts at least 30 seconds.

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

Abstract: The present disclosure generally relates to a substrate support that includes a body having a substrate receiving surface, the body comprising a dielectric material. The body also includes a first foil embedded in the body below the substrate receiving surface. The body also includes an electrically conductive mesh embedded in the body below the first foil. The body also includes a center tap structure formed in a bottom surface of the body that is in electrical communication with the mesh.

Abstract: A method and apparatus for biasing regions of a substrate in a plasma assisted processing chamber are provided. Biasing of the substrate, or regions thereof, increases the potential difference between the substrate and a plasma formed in the processing chamber thereby accelerating ions from the plasma towards the active surfaces of the substrate regions. A plurality of bias electrodes herein are spatially arranged across the substrate support in a pattern that is advantageous for managing uniformity of processing results across the substrate.

Abstract: Deposition methods and apparatus for conditioning a process kit to increase process kit lifetime are described. A nitride film formed on a process kit is exposed to conditioning process comprising nitrogen and hydrogen radicals to condition the nitride film to decrease particulate contamination from the process kit.

Abstract: A method includes performing ion beam sputtering with ion assisted deposition to deposit a protective layer on a surface of a body. The protective layer is a plasma resistant rare earth-containing film of a thickness less than 1000 ?m. The porosity of the protective layer is below 1%. The plasma resistant rare earth-containing film consists of 40 mol % to less than 100 mol % of Y2O3, over 0 mol % to 60 mol % of ZrO2, and 0 mol % to 9 mol % of Al2O3.