Abstract: An apparatus for cyclical depositing of thin films on semiconductor substrates, comprising a process chamber having a gas distribution system with separate paths for process gases and an exhaust system synchronized with operation of valves dosing the process gases into a reaction region of the chamber.

Abstract: Methods and apparatus are provided for managing movement of small lots between processing tools within an electronic device manufacturing facility. In some embodiments, a number of priority lots to be processed is determined and an equivalent number of carrier storage locations are reserved at a substrate loading station of a processing tool. The number of reserved carrier storage locations are made available either by processing and advancing occupying non-priority lots and/or moving unprocessed occupying non-priority lots from the substrate loading station. Priority lots are then transferred to the reserved carrier storage locations. Other embodiments are provided.

Abstract: A thin layer of silicon is deposited within a high aspect ratio feature to provide a template for selective deposition of oxide therein. In accordance with one embodiment, amorphous silicon is deposited within a shallow trench feature overlying an oxide liner grown therein. After exposure to sputtering to remove the amorphous silicon from outside of the trench, oxide is selectively deposited over the amorphous silicon to fill the trench from the bottom up without voids, thereby creating a shallow trench isolation (STI) structure. Deposition of the amorphous silicon or other silicon containing layers allows the selective oxide deposition step to be integrated with a thermally-grown oxide trench liner.

Abstract: A substrate processing system is provided. A housing defines a processing chamber. A plasma-generating system is operatively coupled to the processing chamber. A substrate support member is disposed within the processing chamber and configured to hold a substrate during substrate processing. A ceramic insert is disposed over the substrate support member such that the ceramic insert is disposed between the substrate support member and the substrate during substrate processing. A gas-delivery system is configured to introduce gases into the processing chamber. A controller controls the plasma-generating system and the gas-delivery system.

Abstract: The present invention provides a novel distributed factory system framework including a novel factory automation lifecycle (200) having lifecycle activities for SW developing and integrating (210), installing and administrating (220), factory modeling (230), manufacturing planning (240), manufacturing controlling, monitoring and tracking (250) and analyzing of manufacturing results (260). The factory lifecycle comprises framework components. The distributed factory system framework also includes application components and building blocks. The framework components are adapted to for managing the application components, while the application components are utilized to provide instructions for managing a process such as a wafer fab. The building blocks are adapted for forming or modifying framework and application components. The distributed factory system framework provides computer implemented methods for integrating processing systems and facilitates process and equipment changes.

Abstract: A method of forming a silicon nitride film is described. According to the present invention, a silicon nitride film is deposited by thermally decomposing a silicon/nitrogen containing source gas or a silicon containing source gas and a nitrogen containing source gas at low deposition temperatures (e.g., less than 550° C.) to form a silicon nitride film. The thermally deposited silicon nitride film is then treated with hydrogen radicals to form a treated silicon nitride film.

Abstract: System for scanning a surface, comprising a light source producing an illuminating light beam; an objective lens assembly, located between the light source and the surface; a plurality of interchangeable telescopes, a selected one of the interchangeable telescopes being located between the light source and the objective lens assembly; and at least one light detector, wherein at least one of the light detectors detects at least a portion of a reflected light beam, reflected from the surface and received from the selected telescope.

Abstract: A method and apparatus for process integration in manufacture of a gate structure of a field effect transistor are disclosed. The method includes assembling an integrated substrate processing system having a metrology module and a vacuumed processing platform to perform controlled and adaptive plasma processes without exposing the substrate to a non-vacuumed environment.

Abstract: A method of fabricating a dual damascene interconnect structure uses a very high frequency high-density plasma and selectively controlled substrate bias for in-situ etching a trench above a via hole of the interconnect structure and a barrier layer between the via hole and underlying conductive layer.

Abstract: A system for concurrent inkjet printing and defect inspection is provided. The system includes at least one print head adapted to deposit ink on a substrate, at least one imaging device adapted to scan the substrate, and a controller adapted to receive image data scanned by the imaging device during printing, determine if there are any printing defects on the substrate utilizing the processed image data, and transmit a control signal indicating a disposition of the substrate. The imaging device is adapted to scan the substrate during each print pass. Numerous other aspects are also disclosed.

Abstract: A method for measuring leakage through a dielectric layer of a semiconductor device on a wafer, including irradiating the dielectric layer with a charged particle beam having a beam current. The irradiation generates a wafer current having a relation to the beam current in a selected range of the beam current. The method further includes determining a boundary value of the beam current at which the relation is not satisfied, and determining a leakage current through the dielectric layer in response to the boundary value.

Abstract: A small magnet assembly is scanned in a retrograde planetary or epicyclic path about the back of a target being plasma sputtered including an orbital rotation about the center axis of the target and a planetary rotation about another axis rotating about the target center axis. The magnet assembly passes through the target center, thus allowing full target coverage. A properly chosen ratio of the two rotations about respective axes produces a much slower magnet velocity near the target periphery than at the target center. A geared planetary mechanism includes a rotating drive plate, a fixed center gear, and an idler and a follower gear rotatably supported in the drive plane supporting a cantilevered magnet assembly on the side of the drive plate facing the target. A belted planetary mechanism includes a fixed center capstan, a follower pulley supporting the magnet assembly, and a belt wrapped around them.

Abstract: In a first aspect, a substrate loading station is served by a conveyor which continuously transports substrate carriers. A substrate carrier handler that is part of the substrate loading station operates to exchange substrate carriers with the conveyor while the conveyor is in motion. A carrier exchange procedure may include moving an end effector of the substrate carrier handler at a velocity that substantially matches a velocity of the conveyor. A balancing mass is coupled directly or indirectly to a frame on which the substrate carrier handler is mounted and is adapted to accelerate in a direction opposite to the direction of end effector acceleration, as the end effector accelerates. Thus, inertial loads may be substantially balanced, and frame vibration reduced, despite potentially high rates of acceleration. Numerous other aspects are provided.

Abstract: A method for discharging a sample, the method includes: determining whether to discharge a negatively charged area of a sample or to discharge a positively charged area of the sample; and injecting gas, via an electrode and gas supply component, or setting a first electrode to a first voltage and set the electrode and gas supply component to a second voltage, in response to the determination. A system including: a first electrode adapted to be set to at least a first potential; an electrode and gas supply component, adapted to be set to at least a second potential and to selectively supply gas to a vicinity of the sample; wherein at least one out of the first electrode and the electrode and gas supply component are positioned close to the sample.

Abstract: A planar integrated circuit includes a semiconductor substrate having a substrate surface and a trench in the substrate, a waveguide medium in the trench having a top surface and a light propagation axis, the trench having a sufficient depth for the waveguide medium to be at or below said substrate surface, and at least one Schottky barrier electrode formed on the top surface of said waveguide medium and defining a Schottky barrier detector consisting of the electrode and the portion of the waveguide medium underlying the Schottky barrier electrode, at least the underlying portion of the waveguide medium being a semiconductor and defining an electrode-semiconductor interface parallel to the light propagation axis so that light of a predetermined wavelength from said waveguide medium propagates along the interface as a plasmon-polariton wave.

Abstract: A method and apparatus for automatic determination of semiconductor plasma chamber matching a source of fault are provided. Correlated plasma attributes are measured for process used for calibration both in a chamber under study and in a reference chamber. Principal component analysis then is performed on the measured correlated attributes so as to generate steady principal components and transitional principal components; and these principal components are compared to reference principal components associated with a reference chamber. The process used for calibration includes a regular plasma process followed by a process perturbation of one process parameter. Similar process perturbation runs are conducted several times to include different perturbation parameters. By performing inner products of the principal components of chamber under study and the reference chamber, matching scores can be reached. Automatic chamber matching can be determined by comparing these scores with preset control limits.

Abstract: A method and apparatus for processing a substrate includes a reactor chamber having a chamber wall and containing a substrate support. An electrode overlies the substrate and is spaced apart from the substrate support. One or more plasma sources maintains plasma in the reactor in one or more toroidal paths using a first frequency. One or more RF power generators supply power to the electrode at a second frequency that is different from the first frequency.

Abstract: A process of selectively etching a sacrificial light absorbing material (SLAM) over a dielectric material, such as carbon doped oxide, on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a hydrofluorocarbon gas, an optional hydrogen-containing gas, an optional fluorine-rich fluorocarbon gas, a nitrogen gas, an oxygen gas, and an inert gas. The process could provide a SLAM to a dielectric material etching selectivity ratio greater than 10:1.

Abstract: A method of fabricating a detector that involves: forming a trench in a substrate, the substrate having an upper surface; forming a first doped semiconductor layer on the substrate and in the trench; forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, the second semiconductor layer having a conductivity that is less than the conductivity of the first doped semiconductor layer; forming a third doped semiconductor layer on the second semiconductor layer and extending into the trench; removing portions of the first, second and third layers that are above a plane defined by the surface of the substrate to produce an upper, substantially planar surface and expose an upper end of the first doped semiconductor layer in the trench; forming a first electrical contact to the first semiconductor doped layer; and forming a second electrical contact to the third semiconductor doped layer.

Abstract: A method for controlling a process for fabricating integrated devices on a substrate. The method includes ex-situ and in-situ measurements of pre-etch and post-etch dimensions for structures formed on the substrate and uses the results of the measurements to adjust process recipes and to control the operational status of etch and external substrate processing equipment. In one exemplary application, the method is used during a multi-pass process for fabricating a capacitive structure of a trench capacitor.