Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The processing region may be defined between a faceplate and a substrate support on which the semiconductor substrate is seated. The methods may include forming a treatment plasma within the processing region of the semiconductor processing chamber. The treatment plasma may be formed at a first power level from a first power source. A second power may be applied to the substrate support from a second power source at a second power level. The methods may include densifying the flowable film within the feature defined within the semiconductor substrate with plasma effluents of the treatment plasma.

Abstract: Embodiments provided herein generally relate to methods of modifying portions of layer stacks. The methods include forming deep trenches and narrow trenches, such that a desirably low voltage drop between layers is achieved. A method of forming a deep trench includes etching portions of a flowable dielectric, such that a deep metal contact is disposed below the deep trench. The deep trench is selectively etched to form a modified deep trench. A method of forming a super via includes forming a super via trench through a second layer stack of a layer superstack. The methods disclosed herein allow for decreasing the resistance, and thus the voltage drop, of features in a semiconductor layer stack.

Abstract: Embodiments herein provide plasma processing chambers and methods configured for fine-tuning and control over a plasma sheath formed during the plasma-assisted processing of a semiconductor substrate. Embodiments include a sheath tuning scheme, including plasma processing chambers and methods, which can be used to tailor one or more characteristics of a plasma sheath formed between a bulk plasma and a substrate surface. Generally, the sheath tuning scheme provides differently configured pulsed voltage (PV) waveforms to a plurality of bias electrodes embedded beneath the surface of a substrate support in an arrangement where each of the electrodes can be used to differentially bias a surface region of a substrate positioned on the support. The sheath tuning scheme disclosed herein can thus be used to adjust and/or control the directionality, and energy and angular distributions of ions that bombard a substrate surface during a plasma-assisted etch process.

Abstract: A mask frame support unit includes a case, a protruding body extending below the case, and a station having a flat head disposed above the case. The protruding body includes a tapered region and a cylindrical region. The tapered region includes a first end having a first diameter coupled to the case and comprising a second end having a second diameter opposite the first end. The second diameter is less than the first diameter, and the tapered region is coupled to the cylindrical region at the second end. The case houses a number of components including an upper receiving plate in contact with the station, a lower receiving plate disposed underneath the upper receiving plate, a flat head unit movement support mechanism disposed between the lower receiving plate and the body, and a centering component.

Abstract: A robotic object handling system comprises a robot arm, an image sensor, a first station, and a computing device. The computing device is to cause the robot arm to pick up an object on an end effector, cause the image sensor to generate sensor data of the object, determine at least one of (i) a rotational error of the object or (ii) a positional error of the object based on the sensor data, cause an adjustment to the robot arm to approximately remove at least one of the rotational error or the positional error, and cause the robot arm to place the object at the first station without at least one of the rotational error or the positional error.

Abstract: Embodiments described herein relate to a system, software, and a method of using the system to edit a design to be printed by a lithography system. The system and methods utilize a server of a maskless lithography device. The server includes a memory. The memory includes a virtual mask file. The virtual mask file includes cells and the cells include sub-cells that form one or more polygons. The server further includes a controller coupled to the memory. The controller is configured to receive a replacement table. The replacement table includes instructions to replace the cells of the virtual mask file. The controller is further configured to replace the cells with replacement cells according to the replacement table to create an edited virtual mask file.

Abstract: A factory interface for an electronic device manufacturing system can include a load lock disposed within the interior volume of a factory interface and a factory interface robot disposed within the interior volume of the factory interface. The factory interface robot can be configured to transfer substrates between a first set of substrate carriers and the first load lock. The factory interface robot can comprise a vertical tower, a plurality of links, and an end effector.

Abstract: A platform is of a side storage pod. The platform includes an upper surface and kinematic pins extending from the upper surface within a chamber of the side storage pod to engage a lower surface of a side storage container in the chamber to level the side storage container in the chamber.

Abstract: A wafer processing device may include a wafer exchanger including two or more blades, each of the two or more blades may be configured to receive a wafer, the two or more blades may be rotatable about an axis on a single horizontal plane, and the two or more blades may be movable between at least a load cup and a robot access location; wherein the load cup may include a wafer station that is vertically moveable relative a blade located in the load cup and may be configured to remove a wafer from a blade located in the load cup and place a wafer on a blade located in the load cup. Other devices, load cups and methods are also disclosed herein.

Abstract: Methods of manufacturing memory devices are provided. The methods improve the quality of a selectively deposited silicon-containing dielectric layer. The method comprises selectively depositing a silicon-containing dielectric layer in a recessed region of a film stack. The selectively deposited silicon-containing dielectric layer is then exposed to a high-density plasma and annealed at a temperature greater than 800 ° C. to provide a silicon-containing dielectric film having a wet etch rate of less than 4 ?/min.

Abstract: Embodiments of the present disclosure generally provide apparatus for collecting and reuse polishing fluids and methods related thereto. In particular, the apparatus and methods provided herein feature a polishing fluid collection system used to collect and reuse polishing fluids dispensed during the chemical mechanical polishing (CMP) of a substrate in an electronic device manufacturing process. In one embodiment, a polishing fluid catch basin assembly includes a catch basin sized to surround at least a portion of a polishing platen and to be spaced apart therefrom. The catch basin features an outer wall, an inner wall disposed radially inward of the outer wall, and a base portion connecting the inner wall to the outer wall. The outer wall, the inner wall, and the base portion collectively define a trough. A radially inward facing surface of the inner wall is defined by an arc radius which is greater than a radius of the polishing platen the catch basin is sized to surround.

Abstract: Embodiments described herein generally relate to a processing system and a method of delivering a reactant gas. The processing system includes a substrate support system, an injection cone, and an intake. The injection cone includes a linear rudder. The linear rudder is disposed such that the flow of reactant gas through the injection cone results in film growth on a specific portion of a substrate. The method includes flowing the gas through the injection cone and delivering the gas onto the substrate below. The localization of the reactant gas, allows for film growth on a specific portion of the substrate.

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.

Abstract: An exciter for a high frequency resonator. The exciter may include an exciter coil inner portion, extending along an exciter axis, an exciter coil loop, disposed at a distal end of the exciter coil inner portion. The exciter may also include a drive mechanism, including at least a rotation component to rotate the exciter coil loop around the exciter axis.

Abstract: A polishing apparatus includes a support configured to receive and hold a substrate in a plane, a polishing pad affixed to a cylindrical surface of a rotary drum, a first actuator to rotate the drum about a first axis parallel to the plane, a second actuator to bring the polishing pad on the rotary drum into contact with the substrate, and a port for dispensing a polishing liquid to an interface between the polishing pad and the substrate.

Abstract: Embodiments of the present disclosure generally relate to lithography systems. More particularly, embodiments of the present disclosure relate to a method, a system, and a software application for a lithography process to control transmittance rate of write beams and write gray tone patterns in a single exposure operation. In one embodiment, a plurality of shots are provided by an image projection system in a lithography system to a photoresist layer. The plurality of shots exposes the photoresist layer to an intensity of light emitted from the image projection system. The local transmittance rate of the plurality of shots within an exposure area is varied to form varying step heights in the exposure area of the photoresist layer.

Abstract: Semiconductor manufacturing processing chambers with recycling capability and methods of recycling a chemical precursor are described. The processing chamber comprises a chamber body with a substrate support. The substrate support is spaced form the chamber lid to create a process region. A gas inlet provides a flow of gas to the process region and a recirculation plenum is in fluid communication with the process region. At least one fast-acting valve is connected to the recirculation plenum with a recirculation inlet line. A recirculation housing is in fluid communication with the recirculation inlet line and a recirculation outlet line. A recirculation piston valve allows a gas within the process chamber to be recycled into the original precursor container or into a different container for reuse.

Abstract: Disclosed herein are approaches for forming a 3-D dynamic random-access memory device having reduced floating body effect. In one example, a method may include forming a plurality of layers stacked in a first direction, the plurality of layers including a gate layer formed over a first oxide layer, and a source/drain (S/D) layer between a set of gate oxide layers. The set of gate oxide layers may be formed over the gate layer, and the S/D layer may include a source and a drain on opposite sides of a body. The method may further include forming a doped layer over the source and the drain.

Abstract: Apparatuses and methods for loading and unloading substrates from a semiconductor manufacturing processing chamber are described. Some embodiments advantageously provide improved lift assemblies (e.g., lift ring designs) for centering lift pins in semiconductor processing chambers by allowing for unconstrained translation of the lift pins in the x-y plane. Some embodiments advantageously prevent lift pin tilting. Some embodiments advantageously provide a seal between the top end portion of the lift pins and the openings in the top surface. The lift assemblies include a ring-shaped body, a plurality of movable blocks configured to cooperatively interact with one or more openings of the ring-shaped body, and at least one ball bearing. The movable blocks include at least one indentation in a top surface of a bottom portion of the block and a complementary sized ball bearing in the at least one indentation.

Abstract: An electrostatic clamp system may include a conductive base; a ceramic body, having an inner side that is attached to the conductive base, and an outer side to face a substrate, the ceramic body including an electrode assembly; and a charge control assembly, the charge control assembly defining an electrically conductive structure that is isolated from the electrode assembly and extends through the conductive base to an upper surface of the outer side of the ceramic body.