Patents Assigned to Applied Materials
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Patent number: 12111110Abstract: A heat exchanger for abating compounds produced in semiconductor processes is presented. When hot effluent flows into the heat exchanger, a coolant can be flowed to walls of a fluid heat exchanging surface within the heat exchanger. The heat exchanging surface can include a plurality of channel regions which creates a multi stage cross flow path for the hot effluent to flow down the heat exchanger. This flow path forces the hot effluent to hit the cold walls of the fluid heat exchanging surface, significantly cooling the effluent and preventing it from flowing directly into the vacuum pumps and causing heat damage. The heat exchanger can be created by sequentially depositing layers of thermally conductive material on surfaces using 3-D printing, creating a much smaller footprint and reducing costs.Type: GrantFiled: February 24, 2022Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventor: Manoj A. Gajendra
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Patent number: 12111341Abstract: Embodiments of the disclosure include an electric field measurement system that includes a first light source, a first light sensor configured to receive electromagnetic energy transmitted from the first light source, an electro-optic sensor, and a controller. The electro-optic sensor may include a package comprising a first electro-optic crystal disposed within a body; and at least one optical fiber. The optical fiber is configured to transmit electromagnetic energy transmitted from the first light source to a surface of the first electro-optic crystal, and transmit at least a portion of the electromagnetic energy transmitted to the surface of the first electro-optic crystal and subsequently passed through at least a portion of the first electro-optic crystal to the first light sensor that is configured to generate a signal based on an attribute of the electromagnetic energy received by the first light sensor from the at least one optical fiber.Type: GrantFiled: October 5, 2022Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Yue Guo, Yang Yang, Kartik Ramaswamy, Fernando Silveira, A N M Wasekul Azad
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Patent number: 12113020Abstract: Exemplary semiconductor processing methods include forming a via in a semiconductor structure. The via may be defined in part by a bottom surface and a sidewall surface formed in the semiconductor structure around the via. The methods may also include depositing a tantalum nitride (TaN) layer on the bottom surface of the via. In embodiments, the TaN layer may be deposited at a temperature less than or about 200° C. The methods may still further include depositing a titanium nitride (TiN) layer on the TaN layer. In embodiments, the TiN layer may be deposited at a temperature greater than or about 300° C. The methods may additionally include depositing a fill-metal on the TiN layer in the via. In embodiments, the metal may be deposited at a temperature greater than or about 300° C.Type: GrantFiled: February 24, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Ryan Scott Smith, Kai Wu, Nicolas Louis Gabriel Breil
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Patent number: 12112969Abstract: Described are apparatus and methods for processing a semiconductor wafer so that the wafer remains in place during processing. The wafer is subjected to a pressure differential between the top surface and bottom surface so that sufficient force prevents the wafer from moving during processing, the pressure differential generated by applying a decreased pressure to the back side of the wafer.Type: GrantFiled: August 16, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Joseph Yudovsky, Kaushal Gangakhedkar
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Patent number: 12110589Abstract: Methods comprising forming a metal oxide film by atomic layer deposition using water as an oxidant are described. The metal oxide film is exposed to a decoupled plasma comprising one or more of He, H2 or O2 to lower the wetch etch rate of the metal oxide film.Type: GrantFiled: August 1, 2018Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Tatsuya E. Sato, Wei Liu, Li-Qun Xia
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Patent number: 12112951Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which comprise an integrated dipole region to meet reduced thickness and lower thermal budget requirements. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, and a dipole region having an interfacial layer, a metal film substantially free of non-metal atoms on the interfacial layer, and a high-? dielectric layer on the metal film. In some embodiments, the dipole region of the electronic devices comprises an interfacial layer, a high-? dielectric layer on the interfacial layer, and a metal film on the high-? dielectric layer. In some embodiments, the methods comprise annealing the substrate to drive particles of metal from the metal film into one or more of the interfacial layer or the high-? dielectric layer.Type: GrantFiled: February 17, 2022Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Yixiong Yang, Steven C. H. Hung, Tianyi Huang, Seshadri Ganguli
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Patent number: 12112971Abstract: Exemplary support assemblies may include a top puck characterized by a first surface and a second surface opposite the first surface. The top puck may define a recessed ledge at an outer edge of the first surface of the top puck. The assemblies may include a cooling plate coupled with the top puck adjacent the second surface of the top puck. The assemblies may include a back plate coupled with the top puck about an exterior of the top puck. The back plate may at least partially define a volume with the top puck. The cooling plate may be housed within the volume. The assemblies may include a heater disposed on the recessed ledge of the top puck. The assemblies may include an edge ring seated on the heater and extending about the top puck. The edge ring may be maintained free of contact with the top puck.Type: GrantFiled: March 12, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventor: Ian Bensco
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Patent number: 12114488Abstract: Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.Type: GrantFiled: May 5, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Yong Yang, Kunal Bhatnagar, Srinivas Gandikota, Seshadri Ganguli, Jose Alexandro Romero, Mandyam Sriram, Mohith Verghese, Jacqueline S. Wrench, Yixiong Yang
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Patent number: 12112890Abstract: Magnet assemblies comprising a housing with a top plate each comprising aligned openings are described. The housing has a bottom ring and an annular wall with a plurality of openings formed in the bottom ring. The top plate is on the housing and has a plurality of openings aligned with the plurality of openings in the bottom ring of the housing. The magnet assembly may also include a non-conducting base plate and/or a conductive cover plate. Methods for using the magnet assembly and magnetic field tuning are also described.Type: GrantFiled: September 17, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Borui Xia, Anthony Chih-Tung Chan, Shiyu Yue, Wei Lei, Aravind Miyar Kamath, Mukund Sundararajan, Rongjun Wang, Adolph Miller Allen
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Patent number: 12110584Abstract: Transition metal dichalcogenide films and methods for depositing transition metal dichalcogenide films on a substrate are described. Methods for converting transition metal oxide films to transition metal dichalcogenide films are also described. The substrate is exposed to a precursor and a chalcogenide reactant to form the transition metal dichalcogenide film. The exposures can be sequential or simultaneous.Type: GrantFiled: June 28, 2021Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Chandan Das, Susmit Singha Roy, Bhaskar Jyoti Bhuyan, John Sudijono, Abhijit Basu Mallick, Mark Saly
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Publication number: 20240332028Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the semiconductor processing chamber. The methods may include forming a silicon-containing material on the substrate. The silicon-containing material may be characterized by a stress of greater than or about ?200 MPa. The methods may include annealing the substrate at a temperature of greater than or about 700° C.Type: ApplicationFiled: March 29, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Supriya Ghosh, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Publication number: 20240332006Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor to the processing region. The methods may include generating plasma effluents of the silicon-containing precursor and plasma effluents of the hydrogen-containing precursor in the processing region. The plasma effluents may be generated at a frequency greater than 15 MHz. The methods may include depositing a silicon-containing material on the substrate.Type: ApplicationFiled: March 29, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Tianyang Li, Jisung Park, Xinhai Han, Woongsik Nam, Deenesh Padhi
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Publication number: 20240327983Abstract: Processing chambers for forming metal-containing precursors and deposition of pure metal films are disclosed. Also disclosed are deposition methods that include forming a metal-containing precursor and depositing the metal-containing precursor on a substrate to form a metal film in a single processing chamber.Type: ApplicationFiled: March 19, 2024Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventor: Andrea Leoncini
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Publication number: 20240331999Abstract: Exemplary semiconductor processing methods may include providing a substrate to a processing region of a semiconductor processing chamber. The substrate may include an alternating stack of materials. A feature may extend through the alternating stack of materials. One material of the alternating stack of materials may include a silicon-containing material. A native oxide material may be disposed on at least a portion of exposed surfaces of the silicon-containing material. The methods may include performing a pre-clean treatment on the substrate. The methods may include providing a fluorine-containing precursor to the processing region. The methods may include contacting the substrate with the fluorine-containing precursor, wherein the contacting removes native oxide from the silicon-containing material.Type: ApplicationFiled: February 15, 2024Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Ying-Bing Jiang, Avgerinos V. Gelatos, Joung Joo Lee, Bencherki Mebarki, Xianmin Tang, In Seok Hwang, Zhijun Chen
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Publication number: 20240332009Abstract: Exemplary methods of semiconductor processing may include forming a layer of silicon nitride on a semiconductor substrate. The layer of silicon nitride may be characterized by a first roughness. The methods may include performing a post-deposition treatment on the layer of silicon nitride. The methods may include reducing a roughness of the layer of silicon nitride such that the layer of silicon nitride may be characterized by a second roughness less than the first roughness.Type: ApplicationFiled: March 26, 2024Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Qixin Shen, Chuanxi Yang, Hang Yu, Deenesh Padhi, Prashanthi Para, Miguel S. Fung, Rajesh Prasad, Fenglin Wang, Shan Tang, Kyu-Ha Shim
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Publication number: 20240332072Abstract: Described are methods of forming a protective capping layer on a metal layer of a semiconductor substrate. A metal layer is deposited using a metal precursor and a reactant pulsed to form the metal layer having a reactive surface. The number of cycles can be in a range of from 1 to 10 cycles or from 2 to 5 cycles or from 2 to 100 cycles. The metal layer is then exposed to a long chain precursor (e.g., primary amines, alcohols, thiols, phosphines, selenols) and a metal precursor to form a protective capping layer on the metal layer. The number of cycles can be in a range of from 1 to 10 cycles or from 2 to 5 cycles, depending upon the desired thickness of the protective capping layer.Type: ApplicationFiled: March 22, 2024Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventor: Andrea Leoncini
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Publication number: 20240332005Abstract: Embodiments include semiconductor processing methods to form dielectric films on semiconductor substrates are described. The methods may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include providing an inert precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor. The methods may include depositing a silicon-containing material on the substrate.Type: ApplicationFiled: March 29, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Wenhui Li, Bo Xie, Li-Qun Xia, Prayudi Lianto, Shanshan Yao
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Publication number: 20240331975Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature within the substrate. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming plasma effluents of the hydrogen-containing precursor. The methods may include etching the silicon-containing material from a sidewall of the feature within the substrate with the plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining silicon-containing material within the feature defined within the substrate.Type: ApplicationFiled: March 31, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Shuchi Sunil Ojha, Soham Asrani, Praket Prakash Jha, Bhargav S. Citla, Jingmei Liang
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Publication number: 20240332027Abstract: Exemplary methods of semiconductor processing may include providing a first fluorine-containing precursor to a remote plasma system of a semiconductor processing chamber. The methods may include generating plasma effluents of the first fluorine-containing precursor in the remote plasma system. The methods may include providing plasma effluents of the first fluorine-containing precursor to a processing region of the semiconductor processing chamber. The methods may include providing a second fluorine-containing precursor to the processing region of the semiconductor processing chamber. A substrate including alternating layers of material may be disposed within the processing region. The alternating layers of material may include a silicon-and-germanium-containing material. The methods may include contacting the substrate with the plasma effluents of the first fluorine-containing precursor and with the second fluorine-containing precursor.Type: ApplicationFiled: March 29, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Anchuan Wang, Jiayin Huang, Kalpana Suen
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Patent number: D1045924Type: GrantFiled: January 9, 2024Date of Patent: October 8, 2024Assignee: Applied Materials, Inc.Inventors: Sidharth Bhatia, Zhaozhao Zhu, Jeffrey Yat Shan Au, Shawn Levesque, Michael Howells, Raja Sekhar Jetti