Abstract: Simulated aerial images for an optical system are made by forming a reference aerial image of a first mask used in connection with the optical system, and then capturing and processing the reference aerial image to generate a set of expansion functions representative of the optical system. The expansion functions account for aberrations and misalignment of the optical system, as well as any aberrations or other defects of a camera therein. The expansion functions are then used to compute simulated aerial images of other masks projected by the optical system. Thus, the expansion functions implicitly represent a calibration of the optical system for purposes of aerial image simulation, obviating the need for direct measurement of the actual aberrations and misalignment. Hence, a simulated aerial image of a second mask for the optical system can be computed by applying the expansion functions to a design of the second mask.

Abstract: A method for fabricating a semiconductor device with adjacent PMOS and NMOS devices on a substrate includes forming a PMOS gate electrode with a PMOS hardmask on a semiconductor substrate with a PMOS gate dielectric layer in between, forming an NMOS gate electrode with an NMOS hardmask on a semiconductor substrate with an NMOS gate dielectric layer in between, forming an oxide liner over a portion of the PMOS gate electrode and over a portion of the NMOS gate electrode, forming a lightly doped N-Halo implant, depositing a nitride layer over the oxide liner, depositing photoresist on the semiconductor substrate in a pattern that covers the NMOS device, etching the nitride layer from the PMOS device, wherein the etching nitride layer leaves a portion of the nitride layer on the oxide liner, etching semiconductor substrate to form a Si recess, and depositing SiGe into the Si recesses, wherein the SiGe and the nitride layer enclose the oxide liner.

Abstract: Embodiments of the invention relate generally to an ultraviolet (UV) cure chamber for curing a dielectric material disposed on a substrate and to methods of curing dielectric materials using UV radiation. A substrate processing tool according to one embodiment comprises a body defining a substrate processing region; a substrate support adapted to support a substrate within the substrate processing region; an ultraviolet radiation lamp spaced apart from the substrate support, the lamp configured to transmit ultraviolet radiation to a substrate positioned on the substrate support; and a motor operatively coupled to rotate at least one of the ultraviolet radiation lamp or substrate support at least 180 degrees relative to each other.

Abstract: A semiconductor device includes a substrate having regions filled with an additive that forms a source/drain for a MOS device, a gate dielectric layer deposited over the substrate, the gate dielectric layer electrically isolates the substrate from subsequently deposited layers, a gate electrode deposited over the gate dielectric layer, an oxide liner formed along laterally opposite sidewalls of the gate electrode, a nitride layer formed along the oxide liner extending above the gate electrode, and wherein the additive and the nitride layer enclose the gate electrode.

Abstract: Methods and apparatus for providing a chemical mechanical polishing pad. The pad includes a polishing layer having a top surface and a bottom surface. The pad includes an aperture having a first opening in the top surface and a second opening in the bottom surface. The top surface is a polishing surface. The pad includes a window that includes a first portion made of soft plastic and a crystalline or glass like second portion. The window is transparent to white light. The window is situated in the aperture so that the first portion plugs the aperture and the second portion is on a bottom side of the first portion, wherein the first portion acts a slurry-tight barrier.

Abstract: In determining an endpoint of etching a substrate, light that is directed toward the substrate is reflected from the substrate. A wavelength of the light is selected to locally maximize the intensity of the reflected light at an initial time point of the etching process. The reflected light is detected to determine an endpoint of the substrate etching process.

Abstract: A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a precursor distribution system that includes at least one top inlet and a plurality of side inlets. The top inlet may be positioned above the substrate stage and the side inlets may be radially distributed around the substrate stage. The reactive radical precursor may be supplied to the deposition chamber through the top inlet. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 as an example of a silicon and chlorine containing passivating gas may be added for additional selectivity.

Abstract: A method of sputtering a copper seed layer and the target used therewith. The copper included in the sputtering target includes a first dopant reactive with copper and a second dopant unreactive with copper. Examples of the first dopant include Ti, Mg, and Al. Examples of the second dopant include Pd, Sn, In, Ir, and Ag. The amount of the first dopant may be determined by testing stress migration and that of the second dopant by testing electromigration.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 may be added for additional selectivity.

Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

Abstract: Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.

Abstract: A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a precursor distribution system comprising a dual-channel showerhead positioned above the substrate stage. The showerhead may have a faceplate with a first set of openings through which the reactive radical precursor enters the deposition chamber, and a second set of openings through which a second dielectric precursor enters the deposition chamber. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.

Abstract: Methods of depositing a dielectric layer in a gap formed on a substrate are described. The methods include introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber. The organo-silicon precursor has a C:Si atom ratio of less than 8, and the oxygen precursor comprises atomic oxygen that is generated outside the deposition chamber. The precursors are reacted to form the dielectric layer in the gap. Methods of filling gaps with dielectric materials are also described. These methods include providing an organo-silicon precursor having a C:Si atom ratio of less than 8 and an oxygen precursor, and generating a plasma from the precursors to deposit a first portion of the dielectric material in the gap. The dielectric material may be etched, and a second portion of dielectric material may be formed in the gap. The first and second portions of the dielectric material may be annealed.

Abstract: A polishing layer of a polishing has a window member with a top surface positioned a predetermined distance below the polishing surface. A transparent layer can be positioned below the polishing layer arid supporting the window member.

Abstract: A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming.

Abstract: A method for implanting ions in a surface layer of a workpiece includes placing the workpiece on a workpiece support in a chamber with the surface layer being in facing relationship with a ceiling of the chamber, thereby defining a processing zone between the workpiece and the ceiling, and introducing into the chamber a process gas which includes the species to be implanted in the surface layer of the workpiece. The method further includes generating from the process gas a plasma by inductively coupling RF source power into the processing zone from an RF source power generator through an inductively coupled RF power applicator, and applying an RF bias from an RF bias generator to the workpiece support.

Abstract: A chemical mechanical polishing apparatus has a movable platen, a drive mechanism and a chucking mechanism. The drive mechanism is attached to the platen, is configured to support a generally linear polishing sheet with a portion of the polishing sheet extending over the platen, and is configured to incrementally advance the polishing sheet in a linear direction relative to the platen. The chucking mechanism is configured to intermittently secure the portion of the polishing sheet to the platen.

Abstract: A method and apparatus for the removal of a deposited conductive layer along an edge of a substrate using an electrode configured to electro polish a substrate edge are disclosed. The electro polishing of the substrate edge may occur simultaneously during electrochemical mechanical processing (Ecmp) of a substrate face. In one embodiment, a power source applies a bias between the substrate and at least two electrodes. The electrodes form a first electrode zone proximate the substrate edge at a sufficient potential to electro polish the substrate edge, thereby removing the conductive layer from the substrate edge. A second electrode zone with a lower potential than the first electrode zone is aligned proximate the substrate face during processing to enable Ecmp of the substrate face.

Abstract: Systems and methods for electrochemically processing. A contact element defines a substrate contact surface positionable in contact a substrate during processing. In one embodiment, the contact element comprises a wire element. In another embodiment the contact element is a rotating member. In one embodiment, the contact element comprises a noble metal.