Abstract: A method and a device for engendering rotation of a rotor relative to a stator. Stator teeth may comprise a mutually coupled coil winding pair, and a driver circuit may drive current through a first coil winding of the mutually coupled coil winding pair to generate a current on a second coil winding of the mutually coupled coil winding pair. The driver circuit may drive charge through the second coil winding to apply a torque to a rotor tooth. The driver circuit may also recapture and store charge to drive through the second coil winding.

Abstract: Briefly, example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, using one or more mobile communication devices and/or processing devices to facilitate and/or support one or more operations and/or techniques for blockchain mining using trusted nodes, such as via democratization of associated resources for fair blockchain mining, for example.

Abstract: A method and apparatus are provided for automatic routing of messages in a data processing system. An incoming message at an input/output (I/O) interface of the data processing system includes a message identifier and payload data. Match information, including an indicator or whether the message identifier of the incoming message matches an identifier of a request in a receive queue (RQ), is used to determine a destination for the incoming message. The incoming message is forwarded to the determined destination. Information, such as payload size and RQ position, may be used to determine allocation of the payload within a cache or cache hierarchy.

Abstract: Disclosed are methods, systems and devices for operation of dual non-volatile memory devices. In one aspect, a pair of non-volatile memory device coupled in series may be placed in complementary memory states any one of multiple memory states in write cycles by controlling a current and a voltage applied to terminals of the non-volatile memory device.

Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described, in which an ultraviolet light source is utilized during fabrication of a correlated electron material. In embodiments, use of ultraviolet light may decrease a likelihood of diffusion of atomic and/or molecular components of a substrate that may bring about undesirable electrical performance of a CEM device.

Abstract: A system, device and methodology for releasing a connection between user equipment (UE) and a node in a communications network is disclosed. The method includes, at the UE, responsive to an application layer indication that no further data is expected by the UE, receiving a RRC connection release message from the node and transmitting, from the UE, a radio link control (RLC) status message using RLC acknowledged mode (AM) to the node. An early connection release timer at the UE and node based on RLC AM parameters for a signal radio bearer (SRB) is started and upon expiry of the early connection release timer, the node releases the RRC connection. This obviates the need to wait a full 10 s per the 3GPP standard to release the connection during periods of poor radio connectivity, and reduces power consumption at the UE.

Abstract: Subject matter disclosed herein may relate to correlated electron switch devices, and may relate more particularly to compensating for integrated circuit manufacturing process variation with correlated electron switch devices.

Abstract: To sense an impedance state of one or more correlated electron switch elements, a bit-line may be precharged to a voltage level that is less than a precharge voltage level for a sense amplifier, and a bit-line may be discharged through one or more correlated electron switch elements. A bit-line may be buffered from a sense amplifier via an electronic switch device.

Abstract: A method and apparatus for controlling data organization in a tiered memory system, where the system comprises a lower and higher bandwidth memories. Accesses to the tiered memory system by an action of a computing device in a first time interval are monitored to determine a first measure of bandwidth utilization, from which it is determined if the action is in a high bandwidth phase for which a first measure of bandwidth utilization is greater than an upper value. It is further determined, from confidence counters, if a monitored access is consistent with respect to the first instructions or with respect to a memory address of the access. Data associated with the access is moved from the lower bandwidth memory to the higher bandwidth memory when the action is in a high bandwidth phase, the access is consistent, and bandwidth utilization of the higher bandwidth memory is below a threshold.

Abstract: Disclosed are a circuit and method for implementing a switching function. In an embodiment, the circuit includes a first logic circuit, a second logic circuit, and a Correlated electron switch (CES) element. The CES element is configurable to have a non-volatile state to enable or disable an electrical connection between the first logic circuit and the second logic circuit.

Abstract: Electric motors may include one or more sensors usable to determine rotor alignment and/or speed. A method and apparatus for rotor alignment and/or speed error detection and/or correction are proposed, such as using signals from one or more sensors. A method and apparatus for controlling stator tooth activation based, at least in part, on corrections and offsets is also disclosed.

Abstract: Disclosed are methods, systems and devices for operation of a circuit to boost a voltage at a load for a particular duration. A plurality of capacitors, each capacitor comprising at least a first terminal, may be coupled to an assisted node. At least a first capacitor and a second capacitor of the plurality of capacitors may maintain the assisted node at or about a target voltage for a duration. The second capacitor may be charged while the first capacitor is discharging in at least a portion of the duration.

Abstract: Subject matter disclosed herein may relate to hearing aids, and may relate more particularly to adjusting one or more parameters for one or more hearing aids based, at least in part, on one or more digital audio parameters converted from an electrical audio signal or on one or more characteristics of a particular environment, or a combination thereof.

Abstract: An oscillator circuit topology using a one-pin external resonator suitable for integrated-circuit low-voltage, low-power applications that require a fast-starting accurate clock is disclosed. The circuit incorporates a novel arrangement of a plurality of active transconductance cells that respond to a digital control and provide adjustable loop gain for the oscillator. A programmable number of start-up transconductance cells are engaged in the initial phase of the oscillation for temporarily increasing the loop gain and energizing the resonator, and are disengaged from the oscillator core once the oscillation level is sufficiently large. The start-up transconductance cells may be identical to the always-on transconductance cells in the oscillator core, or they may be scaled versions of those cells. In addition, a programmable number of identical or scaled transconductance cells may be provided in the oscillator core itself, for accommodating different resonators.

Abstract: A method and apparatus for controlling direct memory transfer (DMT) in a data processing system with mismatched bus-widths in which a home node automatically determines, from a read request received from a requestor node, whether DMT should be enabled or disabled dependent on the bus-widths of the requestor node and a target slave node and on the size of the access. Optionally, when the slave node has a smaller bus width than the requestor node, a data combiner at an upload port for the target slave node merges two or more data beats of requested data received from the target slave node to form a single wider beat and transmits the single wider beat to the requestor node. A counter may be used to determine when a data buffer in the data combiner has sufficient space to store data beats to be merged.

Abstract: Disclosed are devices and methods for storing values, symbols, parameters or conditions in memory devices as states, and subsequently mapping detected states as values, symbols parameters or conditions. In one implementation write operations may place first and second memory elements in a particular impedance state selected from between a low impedance or conductive state and a high impedance or insulative state. The high impedance or insulative state represents a first binary value or symbol while the low high impedance or conductive state represents a second binary value or symbol. Subsequently detected impedance states of the first and second memory elements may be mapped to the second binary value or symbol responsive to either of the detected impedance states being the high impedance or insulative state and the second detected impedance state.

Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described in which a correlated electron material film may be formed over a conductive substrate by converting at least a portion of the conductive substrate to CEM.

Abstract: Subject matter disclosed herein may relate to correlated electron switches that are capable of asymmetric set or reset operations.

Abstract: Disclosed is a method for the manufacture of a CEM device comprising forming a thin film of a correlated electron material having a predetermined electrical impedance when the CEM device in its relatively conductive (low impedance) state, wherein the forming of the CEM thin film comprises forming a d- or f-block metal or metal compound doped by a physical or chemical vapor deposition with a predetermined amount of a dopant comprising a back-donating ligand for the metal.

Abstract: A method and apparatus for retrieving data from a memory in which data, an associated message authentication code (MAC) and an associated error correction code (ECC) are stored in a memory such that the data, MAC and ECC can be retrieved together in a single read transaction and written in a single write transaction. Additional read transactions may be used to retrieve counters values that enable the retrieved MAC to be compared with a computed MAC. Still further, node value values of an integrity tree may also be retrieved to enable hash values of the integrity tree to be verified. The MAC and ECC may be stored in a metadata region of a memory module, for example.