Patents Assigned to ATI Technologies
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Patent number: 11839815Abstract: Systems, apparatuses, and methods for performing adaptive audio mixing are disclosed. A trained neural network dynamically selects and mixes pre-recorded, human-composed music stems that are composed as mutually compatible sets. Stem and track selection, volume mixing, filtering, dynamic compression, acoustical/reverberant characteristics, segues, tempo, beat-matching and crossfading parameters generated by the neural network are inferred from the game scene characteristics and other dynamically changing factors. The trained neural network selects an artist's pre-recorded stems and mixes the stems in real-time in unique ways to dynamically adjust and modify background music based on factors such as game scenario, the unique storyline of the player, scene elements, the player's profile, interest, and performance, adjustments made to game controls (e.g., music volume), number of viewers, received comments, player's popularity, player's native language, player's presence, and/or other factors.Type: GrantFiled: December 23, 2020Date of Patent: December 12, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Carl Kittredge Wakeland, Mehdi Saeedi, Thomas Daniel Perry, Gabor Sines
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Patent number: 11836091Abstract: A processor supports secure memory access in a virtualized computing environment by employing requestor identifiers at bus devices (such as a graphics processing unit) to identify the virtual machine associated with each memory access request. The virtualized computing environment uses the requestor identifiers to control access to different regions of system memory, ensuring that each VM accesses only those regions of memory that the VM is allowed to access. The virtualized computing environment thereby supports efficient memory access by the bus devices while ensuring that the different regions of memory are protected from unauthorized access.Type: GrantFiled: October 31, 2018Date of Patent: December 5, 2023Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULCInventors: Anthony Asaro, Jeffrey G. Cheng, Anirudh R. Acharya
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Patent number: 11836031Abstract: Systems, apparatuses, and methods for performing a software override of a power estimation mechanism are disclosed. A computing system includes a plurality of tuned parameters for generating an estimate of power consumption. The tuned parameters are generated based on post-silicon characterization of the system. After deployment, the system executes a plurality of different applications. When launching a particular application, the system loads a corresponding set of override parameters which are used to replace the plurality of tuned parameters. The system generates an estimate of power consumption using the set of override parameters rather than the previously determined tuned parameters. Then while executing the particular application, the system makes adjustments to power and frequency values for the various system components based on the estimate of power consumption.Type: GrantFiled: November 10, 2020Date of Patent: December 5, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Jonathan David Hauke, Adam Clark
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Publication number: 20230388527Abstract: A system and method for texture decompression is described. The method comprises receiving a compressed texture block including two or more disjoint subsets of data and decompressing the compressed texture block. The decompressing includes decompressing each of the two or more disjoint subsets in the compressed texture block to form texels. The two or more disjoint subsets include a first disjoint subset having a first set of color endpoints and a first index value for a first texel, and a second disjoint subset having a second set of color endpoints.Type: ApplicationFiled: August 10, 2023Publication date: November 30, 2023Applicant: ATI Technologies ULCInventors: Konstantine Iourcha, Andrew S.C. Pomianowski
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Patent number: 11830817Abstract: A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.Type: GrantFiled: October 30, 2020Date of Patent: November 28, 2023Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULCInventors: Rahul Agarwal, Raja Swaminathan, Michael S. Alfano, Gabriel H. Loh, Alan D. Smith, Gabriel Wong, Michael Mantor
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Patent number: 11831900Abstract: Methods and apparatus encode image frames using intra-frame prediction by predicting pixels for a block of current pixels, based on a detected spatial pattern of pixel intensity differences among a plurality of neighboring reconstructed pixels to the block of current pixels, and encode a block of pixels of the image frame using the predicted block of reconstructed pixels. Inter-frame prediction is provided by determining whether blocks of pixels in temporally neighboring reconstructed frames corresponding to a candidate motion vector have a pattern of pixel intensity differences among the blocks from temporally neighboring frames. Predicted blocks are produced for a reconstructed frame based on the determined pattern of pixel intensity difference among temporally neighboring frames.Type: GrantFiled: March 29, 2021Date of Patent: November 28, 2023Assignee: ATI TECHNOLOGIES ULCInventors: Haibo Liu, Ihab Amer
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Patent number: 11830225Abstract: A feedback processing module includes a memory configured to store feedback received from an encoder. The feedback includes parameters associated with encoded graphics content generated by a graphics engine. The feedback processing module also includes a processor configured to generate configuration information for the graphics engine based on the feedback. The graphics engine is configured to execute a workload based on the configuration information. In some cases, the feedback processing module is also configured to receive feedback from a decoder that is used to decode the graphics content that is encoded by the encoder and generate the configuration information based on the feedback received from the decoder.Type: GrantFiled: May 30, 2018Date of Patent: November 28, 2023Assignee: ATI TECHNOLOGIES ULCInventors: Yang Liu, Ihab Amer, Gabor Sines, Boris Ivanovic, Jinbo Qiu
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Patent number: 11831888Abstract: Systems, apparatuses, and methods for reducing latency for wireless virtual and augmented reality applications are disclosed. A virtual reality (VR) or augmented reality (AR) system includes a transmitter rendering, encoding, and sending video frames to a receiver coupled to a head-mounted display (HMD). In one scenario, rather than waiting until the entire frame is encoded before sending the frame to the receiver, the transmitter sends an encoded left-eye portion to the receiver while the right-eye portion is being encoded. In another scenario, the frame is partitioned into a plurality of slices, and each slice is encoded and then sent to the receiver while the next slice is being encoded. In a further scenario, each slice is being encoded while the next slice is being rendered. In a still further scenario, each slice is prepared for presentation by the receiver while the next slice is being decoded by the receiver.Type: GrantFiled: July 16, 2021Date of Patent: November 28, 2023Assignee: ATI Technologies ULCInventors: Mikhail Mironov, Gennadiy Kolesnik, Pavel Siniavine
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Patent number: 11825106Abstract: A method and computer processing system for performing texture compression comprising receiving, from a memory storing a compressed texture block and by a graphics processing unit including at least one rendering pipeline, the compressed texture block including two or more disjoint subsets, and decompressing, by the at least one rendering pipeline, the compressed texture block, wherein decompressing the compressed texture block comprises: decompressing data in the two or more disjoint subsets in the compressed texture block to form texels, wherein the two or more disjoint subsets include a first disjoint subset including a first set of color endpoints and a second disjoint subset including a second set of color endpoints.Type: GrantFiled: October 29, 2021Date of Patent: November 21, 2023Assignee: ATI Technologies ULCInventors: Konstantine Iourcha, Andrew S. C. Pomianowski
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Patent number: 11813523Abstract: Systems and methods are disclosed that automatically generating a gameplay recording from an application. Techniques are provided to extract data from a buffer, the extracted data are associated with the application; to detect, based on a signature associated with the extracted data, the occurrence of an event; and upon detection of the occurrence of the event, to generate the gameplay recording from an output of the application.Type: GrantFiled: September 3, 2021Date of Patent: November 14, 2023Assignee: ATI Technologies ULCInventors: Wei Liang, Le Zhang, Ilia Blank, Patrick Pak Kin Fok
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Patent number: 11815974Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: GrantFiled: July 26, 2021Date of Patent: November 14, 2023Assignee: ATI TECHNOLOGIES ULCInventors: Vincent Cueva, Gia Tung Phan
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Patent number: 11816871Abstract: Methods and devices are provided for processing image data on a sub-frame portion basis using layers of a convolutional neural network. The processing device comprises memory and a processor. The processor is configured to receive frames of image data comprising sub-frame portions, schedule a first sub-frame portion of a first frame to be processed by a first layer of the convolutional neural network when the first sub-frame portion is available for processing, process the first sub-frame portion by the first layer and continue the processing of the first sub-frame portion by the first layer when it is determined that there is sufficient image data available for the first layer to continue processing of the first sub-frame portion. Processing on a sub-frame portion basis continues for subsequent layers such that processing by a layer can begin as soon as sufficient data is available for the layer.Type: GrantFiled: December 30, 2020Date of Patent: November 14, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Tung Chuen Kwong, David Porpino Sobreira Marques, King Chiu Tam, Shilpa Rajagopalan, Benjamin Koon Pan Chan, Vickie Youmin Wu
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Publication number: 20230350480Abstract: Platform power management includes boosting performance in a platform power boost mode or restricting performance to keep a power or temperature under a desired threshold in a platform power cap mode. Platform power management exploits the mutually exclusive nature of activities and the associated headroom created in a temperature and/or power budget of a server platform to boost performance of a particular component while also keeping temperature and/or power below a threshold or budget.Type: ApplicationFiled: June 23, 2023Publication date: November 2, 2023Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Indrani Paul, Sriram Sambamurthy, Larry David Hewitt, Kevin M. Lepak, Samuel D. Naffziger, Adam Neil Calder Clark, Aaron Joseph Grenat, Steven Frederick Liepe, Sandhya Shyamasundar, Wonje Choi, Dana Glenn Lewis, Leonardo de Paula Rosa Piga
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Patent number: 11803999Abstract: Systems, methods, and techniques utilize reinforcement learning to efficiently schedule a sequence of jobs for execution by one or more processing threads. A first sequence of execution jobs associated with rendering a target frame of a sequence of frames is received. One or more reward metrics related to rendering the target frame are selected. A modified sequence of execution jobs for rendering the target frame is generated, such as by reordering the first sequence of execution jobs. The modified sequence is evaluated with respect to the selected reward metric(s); and rendering the target frame is initiated based at least in part on the evaluating of the modified sequence with respect to the one or more selected reward metric(s).Type: GrantFiled: November 18, 2021Date of Patent: October 31, 2023Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULCInventors: Thomas Daniel Perry, Steven Tovey, Mehdi Saeedi, Andrej Zdravkovic, Zhuo Chen
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Patent number: 11805026Abstract: Systems, apparatuses, and methods for utilizing training sequences on a replica lane are described. A transmitter is coupled to a receiver via a communication channel with a plurality of lanes. One of the lanes is a replica lane used for tracking the drift in the optimal sampling point due to temperature variations, power supply variations, or other factors. While data is sent on the data lanes, test patterns are sent on the replica lane to determine if the optimal sampling point for the replica lane has drifted since a previous test. If the optimal sampling point has drifted for the replica lane, adjustments are made to the sampling point of the replica lane and to the sampling points of the data lanes.Type: GrantFiled: August 14, 2020Date of Patent: October 31, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Stanley Ames Lackey, Jr., Damon Tohidi, Gerald R. Talbot, Edoardo Prete
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Publication number: 20230342325Abstract: A link controller includes a Peripheral Component Interconnect Express (PCIe) physical layer circuit for coupling to a communication link and providing a data path over the communication link, a first data link layer controller which operates according to a PCIe protocol, and a second data link layer controller which operates according to a non-PCIe protocol. A multiplexer-demultiplexer selectively connects both data link layer controllers to the PCIe physical layer circuit. A protocol translation circuit is coupled between the multiplexer-demultiplexer and the second data link layer controller, the protocol translation circuit receiving traffic data from the second data link layer controller in a non-PCIe format, encapsulating the non-PCIe format in a PCIe format, and passing traffic data to the multiplexer-demultiplexer circuit.Type: ApplicationFiled: June 30, 2023Publication date: October 26, 2023Applicants: ATI Technologies ULC, Advanced Micro Devices, Inc.Inventors: Gordon Caruk, Maurice B. Steinman, Gerald R. Talbot, Joseph D. Macri
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Publication number: 20230341922Abstract: A technique for operating a cache is disclosed. The technique includes in response to a power down trigger that indicates that the cache effectiveness is considered to be low, powering down the cache.Type: ApplicationFiled: April 26, 2022Publication date: October 26, 2023Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ashish Jain, Benjamin Tsien, Chintan S. Patel, Vydhyanathan Kalyanasundharam, Shang Yang
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Publication number: 20230333624Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.Type: ApplicationFiled: June 22, 2023Publication date: October 19, 2023Applicant: ATI Technologies ULCInventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
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Patent number: 11782540Abstract: A processing system reduces latency and improves predictability of a scan out position to support graphics processing unit (GPU) front buffer rendering with a variable refresh rate (VRR) display. The GPU detects whether front buffer rendering such as inking is occurring on a frame-by-frame basis. In order to maintain a safe distance from the current scan out position and achieve low latency to improve the user experience, the GPU increases the refresh rate of the VRR display to a low-latency (high-frequency) fixed refresh rate in response to detecting front buffer rendering. In some embodiments, the GPU decreases the refresh rate in response to detecting a static screen to save power.Type: GrantFiled: September 23, 2020Date of Patent: October 10, 2023Assignee: ATI TECHNOLOGIES ULCInventors: Anthony W L Koo, Syed Athar Hussain
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Patent number: 11782494Abstract: A method and apparatus controls power management of a graphics processing core when multiple virtual machines are allocated to the graphics processing core on a much finer-grain level than conventional systems. In one example, the method and apparatus processes a plurality of virtual machine power control setting requests to determine a power control request for a power management unit of a graphics processing core. The method and apparatus then controls power levels of the graphics processing core with the power management unit based on the determined power control request.Type: GrantFiled: September 4, 2018Date of Patent: October 10, 2023Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULCInventors: Oleksandr Khodorkovsky, Stephen D. Presant