Patents Assigned to ATI Technologies
-
Publication number: 20240201876Abstract: A method and apparatus of managing memory includes storing a first memory page at a shared memory location in response to the first memory page including data shared between a first virtual machine and a second virtual machine. A second memory page is stored at a memory location unique to the first virtual machine in response to the second memory page including data unique to the first virtual machine. The first memory page is accessed by the first virtual machine and the second virtual machine, and the second memory page is accessed by the first virtual machine and not the second virtual machine.Type: ApplicationFiled: December 16, 2022Publication date: June 20, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Lu Lu, Anthony Asaro, Yinan Jiang
-
Publication number: 20240203034Abstract: A technique for performing ray tracing operations is provided. The technique includes, testing a plurality of bounding boxes for intersection with a ray in parallel, wherein the plurality of bounding boxes are specified by a plurality of box data items of a parent box node of a bounding volume hierarchy; determining that, for a first child node that is pointed to by a two or more node pointers specified by two or more box data items of the plurality of box data items, at least one bounding box specified by the two or more box data items is intersected by the ray; and in response to the determining, traversing to the first child node.Type: ApplicationFiled: December 14, 2022Publication date: June 20, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: David William John Pankratz, David Kirk McAllister, Daniel James Skinner, Michael John Livesley, David Ronald Oldcorn
-
Publication number: 20240202862Abstract: A processing device and a method of auto-tiled workload processing is provided. The processing device includes memory and a processor. The processor is configured to store instructions for operations to be executed on an image to be divided into a plurality of tiles, store information associated with the operations, select one of the operations for execution and execute an auto-tiling plan for the operation based on the information associated with the operations. The auto-tiling plan comprises, for example, determining a number of tiles used to divide the image and determining a size of one or more of the tiles of the image.Type: ApplicationFiled: December 20, 2022Publication date: June 20, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Guennadi Riguer, Mark Satterthwaite, Jeremy Lukacs, Zhuo Chen, Gareth Havard Thomas
-
Publication number: 20240202047Abstract: The disclosed computer-implemented method can include reaching, by a chiplet involved in carrying out an operation for a process, a synchronization barrier. The method can additionally include receiving, by the chiplet, dedicated control messages pushed to the chiplet by other chiplets involved in carrying out the operation for the process, wherein the dedicated control messages are pushed over a control network by the other chiplets. The method can also include advancing, by the chiplet, the synchronization barrier in response to receipt of the dedicated control messages. Various other methods, systems, and computer-readable media are also disclosed.Type: ApplicationFiled: December 16, 2022Publication date: June 20, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Joseph L. Greathouse, Alan D. Smith, Anthony Asaro, Kostantinos Danny Christidis, Alexander Fuad Ashkar, Milind N. Nemlekar
-
Publication number: 20240203032Abstract: A technique for performing ray tracing operations is provided. The technique includes identifying triangles to include in a compressed triangle block; storing data common to the identified triangles as common data of the compressed triangle block; and storing data unique to the identified triangles as unique data of the compressed triangle block.Type: ApplicationFiled: December 14, 2022Publication date: June 20, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: David William John Pankratz, David Ronald Oldcorn, Daniel James Skinner, Michael John Livesley, David Kirk McAllister
-
Patent number: 12014700Abstract: A graphics processing unit (GPU) of a processing system transmits pixel data for a frame to a display in a compressed burst, so that the pixel data is communicated at a rate that is higher than the rate at which the display scans out the pixel data to refresh the frame at a display panel. By transmitting pixel data for the frame in a compressed burst, the GPU shortens the time spent transmitting the pixel data and extends the time before the next frame of pixel data is to be transmitted. During the extended time before the next frame of pixel data is to be transmitted, the GPU saves power by placing portions of the processing system in a reduced power mode.Type: GrantFiled: December 28, 2022Date of Patent: June 18, 2024Assignee: ATI TECHNOLOGIES ULCInventors: Syed Athar Hussain, Anthony W L Koo, David I. J. Glen
-
Publication number: 20240192965Abstract: A technique for operating an auxiliary processing device is provided. The technique includes based on a first request specifying a handle received from a client, requesting work be performed via a first auxiliary processing device mapped to the handle; responsive to restoration from hibernation, updating a mapping for the handle to refer to a second auxiliary processing device; and based on a second request specifying the handle received from the client, requesting work be performed via the second auxiliary processing device.Type: ApplicationFiled: December 13, 2022Publication date: June 13, 2024Applicant: ATI Technologies ULCInventors: Yuexiang Yu, Wan Quan Li, Bokun Zhang, Min Zhang, Hing Pong Chan
-
Patent number: 12002541Abstract: A read clock circuit selectively provides a read clock signal from a memory to a memory controller over a memory bus. A pulse-amplitude modulation (PAM) driver including an input and an output capable of driving at least three levels indicating respective digital values. A digital control circuit is coupled to the PAM driver and operable to cause the PAM driver to provide a preamble signal before the read clock signal, the preamble signal including an initial toggling state in which the PAM driver toggles between two selected levels at a first rate, and a final toggling state in which the PAM driver toggles between two selected levels at a second rate higher than the first rate, with a length of the initial toggling state and a length of the final toggling state are based on values in a mode register.Type: GrantFiled: June 30, 2022Date of Patent: June 4, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Aaron John Nygren, Michael John Litt, Karthik Gopalakrishnan, Tsun Ho Liu
-
Publication number: 20240179333Abstract: A system and method for texture decompression is described. The method comprises receiving a compressed texture block including two or more disjoint subsets of data and decompressing the compressed texture block. The decompressing includes decompressing each of the two or more disjoint subsets in the compressed texture block to form texels. The two or more disjoint subsets include a first disjoint subset having a first set of color endpoints and a first index value for a first texel, and a second disjoint subset having a second set of color endpoints.Type: ApplicationFiled: February 9, 2024Publication date: May 30, 2024Applicant: ATI Technologies ULCInventors: Konstantine Iourcha, Andrew S.C. Pomianowski
-
Patent number: 11994996Abstract: Apparatuses, systems and methods for routing requests and responses targeting a shared resource. A queue in a communication fabric is located in a path between the requesters and a shared resource. In some embodiments, the shared resource is a shared address translation cache stored in an endpoint. The physical channel between the queue and the shared resource supports multiple virtual channels. The queue assigns at least one entry to each virtual channel of a group of virtual channels where the group includes a virtual channel for each address translation request type from a single requester of the multiple requesters. When the at least one entry for a given requester is de-allocated, the queue allocates this entry only with requests from the assigned virtual channel even if the empty entry is the only available entry of the queue.Type: GrantFiled: June 13, 2023Date of Patent: May 28, 2024Assignee: ATI Technologies ULCInventor: Kostantinos Danny Christidis
-
Patent number: 11995351Abstract: A method for hardware management of DMA transfer commands includes accessing, by a first DMA engine, a DMA transfer command and determining a first portion of a data transfer requested by the DMA transfer command. Transfer of a first portion of the data transfer by the first DMA engine is initiated based at least in part on the DMA transfer command. Similarly, a second portion of the data transfer by a second DMA engine is initiated based at least in part on the DMA transfer command. After transferring the first portion and the second portion of the data transfer, an indication is generated that signals completion of the data transfer requested by the DMA transfer command.Type: GrantFiled: November 1, 2021Date of Patent: May 28, 2024Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULCInventors: Joseph L Greathouse, Sean Keely, Alan D. Smith, Anthony Asaro, Ling-Ling Wang, Milind N Nemlekar, Hari Thangirala, Felix Kuehling
-
Patent number: 11994939Abstract: The disclosed computer-implemented method for generating remedy recommendations for power and performance issues within semiconductor software and hardware. For example, the disclosed systems and methods can apply a rule-based model to telemetry data to generate rule-based root-cause outputs as well as telemetry-based unknown outputs. The disclosed systems and methods can further apply a root-cause machine learning model to the telemetry-based unknown outputs to analyze deep and complex failure patterns with the telemetry-based unknown outputs to ultimately generate one or more root-cause remedy recommendations that are specific to the identified failure and the client computing device that is experiencing that failure.Type: GrantFiled: September 30, 2022Date of Patent: May 28, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Mohammad Hamed Mousazadeh, Arpit Patel, Gabor Sines, Omer Irshad, Philippe John Louis Yu, Zongjie Yan, Ian Charles Colbert
-
Patent number: 11989918Abstract: Systems, apparatuses, and methods for converting pixel data to a custom swizzle mode are disclosed. A graphics engine receives data in a pre-defined swizzle mode. The graphics engine determines a custom swizzle mode for the data that has directionality aligned to the data itself to further optimize deltas that are used for compressing the data. The graphics engine groups incoming data into group of two neighboring pixels in both the horizontal and vertical directions. The graphics engine scores horizontal and vertical groupings against each other to make a first swizzle mode bit selection. Then the graphics engine increases the grouping of pixels to include additional pixels and scores the increased groupings against each other to make subsequent swizzle mode bit selections. The data is reswizzled into the custom swizzle mode and provided to a compressor to be compressed.Type: GrantFiled: December 23, 2020Date of Patent: May 21, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Nooruddin Ahmed, Anthony Chan, Christopher J. Brennan
-
Patent number: 11985341Abstract: A technique for encoding video is provided. The technique includes for a first portion of a first frame that is encoded by a first encoder in parallel with a second portion of the first frame that is encoded by a second encoder, determining a historical complexity distribution; determining a first bit budget for the first portion of the first frame based on the historical complexity distribution; and encoding the first portion of the first frame by the first encoder, based on the first bit budget.Type: GrantFiled: June 22, 2022Date of Patent: May 14, 2024Assignee: ATI Technologies ULCInventors: Wei Gao, Gabor Sines, Ihab M. A. Amer, Crystal Yeong-Pian Sau, Feng Pan, Dong Liu
-
Publication number: 20240155806Abstract: The disclosed computer-implemented method for configuring fan speeds can include (i) measuring an air temperature at the air intake of a fan that cools a hardware processing unit of a computing device, (ii) adjusting a rotational speed for the fan based on the air temperature at the air intake of the fan and at least one additional parameter measured around the time of measuring the temperature of the air, and (iii) sending, to the fan, an instruction to rotate at the rotational speed. Various other methods, systems, and computer-readable media are also disclosed.Type: ApplicationFiled: November 3, 2022Publication date: May 9, 2024Applicant: ATI Technologies ULCInventors: Jabir H. Yusufali, Ali Ebrahimi Khabbazi, Cristian Andrei Saceleanu, Jushwin Singh Mahal
-
Publication number: 20240143295Abstract: A compilation technique is provided. The technique includes including a first instruction into a first executable for a first auxiliary processor, wherein the first instruction specifies execution by the first auxiliary processor; and including a second instruction into the first executable, wherein the second instruction targets resources that have affinity with the first auxiliary processor.Type: ApplicationFiled: November 1, 2022Publication date: May 2, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Norman Vernon Douglas Stewart, Mihir Shaileshbhai Doctor, Mingliang Lin
-
Patent number: 11971803Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical computer vision (CV) application are disclosed. A system includes a safety-critical CV application, a safety monitor, and a CV accelerator engine. The safety monitor receives an input image, test data, and a CV graph from the safety-critical CV application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and CV graph to the CV accelerator which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the CV accelerator engine and covers faults only observable at the level of the CV graph.Type: GrantFiled: December 10, 2021Date of Patent: April 30, 2024Assignee: ATI Technologies ULCInventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, Clarence Ip, Meghana Manjunatha
-
Publication number: 20240135626Abstract: A method, computer system, and a non-transitory computer-readable storage medium for performing primitive batch binning are disclosed. The method, computer system, and non-transitory computer-readable storage medium include techniques for generating a primitive batch from a plurality of primitives, computing respective bin intercepts for each of the plurality of primitives in the primitive batch, and shading the primitive batch by iteratively processing each of the respective bin intercepts computed until all of the respective bin intercepts are processed.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Michael Mantor, Laurent Lefebvre, Mark Fowler, Timothy Kelley, Mikko Alho, Mika Tuomi, Kiia Kallio, Patrick Klas Rudolf Buss, Jari Antero Komppa, Kaj Tuomi
-
Patent number: 11966748Abstract: Techniques described herein provide users with the ability to persistently adjust settings for boot-time features (BTF) of a computing device. A user requests a particular BTF configuration adjustment for a device via a device driver. The driver instructs trusted firmware of the device to store a boot override record in persistent storage accessible by a bootloader for the device. Upon implementation of the boot sequence for the device, the bootloader applies the changes reflected in the record to BTF configuration data. The boot override information is persistently available to the bootloader, which ensures that the configuration changes that the boot override record(s) represent are applied to the BTFs of the device until the boot override record(s) are cleared or invalidated. Further, to ensure the security of boot override record(s), the trusted firmware generates, for each record, an HMAC tag using an HMAC key derived from a Chip Endorsement Fused Secret from the hardware.Type: GrantFiled: September 30, 2021Date of Patent: April 23, 2024Assignee: ATI Technologies ULCInventors: Kamraan Nasim, Erez Koelewyn, Shadi Dashmiz
-
Patent number: 11962313Abstract: An oscillator circuit is provided that adapts to voltage supply variations. The circuit first and second delays lines connected inputs of an edge detector, one delay line supplied by a reference voltage and the other with a drooping supply voltage. The edge detector generates an output clock based on a relationship between the inputs. The output clock applied to the signal inputs of the first and second delay lines. The output clock has a voltage dependent frequency performance curve with a slope dependent at least on the second delay line delay and a delay of the edge detector. At least one of the first delay line, the second delay line, and the edge detector delay are adjusted to change the slope of the performance curve.Type: GrantFiled: March 29, 2019Date of Patent: April 16, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Stephen Victor Kosonocky, Mikhail Rodionov, Joyce Cheuk Wai Wong