Abstract: Electrical design current throttling, including: applying an electrical design current (EDC) threshold for each control processing unit component of a plurality of the central processing unit components responsive to the corresponding priority of each central processing unit component, the priority of a central processing unit component responsive to a central processing unit component's current usage data.

Abstract: A device includes an encoder, decoder, codec or combination thereof and inline hardware conversion units that are operative to convert stored image data into one of: an HDR/WCG format and an SDR/SCG format during the conversion process. Each of the inline hardware conversion units is operative to perform the conversion process independent of another read operation with the memory that stores the image data to be converted. In one example, an encoding unit is operative to perform a write operation with a memory to store the converted image data after completing the conversion process. In another example, a decoding unit is operative to perform a read operation with the memory to retrieve the image data from the memory before initiating the conversion process. In another example, an encoder/decoder unit is operative to perform at least one of: the read operation and the write operation.

Abstract: An electronic device includes a processor that executes a guest operating system and a hypervisor, an input-output (IO) device, and an input-output memory management unit (IOMMU). The IOMMU handles communications between the IOMMU and the guest operating system by: replacing, in communications received from the guest operating system, guest domain identifiers (domainIDs) with corresponding host domainIDs and/or guest device identifiers (deviceIDs) with corresponding host deviceIDs before further processing the communications; replacing, in communications received from the IO device, host deviceIDs with guest deviceIDs before providing the communications to the guest operating system; and placing, into communications generated in the IOMMU and destined for the guest operating system, guest domainIDs and/or guest deviceIDs before providing the communications to the guest operating system. The IOMMU handles the communications without intervention by the hypervisor.

Abstract: Systems, apparatuses, and methods for implementing automatic data format detection techniques are disclosed. A graphics engine receives data of indeterminate format and the graphics engine predicts an organization of the data. As part of the prediction, the graphics engine predicts the pixel depth (i.e., bytes per pixel (BPP)) and format separately. The graphics engine folds the data along pixel and channel boundaries to help in determining the pixel depth and format. The graphics engine scores modes against each other to generate different predictions for different formats. Then, the graphics engine generates scores for the predictions to determine which mode has a highest correlation with the input data. Next, the graphics engine chooses the format which attains the best score among the scores that were generated for the different modes. Then, the graphics engine compresses the unknown data using the chosen format with the best score.

Abstract: Methods and devices are provided for encoding video. By using co-sited gradient and variance values to detect text and line in frames of the video. A processor is configured to receive a plurality of frames of video, determine, for a portion of a frame, a variance of the portion of the frame and a gradient of the portion of the frame and encode, using one of a plurality of different encoding qualities, the portion of the frame based on the gradient and the variance of the portion of the frame. Encoding is performed at both the sub-frame level and frame level. The portion of the frame is classified into one of a plurality of categories based on the gradient and variance and encoded based on the category.

Abstract: In some examples, an apparatus obtains source layer pixels, such as those of a content image and first destination layer pixels, such as those of a destination image. The first destination layer pixels have associated alpha values. The apparatus obtains information that indicates a first blending color format for the alpha values. The first blending color format is different from a first destination layer color format for the first destination layer pixels and an output color format for a display. The apparatus converts the source and/or first destination layer pixels to the first blending color format. The apparatus generates first alpha blended pixels based on alpha blending the source layer pixels with the first destination layer pixels using the associated alpha values. The apparatus provides, for display on the display, the first alpha blended pixels.

Abstract: Methods and apparatus provide cloud-based video encoding that generates encoded video data by one or more encoders in a cloud platform for a plurality of cloud encoding sessions. The methods and apparatus generate operational improvement tradeoff data in response to operational encoding metrics associated with the one or more encoders and change operational characteristics of the one or more encoders for at least one of the cloud encoding sessions based on the operational improvement tradeoff data.

Abstract: Techniques for scheduling operations for a task graph on a processing device are provided. The techniques include receiving a task graph that specifies one or more passes, one or more resources, and one or more directed edges between passes and resources; identifying independent passes and dependent passes of the task graph; based on performance criteria of the processing device, scheduling commands to execute the passes; and transmitting scheduled commands to the processing device for execution as scheduled.

Abstract: Various virtual reality computing systems and methods are disclosed. In one aspect, a method of delivering video frame data to multiple VR displays is provided. The method includes generating content for multiple VR displays and sensing for competing needs for resources with real time requirements of the multiple VR displays. If competing needs for resources with real time requirements are sensed, a selected refresh offset for refreshes of the multiple VR displays is determined to avoid conflict between the competing needs for resources of the multiple VR displays. The selected refresh offset is imposed and the content is delivered to the multiple VR displays.

Abstract: The present disclosure is directed to techniques for determining a perceptual importance map. The perceptual importance map indicates the relative importance to the human visual system of different portions of an image. The techniques include obtaining cost values for the blocks of an image, where cost values are values used in determining motion vectors. For each block, a confidence value is derived from the cost values. The confidence value indicates the confidence with which the motion vector is believed to be correct. A perceptual importance value is determined based on the confidence value via one or more modifications to the confidence value to better reflect importance to the human visual system. The generated perceptual importance values can be used for various purposes such as allocating bits for encoding, identifying regions of interest, or selectively rendering portions of an image with greater or lesser detail based on relative perceptual importance.

Abstract: Systems, apparatuses, and methods for implementing fine-grain power management for virtual reality (VR) systems are disclosed. A VR compositor monitors workload tasks while rendering and displaying content of a VR application. The VR compositor determines the priorities of different tasks of a given VR frame and cause power states to be assigned to processing units to match the priorities of the tasks being performed. For example, if a first task within a first frame period is assigned a high priority, a processing unit executing the task operates at a relatively high power performance state when performing the first task. If a second task within the first frame period is assigned a low priority, the processing unit operates at a relatively low power performance state when performing the second task. By implementing fine-grain power management in a VR environment, the likelihood of the processing unit suffering a thermal event or impaired performance is reduced.

Abstract: Techniques for encoding and decoding media content, and more specifically to selecting filter coefficients for filtering coding artifacts from the encoded media content are described. The filter coefficients are selected by an encoder for a given frame based on a statistical record of one or more previous frames in a data stream. The statistical record indicates the effectiveness of different sets of filter coefficients in reducing encoding artifacts for the one or more previous frames. By employing the statistical record to select filter coefficients for the next frame in the data stream, the encoder is able to select the filter coefficients relatively quickly, reducing encoding latency while ensuring that a decoder is able to effectively decode the encoded frames.

Abstract: Systems, apparatuses, and methods for abstracting tasks in virtual memory identifier (VMID) containers are disclosed. A processor coupled to a memory executes a plurality of concurrent tasks including a first task. Responsive to detecting one or more instructions of the first task which correspond to a first operation, the processor retrieves a first identifier (ID) which is used to uniquely identify the first task, wherein the first ID is transparent to the first task. Then, the processor maps the first ID to a second ID and/or a third ID. The processor completes the first operation by using the second ID and/or the third ID to identify the first task to at least a first data structure. In one implementation, the first operation is a memory access operation and the first data structure is a set of page tables. Also, in one implementation, the second ID identifies a first application of the first task and the third ID identifies a first operating system (OS) of the first task.

Abstract: A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip. The first plurality of conductive vias includes first ends and second ends. A first conductor pad is formed in ohmic contact with the first ends of the first plurality of conductive vias.

Abstract: A method for removing reflections from images is disclosed. The method includes identifying one or more segments of an image, the one or more segments including a reflection; identifying one or more features of the one or more segments; removing the one or more features from the segments to generate one or more sanitized segments; and combining the one or more sanitized segments with the image to generate a sanitized image.

Abstract: A method and system for sharing memory in a computer system includes placing one or more processors in the computer system in an idle state. The one or more processors are queried for associated memory space, and a shared physical memory address space is updated, wherein each processor in the system has access to the physical memory in the shared physical memory address space. The one or more processors is removed from the idle state, and work is submitted to the one or more processors for execution.

Abstract: A computer processing device transitions among a plurality of power management states and at least one power management sub-state. From a first state, it is determined whether an entry condition for a third state is satisfied. If the entry condition for the third state is satisfied, the third state is entered. If the entry condition for the third state is not satisfied, it is determined whether an entry condition for the first sub-state is satisfied. If the entry condition for the first sub-state is determined to be satisfied, the first sub-state is entered, a first sub-state residency timer is started, and after expiry of the first sub-state residency timer, the first sub-state is exited, the first state is re-entered, and it is re-determined whether the entry condition for the third state is satisfied.

Abstract: Techniques for performing ray tracing operations are provided. The techniques include receiving a request to determine whether a ray intersects any primitive of a set of primitives, evaluating the ray against non-leaf nodes of a bounding volume hierarchy to determine whether to eliminate portions of the bounding volume hierarchy from consideration, evaluating the ray against at least one early-termination node not eliminated from consideration, and determining whether to terminate traversal of the bounding volume hierarchy early and to identify that the ray hits a primitive, based on the result of the evaluation of the ray against the at least one early-termination node.

Abstract: A computer vision processor in an image cluster defines a fenced memory region (FMR) that controls access to image data stored in a first portion of a trusted memory region (TMR). The computer vision processor receives FMR requests from an application implemented in a processing cluster. The FMR requests are to access the image data in the first portion of the TMR. The computer vision processor selectively allows the requesting application to access the image data. In some cases, the computer vision processor acquires the image data and stores the image data in the first portion of the TMR, such as buffers in the TMR. A data fabric selectively permits the image processing application to access the data stored in the TMR based on whether the image cluster has opened or closed the FMR for the portion of the TMR.

Abstract: Techniques are provided for determining variance of a pixel block in a frame of video based on variance of pixel blocks in a reference frame of the video, instead of directly, for example, by calculating variance based on pixel values of the pixel block. The techniques include identifying a motion vector for a pixel block in a current frame, the motion vector pointing to a pixel block in a reference frame. The techniques also include determining the cost associated with the motion vector and comparing the cost to first and second thresholds. The techniques include determining the variance for the pixel block of the current frame based on the comparison of the cost to the first and second threshold and based on the variance of the pixel block of the reference frame.