Abstract: A method and a phase-locked loop (PLL) for generating output clock signals with desired frequencies are described. The PLL is equipped with a ramp generator that increments or decrements a feedback divider value before providing it to a modulator. The modulator modulates the feedback divider value and provides the modulated value to a feedback divider of the PLL for performing frequency division.

Abstract: A method and apparatus for creating one or more themed user interfaces (UI) each capable of displaying content unique to the theme selected. This may allow the use of the one or more display configurations for themed content. A device may be associated with a UI, which is capable of displaying content. One or more display configurations associated with one or more themes may be created. Upon selection of a particular theme, content specific to the particular theme is displayed via the associated display configuration.

Abstract: An austenitic alloy may generally comprise, in weight percentages based on total alloy weight: up to 0.2 carbon; up to 20 manganese; 0.1 to 1.0 silicon; 14.0 to 28.0 chromium; 15.0 to 38.0 nickel; 2.0 to 9.0 molybdenum; 0.1 to 3.0 copper; 0.08 to 0.9 nitrogen; 0.1 to 5.0 tungsten; 0.5 to 5.0 cobalt; up to 1.0 titanium; up to 0.05 boron; up to 0.05 phosphorous; up to 0.05 sulfur; iron; and incidental impurities.

Abstract: The present disclosure relates to a method and system for controlling memory access. In particular, a method for controlling memory access includes, in response to receiving a write request operative to write data to at least one memory cell of a plurality of memory cells, increasing a word line voltage above a nominal level after a predetermined delay following the receipt of the write request. A disclosed system includes a word line driver operative to increase a word line voltage above a nominal level during a write access after a predetermined delay in response to a write request.

Abstract: Systems and methods for synchronizing thread wavefronts and associated events are disclosed. According to an embodiment, a method for synchronizing one or more thread wavefronts and associated events includes inserting a first event associated with a first data output from a first thread wavefront into an event synchronizer. The event synchronizer is configured to release the first event before releasing events inserted subsequent to the first event. The method further includes releasing the first event from the event synchronizer after the first data is stored in the memory. Corresponding system and computer readable medium embodiments are also disclosed.

Abstract: According an embodiment, a package-on-package heatsink interposer for use between a top package and a bottom package of a package-on-package device, may include a top heatsink below the top package; an interposer substrate below the top heatsink; a bottom heatsink below the interposer substrate; a first interposer substrate metal layer between the interposer substrate and the top heatsink; a second interposer substrate metal layer between the interposer substrate and the bottom heatsink; and interposer solder balls between the second interposer substrate metal layer and the bottom package.

Abstract: Provided is a method and system for preloading a cache on a graphical processing unit. The method includes receiving a command message, the command message including data related to a portion of memory. The method also includes interpreting the command message, identifying policy information of the cache, identifying a location and size of the portion of memory, and creating a fetch message including data related to contents of the portion, wherein the fetch message causes the cache to preload data of the portion of memory.

Abstract: A method and apparatus for extending the display area of a source device (SD) to one or more target devices (TDs), are described. According to a method, information that may be displayed at the SD is transmitted to the one or more TDs. At the TDs, the information is displayed and manipulated by a user. An indication of the user's manipulations of the information is received at the SD where the information is physically updated. The SD transmits the updated information to the one or more TDs in order to synchronize the information displayed by the one or more TDs with the transmitted information.

Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.

Abstract: Method and apparatus for centralized timestamp processing is described herein. A graphics processing system includes multiple graphics engines and a timestamp module. For each task, a graphics driver assigns the task to a graphics engine and writes a task command packet to a memory buffer associated with the graphics engine. The graphics driver also writes a timestamp command packet for each task to a timestamp module memory buffer. A command processor associated with the graphics engine signals the timestamp module memory buffer upon completion of the task. If the read pointer is at the appropriate position in the timestamp module memory buffer, the timestamp module/timestamp module memory buffer executes the timestamp command packet and writes the timestamp to a timestamp memory. The timestamp memory is accessible by the graphics driver.

Abstract: Embodiments of a multi-processor architecture and method are described herein. Embodiments provide alternatives to the use of an external bridge integrated circuit (IC) architecture. For example, an embodiment multiplexes a peripheral bus such that multiple processors can use one peripheral interface slot without requiring an external bridge IC. Embodiments are usable with known bus protocols.

Abstract: A device and method for playing digital video are disclosed. The device includes multiple graphics processing units. The method involves using the multiple graphics processors to decode and output compressed audiovisual stream to a display and a speaker. Audiovisual bit streams possibly containing multi-stream video are efficiently decoded and displayed by sharing decoding-related tasks among multiple graphical processing units.

Abstract: A method and system for video processing is disclosed. A device driver interface (DDI) call for flipping or updating an overlay may be skipped or ignored, and may not be used by a user mode driver to pass overlay properties to a kernel mode driver (KMD). Instead, the overlay properties may be passed to the KMD at rendering time during a DDI call for rendering. The user mode driver may call a DDI for rendering an overlay frame while simultaneously passing the overlay property data to the KMD. The KMD may store the overlay property data in an overlay flip queue, program the overlay hardware per the overlay property data stored in the overlay flip queue, and flip the overlay in response to the vertical synchronization deferred procedure call.

Abstract: In an embodiment, a graphics processing device is provided. The graphics processing device includes a global clock generator configured to generate a global clock signal and a plurality of graphics pipelines each configured to transmit image frames to a respective display device. Each of the graphics pipelines comprises a timing generator. Each of the timing generators is configured to generate a respective virtual clock signal based on the global clock signal and wherein each virtual clock signal is used to advance logic of a respective one of the display devices.

Abstract: A circuit includes an enhanced frequency range linear pulse code modulation conversion circuit. The enhanced frequency range linear pulse code modulation conversion circuit is driven by a clock signal within a frequency range. The enhanced frequency range linear pulse code modulation conversion circuit provides enhanced frequency range linear pulse code modulated information. More specifically, the enhanced frequency range linear pulse code modulation conversion circuit is provided by selectively decimating and interpolating non-enhanced frequency range linear pulse code modulated information based on a desired output sampling frequency and the frequency range.

Abstract: A method includes determining white balance calibration color ratios for a plurality of illumination sources by using a representative camera of a given type to establish a set of ratios. Because the ratios are fixed for the given camera type, a plurality of cameras of the type may store the fixed ratios, and calibrate by measuring only the reference illumination source. Later white balancing is achieved by using the measured reference illumination source color ratios and the stored fixed ratios as scaling factors to map from the reference illumination source to any other illumination source. The method includes an off-line advance calibration procedure to obtain the fixed ratios, an on-line per camera calibration procedure to obtain color ratios for the reference source, and subsequent white balancing which uses the fixed ratios/scaling factors and the reference source color ratios.

Abstract: An endplate for a hot isostatic pressing canister comprises a central region, and a main region extending radially from the central region and terminating in a corner about a periphery of the endplate. The thickness of the endplate increases along the main region, from the central region to the corner, defining a taper angle. The corner includes an inner surface comprising a radiused portion by which the main region smoothly transitions into the lip. A hot isostatic pressing canister including at least one of the endplates also is disclosed, along with a method of hot isostatic pressing a metallurgical powder using the hot isostatic canister.

Abstract: A method for producing a single-clad or multiple-clad product includes providing a welded assembly comprising a cladding material disposed on a substrate material. Both the substrate material and the cladding material are individually selected alloys. At least a first edge of the cladding material of the welded assembly does not extend to a first edge of the substrate material and thereby provides a margin between the first edges. A material that is an alloy having hot strength greater than the cladding material is within the margin and adjacent the first edge of the cladding material. The welded assembly is hot rolled to provide a hot rolled band, and the material within the margin inhibits the cladding material from spreading beyond the edge of the substrate material during the hot rolling. In certain embodiments of the methods, the substrate material is stainless steel and the cladding material is nickel or a nickel alloy.

Abstract: A method and apparatus for correcting a rotation of a video frame are described. According to a method, an amount of the rotation of the video frame with respect to a reference is determined. The rotation of the video frame is corrected based at least in part on the detected amount of the rotation of the video frame.

Abstract: A method for heat treating a 718-type nickel-base comprises heating a 718-type nickel-base alloy to a heat treating temperature, and holding the alloy at the heat treating temperature for a heat treating time sufficient to form an equilibrium or near-equilibrium concentration of ?-phase grain boundary precipitates within the nickel-base alloy and up to 25 percent by weight of total ??-phase and ??-phase. The 718-type nickel-base alloy is air cooled. The present disclosure also includes a 718-type nickel-base alloy comprising a near-equilibrium concentration of ?-phase grain boundary precipitates and up to 25 percent by weight of total ??-phase and ??-phase precipitates. Alloys according to the disclosure may be included in articles of manufacture such as, for example, face sheet, honeycomb core elements, and honeycomb panels for thermal protection systems for hypersonic flight vehicles and space vehicles.