Patents Assigned to ATI
  • Variable-length code decoder
    Patent number: 8086055
    Abstract: An apparatus includes at least one general purpose register and at least one special purpose register and an execution unit that executes at least two instructions in parallel, to decode variable length codes, wherein each of the instructions share use of the at least one general purpose register and the at least one special purpose register. In one example, a processor stores variable length code information among a plurality of general purpose registers and generates decoded variable length code information by decoding the at least one variable length code. The processor also stores the decoded variable length code information among the plurality of general purpose registers.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 27, 2011
    Assignee: ATI Technologies ULC
    Inventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
  • LUBRICATION PROCESSES FOR ENHANCED FORGEABILITY
    Publication number: 20110302979
    Abstract: Forge lubrication processes are disclosed. A solid lubricant sheet is placed between a workpiece and a die in a forging apparatus. Force is applied to the workpiece with the die to plastically deform the workpiece. The solid lubricant sheet decreases the shear friction factor for the forging system and reduces the incidence of die-locking.
    Type: Application
    Filed: February 15, 2011
    Publication date: December 15, 2011
    Applicant: ATI Properties, Inc.
    Inventors: Scott Oppenheimer, Robin M. Forbes Jones, John V. Mantione, Ramesh S. Minisandram, Jean-Philippe Thomas
  • LUBRICATION PROCESSES FOR ENHANCED FORGEABILITY
    Publication number: 20110302978
    Abstract: Forge lubrication processes are disclosed. A solid lubricant sheet is placed between a workpiece and a die in a forging apparatus. Force is applied to the workpiece with the die to plastically deform the workpiece. The solid lubricant sheet decreases the shear factor for the forging system and reduces the incidence of die-locking.
    Type: Application
    Filed: June 14, 2010
    Publication date: December 15, 2011
    Applicant: ATI Properties, Inc.
    Inventors: Scott Oppenheimer, Robin M. Forbes Jones, John Mantione, Ramesh Minisandram, Jean-Philippe Thomas
  • Multi-thread graphics processing system
    Patent number: 8072461
    Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: December 6, 2011
    Assignee: ATI Technologies ULC
    Inventors: Laurent Lefebvre, Andrew Gruber, Stephen Morein
  • Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
    Patent number: 8074055
    Abstract: A computer. A processor pipeline alternately executes instructions coded for first and second different computer architectures or coded to implement first and second different processing conventions. A memory stores instructions for execution by the processor pipeline, the memory being divided into pages for management by a virtual memory manager, a single address space of the memory having first and second pages. A memory unit fetches instructions from the memory for execution by the pipeline, and fetches stored indicator elements associated with respective memory pages of the single address space from which the instructions are to be fetched. Each indicator element is designed to store an indication of which of two different computer architectures and/or execution conventions under which instruction data of the associated page are to be executed by the processor pipeline.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: December 6, 2011
    Assignee: ATI Technologies ULC
    Inventors: John S. Yates, Jr., David L. Reese, Korbin S. Van Dyke, Tiruvur R. Ramesh, Paul H. Hohensee
  • Lugs of Continuous Rubber Tracks for Track Vehicles
    Publication number: 20110291473
    Abstract: A continuous flexible track for extending about a plurality of aligned wheels on a vehicle or track module, the track includes an outer ground-engaging surface and an inner wheel-engaging surface having inwardly-projecting wheel-engaging lugs. Each lug has a proximal end, a distal surface, front and back surfaces and opposite side surfaces. Each lug further includes a flex-groove extending between the side surfaces and from the distal surface toward the proximal end, thereby dividing the lug into two portions to allow around-wheel hinging motion. In most preferred embodiments, a lug-receiving cap may be positioned over and replaceably secured with respect to each lug. A method for prolonging the useful life of such a track is provided.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Applicant: ATI, INC.
    Inventors: Jamsheed Reshad, Duane Tiede
  • System for displaying video and method thereof
    Patent number: 8065614
    Abstract: A system and method for providing playback of multiple video streams simultaneously is shown and described. A priority is assigned to individual windows of a plurality of windows used for playback of the video streams. A current window being accessed by a user is assigned a higher priority than nonactive, or background, windows. Playback characteristics, such as video resolution, transparency, and audio volume, are reduced in the playback of videos presented in nonactive windows in relation to video played in the active window. Accordingly, a user's attention may be drawn more to the active window than to the nonactive windows, while allowing the video and audio data in the nonactive windows to be provided to the user.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: November 22, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Tsang Fai Ma, Jitesh Arora
  • Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
    Patent number: 8065504
    Abstract: A microprocessor chip has instruction pipeline circuitry, and instruction classification circuitry that classifies instructions as they are executed into a small number of classes and records a classification code value. An on-chip table has entries corresponding to a range of addresses of a memory and designed to hold a statistical assessment of a value of consulting an off-chip table in a memory of the computer. Lookup circuitry is designed to fetch an entry from the on-chip table as part of the basic instruction processing cycle of the microprocessor. A mask has a value set at least in part by a timer. The instruction pipeline circuitry is controlled based on the value of the on-chip table entry corresponding to the address of instructions processed, the current value of the mask, the recorded classification code, and the off-chip table.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: November 22, 2011
    Assignee: ATI International SRL
    Inventors: John S. Yates, Jr., David L. Reese, Paul H. Hohensee, Korbin S. Van Dyke, Shalesh Thusoo, Tiruvur R. Ramesh
  • PROGRAMMABLE FINE LOCK/UNLOCK DETECTION CIRCUIT
    Publication number: 20110279156
    Abstract: An integrated circuit includes a feedback controlled clock generating circuit, such as a DLL, PLL or other suitable circuit, that is operative to provide a feedback reference frequency signal based on a generated output clock signal. The integrated circuit also includes a programmable fine lock/unlock detection circuit that includes programmable static phase error sensitivity logic that senses phase error. The programmable static phase error sensitivity logic sets a phase lock sensitivity window used to determine a fine lock/unlock condition of the generated output clock signal. The programmable fine lock/unlock detection logic is also operative to generate a fine phase lock/unlock signal based on the set phase lock sensitivity window. The integrated circuit may also include a coarse lock detection circuit that generates a coarse lock signal based on a frequency unlock condition.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 17, 2011
    Applicants: ATI TECHNOLOGIES ULC, ADVANCED MICRO DEVICES, INC.
    Inventors: Saeed Abbasi, Raymond SP Tam, Nima Gilanpour
  • Methods of forming semiconductor chip underfill anchors
    Patent number: 8058108
    Abstract: Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: November 15, 2011
    Assignee: ATI Technologies ULC
    Inventors: Roden R. Topacio, Neil McLellan
  • Holistic thermal management system for a semiconductor chip
    Patent number: 8058724
    Abstract: Various semiconductor chip thermal management systems and methods are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a substrate and coupling a diamond heat spreader that has a thermoelectric cooler to the semiconductor chip. A vapor chamber is coupled to the diamond heat spreader.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: November 15, 2011
    Assignee: ATI Technologies ULC
    Inventor: Gamal Refai-Ahmed
  • Symmetrical data signal processing
    Patent number: 8054900
    Abstract: In a digital communications receiver configured to receive, via a communications channel, a received first signal representing a sequence of symbols, each symbol being encoded to be representative of data bits, a method of processing the received signal includes adjusting a magnitude, filtering, and applying cyclic prefix restoration, to the received signal to produce a second signal, converting the second signal from time domain to frequency domain to produce a frequency domain signal, and determining a first quantity of values representing a first portion of the symbols by evaluating a relationship of channel values representing characteristics of the communications channel and a second quantity of values representing a portion of the frequency domain signal, the first quantity being smaller than the second quantity.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: November 8, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Hong Liu, Raul A. Casas, Haosung Fu
  • Programmable preamble system and method
    Patent number: 8054928
    Abstract: A system includes a first communication device and a second communication device. The first communication device includes a programmable region. The programmable region of the first communication device is programmed so that an associated signal includes a number of preamble cycles. The second communication device also can include a programmable region. The programmable region of the second communication device can be programmed so that an associated signal includes a number of preamble cycles. The number of preamble cycles can be based on a variety of factors, such as the topology or implementation of the system. In an embodiment, the number of preamble cycles is associated with a data strobe signal, and data is not read or written in response to the data strobe signal until all of the preamble cycles have been transmitted and received.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: November 8, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Joseph D. Macri, Mark Frankovich
  • Applying non-homogeneous properties to multiple video processing units (VPUs)
    Patent number: 8054314
    Abstract: A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: November 8, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Timothy M. Kelley, Jonathan L. Campbell, David A. Gotwalt
  • POWER MANAGEMENT IN MULTI-STREAM AUDIO/VIDEO DEVICES
    Publication number: 20110268425
    Abstract: A method of managing power consumption in a video device capable of displaying encoded multi-stream video is disclosed. Power reduction is achieved by limiting the amount of video and audio decoding and processing performed on at least some of the encoded streams, by taking particular application contexts into account. In a normal power consumption mode, audio/video data from all streams are decoded and digitally processed for output. In response to detecting a reduced power consumption mode, audio/video from at least some of the streams are processed in a modified manner to reduce power consumption.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 3, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventor: David I.J. Glen
  • Cobalt-nickel-chromium-molybdenum alloys with reduced level of titanium nitride inclusions
    Patent number: 8048369
    Abstract: A cobalt-nickel-chromium-molybdenum alloy useful in surgical implant applications includes, in weight percent based on total alloy weight, at least 20 cobalt, 33.0 to 37.0 nickel, 19.0 to 21.0 chromium, 9.0 to 10.5 molybdenum, and less than 30 ppm nitrogen. Embodiments of the alloy lack significant levels of titanium nitride and mixed carbonitride inclusions. The alloy may be cold drawn to thin-gauge wire without damage to the die as may be caused by hard particle inclusions in certain conventional alloy formulations.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 1, 2011
    Assignee: ATI Properties, Inc.
    Inventors: Robin M. Forbes Jones, Henry E. Lippard, Timothy A. Stephenson, Robert J. Myers, David J. Bradley
  • Method and apparatus for securing digital information on an integrated circuit during test operating modes
    Patent number: 8051345
    Abstract: The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Transitory secrets are secured whether stored in registers or latches, RAM, and/or permanent secrets stored in ROM and/or PROM. One embodiment for securing information on an IC includes entering a test mode and resetting each register in response to entering the test mode of operation and prior to receiving a test mode command. An integrated circuit embodiment includes a test control logic operative to configure the integrated circuit into a test mode and to control the integrated circuit while in the test mode, a set of registers, and a functional reset controller coupled to the test control logic and to the set of registers, operative to receive a reset command from the test control logic and provide the reset command to the set of registers in response to a command to enter the test mode.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: November 1, 2011
    Assignee: ATI Technologies ULC
    Inventors: Serag M. GadelRab, Bin Du, Zeeshan S. Syed, Denis Foley
  • Processing of titanium-aluminum-vanadium alloys and products made thereby
    Patent number: 8048240
    Abstract: A method of forming an article from an ??? titanium including, in weight percentages, from about 2.9 to about 5.0 aluminum, from about 2.0 to about 3.0 vanadium, from about 0.4 to about 2.0 iron, from about 0.2 to about 0.3 oxygen, from about 0.005 to about 0.3 carbon, from about 0.001 to about 0.02 nitrogen, and less than about 0.5 of other elements. The method comprises cold working the ??? titanium alloy.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: November 1, 2011
    Assignee: ATI Properties, Inc.
    Inventors: John J. Hebda, Randall W. Hickman, Ronald A. Graham
  • Software and methods for previewing parameter changes for a graphics display driver
    Patent number: 8051435
    Abstract: Software for dynamically previewing changes to hardware driver settings for a graphics adapter is disclosed. Changes to the driver settings are dynamically previewed by forcing an executable graphics program module to load hardware parameter settings as changed, and drawing a region reflecting the changes using the executable graphics program library. The graphics program module may be forced to load new settings as a result of being newly instantiated. Conveniently, a preview region reflecting changes may be drawn in place of an already existing preview region.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: November 1, 2011
    Assignee: ATI Technologies ULC
    Inventor: Wayne C. Louie
  • ROUTING LAYER FOR MITIGATING STRESS IN A SEMICONDUCTOR DIE
    Publication number: 20110254154
    Abstract: A routing layer for a semiconductor die is disclosed. The routing layer includes traces interconnecting integrated circuit bond-pads to UBMs. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces arranged underneath the UBMs as to absorb stress from solder bumps attached to the UMBs. Traces beneath the UBMs protect parts of the underlying dielectric material proximate the solder bumps, from the stress.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 20, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: Roden Topacio, Gabriel Wong