Patents Assigned to Broadcom Corporation
  • Patent number: 8443214
    Abstract: The present invention relates to a system and method adapted to optimize power consumption in a communication system used in a Gigabit Ethernet environment. The method comprises determining at least one power mode of a host from a plurality of possible host power modes. The method further comprises selecting at least one network interface power management state from a plurality of possible network interface power management states based, at least in part, on the determined power mode.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Jonathan Lee, John Lenell, Gregory Youngblood
  • Patent number: 8443070
    Abstract: A system and method support the exchange of media between friends, family members, and 3rd party media providers over a closed and secure media exchange network. The media may include, for example, digital video, digital audio, digital images, digital data, or any form of digital information.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Jeyhan Karaoguz, James D. Bennett
  • Patent number: 8442159
    Abstract: According to an example embodiment, a communications receiver may include a variable gain amplifier (VGA) configured to amplify received signals, a VGA controller configured to control the VGA, a plurality of analog to digital converter (ADC) circuits coupled to an output of the VGA, wherein the plurality of ADC circuits are operational when the communications receiver is configured to process signals of a first communications protocol, and wherein only a subset of the ADC circuits are operational when the communications receiver is configured to process signals of a second communications protocol.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Vivek Telang, Hong Chen, Vasudevan Parthasarathy, Jun Cao, Afshin Momtaz, Ali Ghiasi, Chung-Jue Chen
  • Patent number: 8441573
    Abstract: Systems and methods of coding progressive content with isolated fields for conversion to interlaced display are provided. Some systems and methods may find use in, for example, digital video compression systems and methods. Film material may be encoded as video material with an intended field polarity and an explicit 3:2 pull-down operation for interlaced display (e.g., a 30-frames-per-second display).
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Sherman (Xuemin) Chen, Alexander G. MacInnis
  • Patent number: 8443124
    Abstract: A physical layer device (PLD) includes a first serializer-deserializer (SERDES) device and a second SERDES device. Each SERDES device includes an analog portion with a serial port that is configured to communicate serial data with various network devices, and a digital portion that is configured to communicate parallel data with other various network devices. The PLD includes a first signal path that is configured to route serial data signals between the analog portions of the SERDES devices, bypassing the digital portions of the SERDES devices. Therefore, the SERDES devices can directly communicate serial data without performing parallel data conversion. A second signal path is configured to route recovered clock and data signals between the analog portions of the SERDES devices, but still bypassing the digital portions of the SERDES devices. The recovered clock and data signals are then regenerated before being transmitted over a network device.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Kevin T. Chan, Michael Q. Le
  • Patent number: 8442452
    Abstract: An integrated multi-mode radio transmitter includes a multiplexor and a shared front-end. The is operable to select an IF signal of a plurality of IF signals based upon a selection signal that is indicative of a particular operational mode of the one of the plurality of IF signals. The shared front-end is coupled to receive the selected IF signal, wherein the shared front-end converts the selected IF signal into a radio frequency (RF) signal that is modulated in accordance with the particular operational mode of the one of the plurality of IF stages.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Hooman Darabi, Brima B. Ibrahim, Ahmadreza (Reza) Rofougaran
  • Patent number: 8441957
    Abstract: A communications network includes a management device and a remote device. The remote device includes a physical layer device (PHY) coupled to a link partner. An independent station manager of the remote device provides the bi-directional exchange of management information between the PHY and a serial-to-parallel (S/P) interface connecting the remote device and the management device. A station manager of the management device provides the bi-directional exchange of management information between the S/P interface and a Media Access Controller (MAC) of the management device. The independent station manager and the station manager transmit initiation messages, formatted according to a message template of an Auto-Negotiation (AN) routine of the S/P interface reserved for customization, to reserve an embedded management channel for the transfer of management information.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Howard A. Baumer, Scott McDaniel, Gary S. Huff, John Louie
  • Patent number: 8441310
    Abstract: According to an example embodiment, an apparatus for controlling a power supply voltage for an integrated circuit may be provided, which may include a plurality of different types of process region detection circuits, each process region detection circuit configured to identify a respective process region of a plurality of process regions. The apparatus may also include a voltage selection circuit configured to determine a highest voltage among the voltages associated with the identified process regions and to select a power supply voltage for the integrated circuit that is equal to the highest voltage, one or more functional test circuits configured to perform a functional test using the selected power supply voltage, and a voltage adjuster circuit configured to increase the selected power supply voltage if the functional test fails.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Ramesh Senthinathan, Hooman Moshar
  • Patent number: 8441381
    Abstract: A method and apparatus is disclosed to compensate for gate leakage currents of thin oxide devices that have very thin oxide layers in a current mirror of a digital-to-analog converter (DAC). The DAC converts a digital input signal from a digital representation in a digital signaling domain to an analog representation in an analog signaling domain to provide an analog output signal. The DAC uses one or more transistors to convert the digital input signal from the digital representation to the analog representation. These transistors are typically implemented using thin oxide devices that have very thin oxide layers and corresponding gate leakage currents that are associated with these very thin oxide layers. The current-steering DAC provides these gate leakage currents independent of its corresponding reference source without any substantial affect upon its full scale output.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Ovidiu Bajdechi, Tom W. Kwan
  • Publication number: 20130114171
    Abstract: An integrated circuit assembly is provided that includes an integrated circuit (IC) package substrate including a package ground rail that is divided into a plurality of segments that are electrically isolated from each other. An IC die is disposed on the IC package substrate, the IC die including a plurality of circuit blocks and an IC ground rail. The IC ground rail is divided into a plurality of segments, where each segment of the IC ground rail is coupled to another segment of the IC ground rail by one or more diodes. The plurality of circuit blocks have corresponding ground nodes electrically connected to corresponding segments of the IC ground rail. The segments of the IC ground rail are electrically coupled to corresponding segments of the package ground rail by corresponding first connections.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Nikolaos HARALABIDIS, Ioannis KOKOLAKIS
  • Publication number: 20130113528
    Abstract: The present disclosure is directed to digital phase-locked loops (DPLLs) and hybrid phase-locked loops (HPLL) for establishing and maintaining a phase relationship between a generated output signal and a reference input signal. The DPLLs use a counter based loop to initially bring the DPLL into lock. Thereafter, the DPLLs disable the counter based loop and switch to a loop with a multi-modulus divider (MMD). The DPLLs can implement a cancelation technique to reduce phase noise introduced by the MMD. The HPLLs further include a loop with a MMD. The HPLLs can implement a similar cancelation technique to reduce phase noise introduced by the MMD.
    Type: Application
    Filed: May 31, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Emmanouil FRANTZESKAKIS, Ioannis L. SYLLAIOS, Georgios SFIKAS, Henrik JENSEN, Stephen WU, Padmanava SEN
  • Publication number: 20130116004
    Abstract: Embodiments of this disclosure include methods in which spurs generated by the drifting of an oscillation frequency of an oscillation signal provided by a free-running oscillator may be minimized and/or eliminated from an output signal of a phase locked loop (PLL). Methods include minimizing the mixing gain between the oscillation signal and a power signal provided to the PLL. The oscillation signal and the power signal may be mixed in a phase frequency detector (PFD) included in the PLL. The minimizing of the mixing gain for the PFD also minimizes the degrading effect that the spurs have on the overall performance of the communications device. The mixing gain may be minimized by minimizing the impedance provided at nodes included in the PFD where the oscillation signal and the power signal mix. The mixing gain may also be minimized by maximizing the power supply rejection ratio for the PFD.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Nikolaos Haralabidis, Ioannis Kokolakis, Georgios Konstantopoulos
  • Publication number: 20130113535
    Abstract: A communications device is disclosed that adjusts a target signal to allow a reference phase locked loop (PLL) to lock onto a reference signal that is related to a desired operating frequency in a first mode of operation. The reference PLL locks onto the reference signal when the target signal is calibrated to be proportional to the reference signal. As the communications device transitions between the first mode of operation and a second mode of operation, the communications device performs a shorten calibration cycle on the reference PLL. The reference phase locked loop (PLL) locks onto the reference signal in response to the shorten calibration cycle in the second mode of operation.
    Type: Application
    Filed: January 23, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventor: Nikolaos HARALABIDIS
  • Publication number: 20130113077
    Abstract: Embodiments described herein provide a structure for finger capacitors, and more specifically metal-oxide-metal (“MOM”) finger capacitors and arrays of finger capacitors. A plurality of Shallow Trench Isolation (STI) formations is associated with every other column of capacitor fingers, with poly fill formations covering the STI formations to provide a more robust and efficient structure.
    Type: Application
    Filed: December 28, 2011
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Agnes Neves WOO, Pascal Tran, Akira Ito, Guang-Jye Shiau, Chao-Yang Lu, Jung Wang
  • Publication number: 20130113573
    Abstract: The present disclosure is directed to a method and apparatus for providing an output oscillating signal at a desired frequency. In at least one example, the apparatus includes a weak inversion structure configured to set a small reference current. A current mirror configured to provide a replica current based on the small reference current and a tuning word. A ring oscillator is configured to be powered by a supply at a voltage determined based on the replica current. The tuning word is adjustable to change the voltage such that the ring oscillator provides the output oscillating signal at the desired frequency.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Manolis FRANTZESKAKIS, Georgios Sfikas, Henrik Jensen, Yushi Tian, Jianfeng Shi
  • Publication number: 20130114623
    Abstract: An Ethernet link may comprise one or more link partners that may be communicatively coupled via one or more silent channels, One or more circuits and/or parameters corresponding to silent channels may be retrained, refreshed and/or updated based on various triggers, for example, fixed times, periodic or aperiodic time intervals, random or pseudorandom timer, events, link statistics, physical conditions such as noise, temperature level, cable type and/or cable length, communication from a corresponding link partner and/or based on programming from, for example, a layer above the physical layer. The retraining, refreshing and/or parameter updating may occur for one or more of an echo canceller, a far-end crosstalk canceller and a near-end crosstalk canceller corresponding to the one or more silent channels. Subsequent to the retraining, refreshing and/or parameter updating, the one or more silent channels may be activated and/or may remain silent.
    Type: Application
    Filed: December 21, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventor: Broadcom Corporation
  • Publication number: 20130116016
    Abstract: Methods and systems for power combining in a multi-port distributed antenna are disclosed and may include power combining signals from power amplifiers (PAs) on a chip. The PAs may be coupled to a single distributed antenna via antenna ports. A phase of each of the signals may be matched at the antenna ports via phase-matching circuitry. A characteristic impedance may be configured at the ports based on a location of the ports. The PAs may be impedance matched to the antenna ports via impedance matching elements. A power level of the power-combined signals may be monitored via a power detector coupled to the distributed antenna. The power detector may include an envelope detector, such as a diode. The antenna may be integrated on the chip or may be located external to the chip. The signals may include RF signals and the antenna may include a microstrip antenna.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventor: Broadcom Corporation
  • Publication number: 20130113536
    Abstract: The present disclosure is directed to a fractional-N digital phase locked loop (DPLL) that replaces the conventionally used time-to-digital converter (TDC) based phase detector with a bang-bang phase detector (BBPD). Compared to the TDC based phase detector, the BBPD has an often superior resolution for the same or similar amount of power and/or area consumption. Therefore, replacing the TDC based phase detector with a BBPD can reduce, or even eliminate, the common problem of spurs being added to the output signal generated by the DPLL because of the limited resolution of the TDC based phase detector. This can allow the DPLL to be used for the most demanding applications, such as in generating local oscillator signals for down-converting and demodulating weak signals received by a communication device, such as a cellular phone.
    Type: Application
    Filed: May 8, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Georgios SFIKAS, Emmanouil FRANTZESKAKIS
  • Publication number: 20130115907
    Abstract: An adjustable mixer is disclosed that is capable of operating in different modes in order to satisfy the mixing requirement of multiple radio access technologies (RATs). The adjustable mixer includes a LO signal generating portion and a mixing portion. Depending on the mixing requirements of the RAT, the adjustable mixer can operate in any one of multiple modes, each mode having a specific configuration for the LO signal generating portion and the mixing portion. The LO signal generating portion generates a LO signal having a particular duty cycle, depending on the selected mode, for use by the mixing portion. The mixing portion has an adjustable circuit configuration that can be dynamically reconfigured based on the selected mode, and which allows the mixing portion to successfully mix received signals using the corresponding LO signals generated by the LO signal generating portion.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Gerasimos THEODORATOS, Konstantinos VRYSSAS, Hamed PEYRAVI, Kostis VAVELIDIS
  • Publication number: 20130114771
    Abstract: Embodiments of this disclosure include methods in which spurs generated by the drifting of an oscillation frequency of an oscillation signal provided by a free-running oscillator may be minimized and/or eliminated from an output signal of a phase locked loop (PLL). Methods include adjusting the free-running oscillator to prevent the oscillation frequency from drifting so that the spurs are eliminated. Performance data generated when the communications device engages a communications channel that is known not to generate spurs is compared to performance data generated when the communications device engages a desired communications channel. The free-running oscillator is adjusted until the two types of performance data are matched. Other methods include adjusting the dithering module of the PLL to prevent the oscillation frequency from drifting so that the spurs are eliminated.
    Type: Application
    Filed: April 18, 2012
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Konstantinos Vavelidis, Nikolaos Haralabidis