Abstract: A method for avoiding signal interference between a first RF device and a second RF device is provided. The first and second RF devices are co-located and the first RF device is configured to operate within a semi-stationary range of a frequency band. The second RF device is configured to operate by changing channels within the frequency band. The method initiates with a communication interface being provided between the first RF device and the second RF device. Then, the second RF device receives the semi-stationary range and a mode for the first RF device through the communication interface. Next, the second RF device is adapted to avoid the semi-stationary range of the frequency band of the first RF device when the mode of the first RF device is in an active mode. An apparatus where two RF devices are co-located without causing interference for each other is also provided.

Abstract: A method of handling data packets in a network device and an apparatus for handling data packets in a network device are disclosed. The method includes receiving an incoming data packet and the incoming data packet is parsed to obtain a portion of the incoming data packet. That portion is compared with rules stored in a rule table, where each rule specifies a set of actions. A match between the portion and a particular rule of the rules is selected and a particular set of actions, specified by that particular rule is executed. Each rule includes a mask, a selection flag and a validity check that are used in the comparison of the portion with each rule. The rules may be compared with the packet portion serially or in a parallel fashion and if more than one rule matches the portion, the highest priority is selected as the matching rule.

Abstract: A method for flexibly configuring default values of a network device and a network device using such flexible configuration method is described. First, it is determined whether the default values are obtained through a microprocessor interface or a memory interface. When it is determined that the default values are obtained through the memory interface, a header is received from a memory through the memory interface it is determined from the header whether any default value of the network device should be updated. If the network device should be updated, then at least one configuration instruction is fetched from the memory and the at least one configuration instruction is interpreted. A register default value of the default values is changed, corresponding to the interpreted at least one configuration instruction.

Abstract: A video and graphics system provides square graphics pixels to blend images having 640×480 pixels, such as graphics images provided by some set top boxes and intended to be displayed at a 12.27 MHz display sample rate, with images having 704×480 pixels, such as ITU-R 601 compliant images such as NTSC SDTV images, having oblong pixels and displayed at a 13.5 MHz display sample rate. A sample rate converter including a multi-phase-multi-tap filter is used to generate square pixels. The multi-phase-multi-tap filter provides a good balance of sharpness, smoothness, anti-aliasing and reduced ringing. The multi-phase-multi-tap filter can also be used to convert images having 320×480 pixels to images having 704×480 pixels. The multi-tap filter can be used for scan rate conversion of graphics or video images for HDTV or SDTV applications.

Abstract: The present invention relates to a system and method for processing the read and write operations in a memory architecture. The system processing the read and write operations includes at least one local memory block and a synchronously controlled global controller coupled to the local memory block and adapted to extend the high portion of a clock pulse. The method for processing the read and write operations includes skewing a clock pulse using at least one word line interfacing with the global controller.

Abstract: A sensor is implemented in an integrated circuit. The sensor includes one or more sensor pads that are provided at or near a surface of the integrated circuit. One or more integrated circuit components such as a sense amplifier are provided in the integrated circuit die adjacent the sensor pads. One or more other components are provided in the integrated circuit die adjacent the sensor pads.

Abstract: Presented herein is a unified decoder architecture. A system comprises a video decoder, instruction memory, and a host processor. The video decoder decodes the video data encoded with the particular standard. The instruction memory stores a first set of instructions and a second set of instructions. The first set of instructions are for decoding encoded video data according to a first encoding standard. The second set of instruction are for decoding encoded video data according to a second encoding standard. The host processor provides an indication to the video decoder indicating the particular encoding standard. The video decoder executes the first set of instructions if the indication indicates that the particular encoding standard is the first encoding standard and executes the second set of instructions if the indication indicates that the particular encoding standard is the second encoding standard.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A method and system for discovering interconnections between a plurality of network devices arranged in a stacked configuration is provided. A probe packet, including a tag indicating a transmit port from which the probe packet was transmitted and a receive port at which the probe packet was received, is sent from one network device to a next network device. A routing packet is sent from each of the network devices, including information regarding the configuration of the stack of network devices. A master network device is elected. The master network device sends a topology packet, which includes final configuration information, to the other network devices.

Abstract: A physical layer device (PLD), comprising: a first serializer-deserializer (SERDES) device having a first parallel port; a second SERDES device having a second parallel port; a third SERDES device having a third parallel port; and a path selector being selectively configurable to provide either (i) a first signal path between the first and second parallel ports, or (ii) a second signal path between the first and third parallel ports.

Abstract: A method and apparatus for tagging digital photographs with geographic location data is described. In one example, a digital camera includes an imaging unit, a radio frequency/intermediate frequency (RF/IF) front end, and a memory. The imaging unit is configured to generate digital photographs. The RF/IF front end is configured to receive satellite positioning system signals and generate digital samples therefrom. The memory is configured to store a set of digital samples generated by the RF/IF front end with each digital photograph generated by the imaging unit. The digital samples produced by the RF/IF front end may be intermediate frequency samples and may include both in-phase samples and quandrature samples. Notably, the memory stores digital samples of GPS signals, rather than location data. The digital GPS samples may be processed by an off-line processing unit, such as a computer, to produce location data.

Abstract: In the current invention, a method and apparatus for automatically managing fragmentation on a disk is described. This is done by having a special Mode for preallocation and dumping of contiguous block chunks.

Abstract: An analog-to-digital converter (ADC) is provided. The ADC includes a reference voltage generator configured to generate reference voltages, an analog to digital converter core configured to receive an input signal and the reference voltages and to generate a digital signal representative of the input signal, the digital signal having a number of bits, and a controller configured to determine a quality of the input signal, and, based on a quality of the input signal, to control the number of bits of the digital signal and values of the reference voltages.

Abstract: A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit. The wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol. The power management unit couples to the wireless interface unit, the processing unit, and the input/output unit. The wireless interface unit supports paging operations in which the wireless interface device is able to receive a page during a wirelessly enabled host in a page scanning period that corresponds to a duration of the page hopping sequence of the host.

Abstract: A beamforming radio frequency (RF) circuit includes a plurality of antennas, a plurality of amplifiers and an adjust module. The plurality of antennas is operably coupled to interrelate a plurality of beamformed signal components with a beamformed signal. The plurality of amplifiers is operably coupled to interrelate the plurality of beamformed signal components with a plurality of adjusted signal components. The adjust module is operably coupled to interrelate coordinates of a signal with the plurality of adjusted signal components.

Abstract: A method of mirroring data to a mirrored to port in a plurality of switches. The method has the steps of determining if data was sent to all of said plurality of switches; determining if said data was sent to a mirrored to port (MTP); and resending said data to all of said plurality of switches if mirroring is enabled and said data was not sent to said MTP.

Abstract: A differential amplifier with surge protection is described. The differential amplifier includes a first output driver device, a second output driver device, a first replica device, a second replica device, a current comparator, and a clamp circuit. The first replica device is configured to be a replica of the first output driver device. The second replica device is configured to be a replica of the second output driver device. The current comparator is configured to generate a threshold current, and to compare the threshold current to a first current through the first replica device and a second current through the second replica device. The clamp circuit is configured to limit a third current through the first output driver device and a fourth current through the second output driver device if the current comparator determines that the threshold current is greater than the first current or the second current.

Abstract: A system and method are used to generate pseudo MPEG information from digital video information received at a digital video input. An artificial time stamp module is used to generated the pseudo MPEG information from associating an artificial time stamp with the digital video information. This pseudo MPEG information is received, for example, at an MPEG signal processor in a set-top box. The MPEG signal processor decodes the pseudo MPEG information and outputs the decoded MPEG information under control of the artificial time stamps.

Abstract: An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.

Abstract: A data capture system includes a data collection terminal and a wireless communications module comprising a transceiver arranged to transmit and receive radio frequency signals to and from a remote station in the data capture system. At least one flat antenna embedded within the communications module, and a pair of flat antennas may be included. A connector is arranged to removably couple the communications module with the data collection terminal and to transmit signals. A microprocessor is coupled with the connector and is arranged to standardize the logic levels and the format of the signals transmitted over the connector such that the data collection terminal may be engaged by the communications module through the connector without adjustment of the communications module.