Abstract: A Viterbi decoding demapping scheme for a wireless communications device processor substantially implemented on a single CMOS integrated circuit is described. By using log and antilog techniques, simplified multiplication and division operations in the branch metric calculation may be performed. A fully integrated receiver circuit with Viterbi decoder with branch metric computation consumes less circuit space and power than conventional solutions.

Abstract: A radio frequency integrated circuit includes a transmitter section, and a receiver section. The receiver section includes a low noise amplifier, down conversion module, an orthogonal-normalizing module, and a baseband processor. The low noise amplifier is operably coupled to amplify the inbound RF signals to produce amplified inbound signals. The down conversion module is operably coupled to convert the amplified inbound RF signals into baseband in-phase components and baseband quadrature components. The orthogonal normalizing module is operably coupled to obtain a 1st and 2nd coefficients that are based on at least one of power of the baseband in-phase components, power of the baseband quadrature components, and/or cross-correlation between the baseband in-phase component and baseband quadrature components.

Abstract: The present invention relates to a transceiver for bidirectional frequency division multiplexed transmission, a communication system including one or more transceivers. Optionally, the communication system is a communication system for a digital subscriber line. The transceiver comprises transmission means with a voltage source output or a current source output for transmitting data in a transmission frequency range, receiving means for receiving data in a receiving frequency range, and a coupling impedance for connecting the transmission means and the receiving means to a transmission medium. The magnitude of the coupling impedance in the transmission frequency range is smaller than the magnitude of the coupling impedance in the receiving frequency range if the transmission means has a voltage source output and is higher than the magnitude of the coupling impedance in the receiving frequency range if the transmission means has a current source output.

Abstract: A radio frequency integrated circuit (RFIC) includes a die and a package. The die includes a radio frequency (RF) input/output (I/O) section, an RF to baseband conversion section, and a baseband processing section. The package includes a ball grid array and an antenna. The antenna is located on one edge of the package and the solder balls of the ball grid array proximal to the antenna are used to couple the RF I/O section of the die to the antenna.

Abstract: In a method and apparatus for communicating data, a decision feedback equalizer equalizes received data to reduce channel related distortion in the received data. An extracted clock signal is generated from the equalized data. The phase of the extracted clock signal may be adjusted to compensate for processing delay during equalization of the received data. The extracted clock signal may be used to clock a retimer of the decision feedback equalizer to generate recovered data.

Abstract: A hand held radio host includes circuitry for selectively providing power to radiating transceiver elements and non-radiating application elements according to a plurality of power modes of operation to achieve desired effects and in a way that saves power and extends battery life. In one embodiment of the invention, the hand held host operates in one of three modes. In a full power mode, any selected application element, as well as all transceiver elements, are powered on at the same time. Thus, for example, a cell phone module, a wireless personal access network module, a wireless local area network module, and one of a pager/short message service message module may all be powered on at the same time to receive corresponding messages, calls, data sessions, etc.

Abstract: A radio frequency identification (RFID) interface includes first coil, a plurality of coils, and a control module. The first coil is associated with an RFID tag and the plurality of coils is associated with an RFID reader. Each of the plurality of coils has a different orientation with respect to at least one axis of a multi-dimensional axis system. The control module is coupled to enable at least one of the plurality of coils based on electro-magnetic coupling between the first coil and the least one of the plurality of coils.

Abstract: A system and method for meeting performance goals in an electronic system in an energy efficient manner. Various aspects of the present invention may comprise operating an electrical circuit at a current level of performance and a current level of energy efficiency by providing the electrical circuit with electrical power characterized by a current set of power characteristics (e.g., utilizing a power control module). The current level of performance may be determined (e.g., by a performance monitor) and compared to a desired level of performance (e.g., by the power control module). If the current level of performance is higher than the desired level of performance, then the electrical circuit may be operated at a next (e.g., lower) level of performance and a next (e.g., higher) level of energy efficiency by providing the electrical circuit with electrical power characterized by a next set of power characteristics.

Abstract: The present invention provides for a device to reduce the voltage swing for control signals. An input signal with a maximum potential of DVDD and minimum potential of AVSS is level shifted to a maximum potential of AVDD and a minimum potential of AVDD-DVDD. A series of control signals are generated from the level shifted input signal by standard logic cells. The shifting of the input signal reduces the voltage swing for the control signals. These control signals are then used to drive a device operating at a potential of AVDD.

Abstract: A method and apparatus for communicating between devices is described. In one embodiment, the method comprises allowing a mobile station to have a first connection to a network over a first interface and determining that the mobile station is attempting to have a second connection to the network over a second interface other than the first interface.

Abstract: A system includes at least one adaptive filter coupled to a first communication channel and at least one other communications channel. The at least one adaptive filter includes at least one set of adaptive filter coefficients. A memory stores at least one predetermined set of filter coefficient thresholds. The filter coefficient thresholds may be indicative of channel faults, channel to channel faults or a length of the channel. A controller is configured to compare the set of filter coefficients to the predetermined set of filter coefficient thresholds. The controller is configured to determine the information about the channels based on compare results.

Abstract: Switching between communication ports of a notebook is typically accomplished using an off-chip local area network (LAN) switch or an off-chip high speed analog multiplexer. This off-chip component is disadvantageous for several reasons, including: added cost of an additional component; increased overall power consumption because transmit amplitude loss; and reduced cable reach and link performance due to hybrid mismatch and signal distortions. To reduce cost and preserve electrical and networking performance, an integrated switch is provided to multiplex signals of a networking communication chip to multiple network paths.

Abstract: A differential preamplifier includes an active load with adjustable common-mode output level. The active load includes a transistor pair, a resistor pair, and a current source. The transistor load is employed to provide high gain, low offset, and a large bandwidth for the differential preamplifier. The resistor pair and current source are used to increase the common-mode output level of the differential preamplifier and to bias the transistor load. The current source can be varied to provide an adjustable common-mode output level suitable for driving next stage devices. The active load design allows the differential preamplifier to operate using only low power voltage supplies and with small-sized transistors.

Abstract: A gearbox is placed between two clock domains to allow data to be transferred from one domain to the other. Although the two domains may operate at the same clock frequency, typically one domain has a faster clock speed than the other. The gearbox is disposed between the two clock domains to control timing of data transfer from one to the other, by selecting a pattern which identifies when data is made transparent for the transfer. The gearbox allows a number of clock ratios to be selected, so that a particular clock ratio between the two domains may be readily selected in the gearbox for the data transfer.

Abstract: Data error often occurs during the process of data transmission or storage. Typically, a store-and-forward data switch uses the frame check sequence portion of a data frame to detect for error that occurred during transit to the switch. However, error could be introduced into the data frame when it is in the memory of the data switch. A network switch capable of single-error correction and double-error detection is provided to further protect the data frame while it is in the switch.

Abstract: The present invention is directed to methods and systems for scaling receive protocol processing by allowing the network load from a network adapter to be balanced across multiple CPUs based on RSS and/or QoS traffic classification techniques.

Abstract: A method is provided for payload header suppression within a wireless network in which a limited number of suppression indices are used to map suppression rules to data streams. Network resources are conserved by implementing precise classification algorithms to correctly identify incoming packets at the wireless device as belonging to a particular data stream, which ensures that a minimum number of suppression indices are utilized. Additionally, network resources are conserved by utilizing sophisticated algorithms for reusing suppression indices when new data streams are detected by the wireless device. One such reuse algorithm involves recycling the suppression index that has been least recently used in transmitting a packet with a suppressed payload header.

Abstract: An integrated circuit layout on a semiconductor substrate includes a plurality of circuit modules and power rails. One of the power rails is a positive voltage supply rail, and another one is a negative voltage supply rail or a ground rail. The positive voltage supply rail is located on a first layer of the semiconductor substrate. The negative voltage supply rail is located on a second layer of the semiconductor substrate. The second layer is located below the first layer. In this way, the integrated circuit layout area is reduced as negative voltage supply rail is moved to another layer.

Abstract: A via provides a plurality of electrical connections between conductors on different layers of a circuit board. The via includes an opening through the circuit board formed by a plurality of substantially partially overlapping bores. An electrically conductive plating is formed on an inner surface of the opening. The plating forms a plurality of distinct electrically conductive paths.

Abstract: A method of making a transistor driver circuit with a plurality of transistors, each having source and drain regions formed in a substrate. At least first and second interconnect layers are formed on top of the substrate. A first plurality of contacts connect the source regions to one of the first or second interconnect layers. A second plurality of contacts connect the drain regions to the other of the first or second interconnect layers. The first and second interconnect layers cover a region above the substrate area in which the plurality of transistors reside so as to achieve a low ohmic result. The second interconnect layer has openings therein for one of the respective first or second plurality of contacts to pass therethrough and couple to the at least one first interconnect layer. Either the first or second interconnect layers can function as an input or output for the circuit.