Abstract: A system for providing oversubscription of pipeline bandwidth comprises a steer module, an absorption buffer, an ingress packet processor (IPP), a memory management unit (MMU), and a main packet buffer. The steer module receives packets that include start of packet (SOP), middle of packet (MOP), and end of packet (EOP) cells, attaches a packet identifier to the cells, passes the MOP and EOP cells to the MMU, and stores the SOP cells and EOP metadata in the absorption buffer. The IPP processes the SOP cells and EOP metadata and passes the same to the MMU. The MMU stores the MOP, EOP, and processed SOP cells in the main packet buffer, combines, upon receiving the processed EOP metadata of each packet, the processed SOP cell, the MOP cells and the EOP cell of each packet to reconstruct each packet, and queues each reconstructed packet in an egress port queue.

Abstract: Methods, systems, and apparatuses are provided for resolution-independent dither sample insertion for audio transmissions. Audio transmitters transmit audio data streams to audio receivers. Data inactivity in the data stream triggers the audio receivers to enter power-saving/sleep modes in which synchronization with the audio transmitters is lost thus requiring time consuming resynchronization. Inactivity such as silence or zero-value data is detected in a data stream. Upon detection, a dither sample is inserted into the data stream and transmitted to the audio receiver to prevent the loss of synchronization. The dither sample may have a negative value and be formatted for resolution-independence with respect to the audio receiver.

Abstract: Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.

Abstract: A wireless device has a first SIM and a second SIM. The first SIM and the second SIM share a common radio system. A processing system determines whether to allocate use of the radio system to the second SIM for a time period that occurs when the first SIM is in an active connected mode using the common radio system in order to be able to at least one of transmit data and receive data. The processing system allocates or denies use of the radio system to the second SIM accordingly.

Abstract: Prediction of a channel capacity is accomplished based on a TDR echo without explicitly estimating the topology of the line. The prediction is based on obtaining a measured TDR echo, determining a theoretical TDR echo for a plurality of loop lengths, estimating the equivalent TDR length based on an optimization, updating the equivalent TDR length and utilizing the updated TDR length to predict one or more of the upstream and downstream data rates.

Abstract: A method is provided for avoiding in-device interference. The method may include determining a portion of a frequency band used for data reception by a first wireless modem that may be affected by interference from a data transmission by a second wireless modem. The method may further include causing an indication of the determined portion of the frequency band to be provided to the first wireless modem. A corresponding apparatus and computer program product are also provided.

Abstract: An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract: A near field RF communicator has an antenna circuit to couple with the H field of an RF magnetic field and a power supply deriver to derive a rectified auxiliary power supply from the received magnetic field. Rectification may be performed using an actively switched rectifier having a passive mode of operation. A sub regulation system is provided to regulate the auxiliary power supply to inhibit the possibility of temporally varying power requirements of the near field RF communicator or its host causing an apparent load modulation of a signal that is transmitted or received by the communicator.

Abstract: According to one exemplary embodiment, a programmable poly fuse includes a P type resistive poly segment forming a P-N junction with an adjacent N type resistive poly segment. The programmable poly fuse further includes a P side silicided poly line contiguous with the P type resistive poly segment and coupled to a P side terminal of the poly fuse. The programmable poly fuse further includes an N side silicided poly line contiguous with the N type resistive poly segment and coupled to an N side terminal of the poly fuse. During a normal operating mode, a voltage less than or equal to approximately 2.5 volts is applied to the N side terminal of the programmable poly fuse. A voltage higher than approximately 3.5 volts is required at the N side terminal of the poly fuse to break down the P-N junction.

Abstract: A multi mode wireless device can communicate with cellular and non-cellular networks. The device has first and second processors in communication with each other. In one arrangement, the first processor provides control processing for physical layer 1 processing for both the cellular and the non-cellular radio communications in parallel, and the second processor provides processing for data link layer 2 for both the cellular and the non-cellular radio communications in parallel, and the device can communicate with the cellular and non-cellular networks simultaneously. In another arrangement, the first processor provides control processing for physical layer 1 processing for both the cellular and the non-cellular radio communications in parallel, and the second processor provides processing for data link layer 2 and all layers above layer 2 in the device for both the cellular and the non-cellular radio communications in parallel.

Abstract: A communication system and a method are provided. The communication system includes an encoder configured to encode source data and output an encoded frame including a mother code or a plurality of concatenated daughter codes based on an encoding option. The mother code and the plurality of concatenated daughter codes have a same number of coded data symbols. The mother code includes a first source number of source symbols and a first parity number of parity symbols. The daughter code includes fewer source symbols and fewer parity symbols than the mother code.

Abstract: Embodiments of the present invention are directed to a scalable wireless bus for intra-chip and inter-chip communication. The scalable wireless bus includes a plurality of wireless-enabled components (WECs). In an embodiment, the scalable wireless bus may have at least one of the number of links among WECs and the capacity of said links adapted based on one or more factors. For example, the number of links and the capacity of the links may be adapted according to one or more of, among other factors, expected activity level over the wireless bus, desired power consumption, delay, and interference levels.

Abstract: Provided are systems and methods for secure provisioning of consumer network services. For example, there is a broadband modem for secure provisioning of a network service, where the broadband modem includes a controller having an embedded memory. The controller is configured to enable an unmanaged interface of the broadband modem, to establish a subscription interface link over the enabled unmanaged interface, and to download, over the subscription interface link, a subscriber firmware enabling a managed interface corresponding to the network service. Power cycling the broadband modem erases the downloaded subscriber firmware and disables the managed interface.

Abstract: Providing wireless transmission, where in a first transmission mode, transmitting a plurality of frames using a first interframe spacing interval. When in a second transmission mode, transmitting the plurality of frames using a second interframe spacing interval, wherein the second interframe spacing is less than the first interframe spacing.

Abstract: A control device that interacts with a television system. The control device may receive a user input identifying a video selection. At least one module of the control device may display video information corresponding to the video selection. The control device may alternately, or in addition, cause display of the video information on a television system. The control device may respond to a second user input identifying a storage selection by triggering storage of the video information in a storage unit corresponding to the storage selection. The control device may also receive a third user input identifying a replay request for other video information that may be selected from a plurality of stored videos. The control device may direct display of the other video information on the television system and/or on a display of the control device.

Abstract: Embodiments of the present invention provide systems for incorporating bonding processors while avoiding bonding processor buffer overflow by initiating retransmission requests on all data lines whenever corrupted data is encountered on one data line. Initiating these “extra” retransmission requests equalizes retransmissions delays over all transmission lines, preventing the bonding processor from receiving excess data that cannot be reassembled until the retransmission request is processed.

Abstract: Different data communication architectures receive a wide variety of content, including audio and video content, for consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, the communication architectures receive distributed video programming in the form of MPEG2 TS packets, flagged by marker packets. Channel bonding synchronization information may be present in packets defined above the data-link layer or received in fields within data-link layer frames.

Abstract: A power status signal is received in an integrated circuit that indicates an inductive power status of an inductive power module and a power status of an alternative source. A power mode is selected based on the at least one power status signal. A power mode signal is generated based on the selected power mode. A power supply signal is generated and adjusted in response to the power mode signal.

Abstract: The present invention provides methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS vile verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, the payload header suppress circuit examines the payload header suppression mask to identify one or more bits in the payload header for which an associated byte string is to be suppressed. Next, the associated byte string for each of the identified bits are suppressed to generate a suppressed packet payload header. Finally, a payload header suppression index is added to the suppressed packet payload header.

Abstract: According to one embodiment, a one-time programmable (OTP) device having a lateral diffused metal-oxide-semiconductor (LDMOS) structure comprises a pass gate including a pass gate electrode and a pass gate dielectric, and a programming gate including a programming gate electrode and a programming gate dielectric. The programming gate is spaced from the pass gate by a drain extension region of the LDMOS structure. The LDMOS structure provides protection for the pass gate when a programming voltage for rupturing the programming gate dielectric is applied to the programming gate electrode. A method for producing such an OTP device comprises forming a drain extension region, fabricating a pass gate over a first portion of the drain extension region, and fabricating a programming gate over a second portion of the drain extension region.