Abstract: A system includes a first capacitor group to facilitate determination of a first bit, and a second capacitor group to facilitate determination of a second bit in combination with the first capacitor group. The system further includes a delayed clock switch to engage the second capacitor group after determination of the first bit.

Abstract: A system for driving a first signal onto a wireline includes a driver and feedback circuitry. The driver drives a deterministic signal onto the wireline with an unknown impedance load. The feedback circuitry measures a quality of the output signal from the wireline and modifies a gain of the first signal based on the quality of the output signal. The driver then drives the first signal onto the wireline with the modified gain.

Abstract: A method, apparatus and computer program product are provided to allow the idle period to be defined in a more tailored manner, such as on a per station or per class of stations basis, as opposed to on a per access point basis. In the context of a method, an indication of an idle period is caused to be provided to a station. The method also causes an association with the station to be maintained for a period of time that is at least partially defined by the idle period. The period of time for which an association is maintained with the station is different than a period of time for which an association is maintained with another station in an absence of communication with the another station. A corresponding apparatus and computer program product are also provided.

Abstract: A digital transmitter with sample rate digital predistortion is disclosed. The transmitter includes a digital radio frequency (RF) signal generator configured to receive a baseband digital signal and transform the baseband digital signal to a digital RF signal. The digital transmitter further includes a sample rate predistorter configured to predistort the digital RF signal so as to compensate for distortion associated with the transmitter that is generated subsequent to an output of the sample rate predistorter, and resulting in a digital predistorted RF signal. The digital transmitter further includes a digital to analog converter configured to convert the digital predistorted RF signal to analog, resulting in an analog predistorted RF signal.

Abstract: A communication device, such as a smart phone, includes transmit/receive logic to cancel an interfering signal component. The interfering signal component may originate from a communication interface on the device itself. For example, transmissions from the communication interface may interfere with received signals at other communication interfaces on the device. Transmit/receive logic on others of the communication interfaces may use known characteristics of the interfering signal component to cancel the interfering signal component.

Abstract: A field-effect transistor (FET) on bulk substrate and a method of fabricating the same is discussed herein. The FET includes a dielectric layer disposed on the bulk substrate and a fin structure and a gate structure disposed on the dielectric layer. The dielectric layer includes alternating first and second dielectric regions. The fin structure includes a channel region interposed between a source region and a drain region. The gate structure is capacitively coupled to the fin structure and positioned between the source region and the drain region. Improved performance characteristics of FET is primarily achieved with the dielectric layer providing electrical isolation of the fin structure from the bulk substrate.

Abstract: An authorized user may be provided access to a service only when a wireless token assigned to the user is in the proximity of a computing device. A user's credential may be stored on an RFID token and an RFID reader may be implemented within a security boundary on the computing device. Thus, the credential may be passed to the security boundary without passing through the computing device via software messages or applications. The security boundary may be provided, in part, by incorporating the RFID reader onto the same chip as a cryptographic processing component. Once the information is received by the RFID reader it may be encrypted within the chip. As a result, the information may never be presented in the clear outside of the chip. The cryptographic processing component may cryptographically encrypt/sign the credential received from the token.

Abstract: A device for parallel symbol decoding may include a first and second block. The first block is configured to convert a bitstream into a stream of binary symbols corresponding to motion vector data and other compressed image data, insert length fields into the stream of binary symbols that are each indicative of a number of consecutive binary symbols that correspond to motion vector data, and store the stream of binary symbols in a buffer. The second block is configured to retrieve the stream of binary symbols from the buffer, determine, based at least in part on the inserted length fields, consecutive binary symbols that correspond to motion vector data, decode the consecutive binary symbols that correspond to motion vector data via a first decode path, and to decode binary symbols that correspond to other compressed image data via a second decode path that is independent of the first decode path.

Abstract: A circuit includes a switching regulator that produces a first voltage supply output and that includes an operational supply input. The operational supply input may provide power for running the logic in the switching regulator. The circuit also includes a linear regulator that produces a second voltage supply output. A control circuit accepts the first voltage supply output and the second voltage supply output and includes a power output connected to the operational supply input. The control circuit is configured to pass the second voltage supply output to the power output until the first voltage supply output is established. After the first voltage supply is established, the control circuit instead passes the first voltage supply output to the power output through the control circuit. The first voltage supply output may also then provide power to the circuitry that would otherwise have been powered by the linear regulator.

Abstract: A device for performing congestion detection and management at a node of a network may include a congestion management module to monitor an arrival and a departure rate of data packets associated with a queue, a queue size, or a rate of change of the queue size. The congestion management module may identify the queue as a congested queue by one of determining that the arrival rate of the data packets associated with the queue is larger than the departure rate of the data packets associated with the queue, the queue size is larger than a first threshold, or the rate of change of the queue size is larger than a second threshold. The congestion management module may identify the congested queue as a congestion root by determining that the congested queue is not affected by a flow-control signal. A queue buffer temporarily stores data packets associated with the queue.

Abstract: An integrated circuit (e.g., a system application processor IC) includes power supply lines that include a section having a known resistance. Measurement connections across the section are also present. The measurement connections may run to an Analog to Digital Converter (ADC). The ADC measures the voltage drop across the section and therefore the power consumed by the circuitry supplied by the power supply line. The power consumption by any particular circuitry in the IC may be monitored, from entire processing cores, down to single transistors. An analysis system may read the power consumption measurements and accordingly adapt the operation of the code segments in the system to meet specified power or energy consumption targets, e.g., to minimize the power and energy consumption.

Abstract: One embodiment of the present invention provides a system that facilitates dynamic allocation of upstream bandwidth in a passive optical network which includes a central node and at least one remote node. Each remote node is coupled to at least one logical entity, which corresponds to a device or a user, that transmits upstream data to the central node and receives downstream data from the central node. The central node is coupled to an external network outside of the passive optical network through a shared out-going uplink.

Abstract: Methods and systems for communicating information within a network are disclosed. The method may include receiving at a first wireless handheld communication device (WHCD), a communication signal from an intermediate communication device comprising at least one identifier (ID) of at least a second WHCD authorized to communicate with the intermediate communication device. The first WHCD may maintain a list of identifiers for authorized devices that are allowed to communicate with the first WHCD. The first WHCD need not be paired with any device that is specified by the list of identifiers for authorized devices maintained by the first WHCD. A communication link may be established between the first WHCD and the second WHCD via the intermediate communication device, if the list of identifiers for authorized devices maintained by the first WHCD comprises the ID of the second WHCD.

Abstract: A secure server may be utilized to support watermark embedding in multimedia system-on-chips, by generating an encrypted and signed watermarking signal for use in each particular system-on-chip. The encrypted and signed watermarking signal is generated based on a unique per-chip ID associated with the particular system-on-chip. The watermarking signal may be signed by the secure server utilizing a random number generated in and/or provided by the particular system-on-chip. The watermarking signal may be encrypted by the secure server based on a secret encryption key associated with the particular system-on-chip. The secret encryption key may be determined based on the unique per-chip ID associated with the particular system-on-chip. The secure server may store information, received from various system-on-chips, for use during generation of watermarking signals.

Abstract: Aspects of a method and system for calibrating a power amplifier are provided. In this regard, one or more reference signals may be generated and may be utilized to characterize a signal strength indicator (SSI). Additionally, measurements of power output by a power amplifier by the SSI may be corrected based on the characterization of the SSI. Accordingly, the power amplifier may be adjusted based on the corrected measurements. The reference signals utilized to characterize the SSI may be limited to a determined range. In this regard, signal strength of the reference signals, as measured by the SSI, may be compared to the expected signal strength in order to characterize the SSI. The SSI may be characterized over a range of frequencies and/or signal strengths. Similarly the power amplifier may be adjusted over a range of frequencies and/or signal strengths.

Abstract: A wireless local area network (WLAN) transmitter includes a baseband processing module and a plurality of radio frequency (RF) transmitters. The processing module selects one of a plurality of modes of operation based on a mode selection signal. The processing module determines a number of transmit streams based on the mode selection signal. The processing of the data further continues by converting encoded data into streams of symbols in accordance with the number of transmit streams and the mode selection signal. A number of the plurality of RF transmitters are enabled based on the mode selection signal to convert a corresponding one of the streams of symbols into a corresponding RF signal such that a corresponding number of RF signals is produced.

Abstract: Embodiments of an apparatus including a user network interface configured to receive from a network a packet to be transmitted upstream over a PON are provided herein. The packet is marked with a first category type or a second category type. The apparatus further includes an upstream first in, first out (FIFO) queue configured to store the packet if the packet is marked with the first category type or the second category type.

Abstract: A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between, for example, chips located on a common PCB. A multi-level modulated data signal is generated to transmit/receive data over the short reach channel medium. Multi-level modulated data signals, such as four-level PAM, reduce the data signal rate therefore reducing insertion loss, power, complexity of the circuits and required chip real estate.

Abstract: A content addressable memory (CAM)-based search engine is disclosed that reduces power consumption during a plurality of different search operations concurrently performed in a plurality of device pipelines by selectively applying one of a number of different power reduction techniques for each pipeline in response to configuration data indicating the type of search operation that is being performed in the pipeline.

Abstract: According to an example embodiment, a communications receiver may include a variable gain amplifier (VGA) configured to amplify received signals, a VGA controller configured to control the VGA, a plurality of analog to digital converter (ADC) circuits coupled to an output of the VGA, wherein the plurality of ADC circuits are operational when the communications receiver is configured to process signals of a first communications protocol, and wherein only a subset of the ADC circuits are operational when the communications receiver is configured to process signals of a second communications protocol.