Abstract: An apparatus may comprise a secure portion of a chip and an external memory device. The secure portion of the chip may be configured to receive an encryption key, and the memory device may be configured to receive an encrypted processing code. The secure portion of the chip may be configured to verify the encrypted processing code by decrypting the encrypted processing code using the encryption key. A non-secure portion of the chip may be configured to write the encrypted processing code on the memory device while the memory device is coupled to the chip. The encryption key may be associated with an identifier of the chip.

Abstract: A communication device is configured adaptively to process a receive signal based on noise that may have adversely affected the signal during transition via communication channel. The device may be configured to identify those portions of the signal of the signal that are noise-affected (e.g., noise-affected sub-carriers of an orthogonal frequency division multiplexing (OFDM) signal), or the device may receive information that identifies those portions of the signal that are noise-affected from one or more other devices. The device may be configured to perform the modulation processing of the received signal to generate log-likelihood ratios (LLRs) for use in decoding the signal. Those LLRs associated with noise-affected portions of the signal are handled differently than LLRs associated with portions of the signal that are not noise-affected. The LLRs may be scaled based on signal to noise ratio(s) (SNR(s)) associated with the signal (e.g., based on background noise, burst noise, etc.).

Abstract: A communication system may include a number of communication channels operating in accordance with one or more communication standards. The channels may generate data clocks from one or more master clock signals. The phase of the data clocks may be aligned using phase detectors for determining respective phase relationships and using phase interpolators for adjusting respective clock phases. The communication system may include communication channels that operate at different data clock frequencies. These systems may divide their respective data clocks in order to achieve a common clock frequency for use in their phase alignment. The phase detectors and associated circuitry may be disabled to save power when not in use.

Abstract: A configurable transceiver may include a configurable receiver, a configurable transmitter, and a digital signal processor (DSP). One or more components of the configurable receiver and/or the configurable transmitter may be a block that includes an array of components, such as an array of amplifiers, an array of filters, etc. The DSP may determine a configuration of the configurable receiver that satisfies a bit error rate threshold and minimizes power consumption. The DSP may configure the blocks of the configurable receiver in accordance with the determined configuration of the configurable receiver. The DSP may receive an indication of a modulation scheme being used for transmitted data and may determine a configuration of the configurable transmitter for the modulation scheme that satisfies an error vector magnitude threshold and minimizes power consumption. The DSP may configure the blocks of the configurable transmitter in accordance with the determined configuration of the configurable transmitter.

Abstract: A method and apparatus is disclosed to restrict access services to a communication device. The services may be restricted based upon hardware characteristics, geographic characteristics, user specifications of the communication device and/or specified rules. The method and apparatus may restrict its service to only specific applications suitable for the environment and the time. Upon a request for a service that is now restricted, the method and apparatus may notify an end user that the service was requested. Further, the method and apparatus may notify an originator of the request that the service is not available and may ask for a short message to be delivered to the end user.

Abstract: A network device for implementing high-rate greenfield transmission in a mixed mode frame structure. The network device is configured to transmit a mixed mode frame on two adjacent channels. The mixed mode frame comprises at least two backward compatible portions of a first frequency and a greenfield portion of a second frequency.

Abstract: Embodiments provide an enhanced approach for Higher Priority Public Land Mobile Network (HPPLMN) search. In one embodiment, information acquired during a search (for each detected cell per frequency channel) is saved in a database and persisted in the database based on a validity time. An idle mode-to-connected mode transition by the UE, rather than aborting the search, only suspends the search for it to be resumed at a later time upon a connected mode-to-idle mode transition by the UE. Saved search data that is valid at the time of the transition is maintained and the frequency channel(s) associated with it is not re-searched in the current search. In an embodiment, the search is resumed based on weights that are associated with frequency channels, where a weight indicates a priority for visiting the frequency channel.

Abstract: Systems and methods are provided that allow a secure processing system (SPS) to be implemented as a hard macro, thereby isolating the SPS from a peripheral processing system (PPS). The SPS and the PPS, combination, may form a secure element that can be used in conjunction with a host device and a connectivity device to allow the host device to engage in secure transactions, such as mobile payment over a near field communications (NFC) connection. As a result of the SPS being implemented as a hard macro isolated from the PPS, the SPS may be certified once, and re-used in other host devices without necessitating re-certification.

Abstract: Methods, apparatuses, computer software and computer program products for indicating filtering capabilities of user equipment. Information associated with filtering capabilities of the user equipment is transmitted from the user equipment to a communication counterpart.

Abstract: A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between, for example, chips located on a common PCB. A multi-level modulated data signal is generated to transmit/receive data over the short reach channel medium. Multi-level modulated data signals, such as four-level PAM, reduce the data signal rate therefore reducing insertion loss, power, complexity of the circuits and required chip real estate.

Abstract: A technique in which at least one controlling bridge controls data traffic among devices located lower in hierarchy below the controlling bridge. Those devices include a plurality of porting devices, such as line modules and port extenders, which ultimately communicate with an end point device, referred to as a station. At least two physical pathways from a controlling bridge to a station are grouped together into a virtual trunk to provide multiple physical pathways for packet transfer when operating in a dual-homed mode.

Abstract: A transceiver circuit including a digital-to-analog converter, a filter coupled to the digital-to-analog converter, a passive mixer coupled to the filter, via a buffer and a multi-stage power amplifier coupled to the passive mixer via a passive amplifier. A transmitter and method for amplifying a RF signal for transmission are also provided.

Abstract: An apparatus, method, and system embodying some aspects of the present embodiments for arbitrating communication between multiple communication devices are provided. The arbitration system include two communication devices and a packet traffic arbiter. The communication devices can be configured to receive or transmit data transmissions. The data transmissions can comprise protocol information. The protocol information can comprise transmission coordination information, handover information, and spectrum information. The packet traffic arbiter can be configured to coordinate the data transmissions between the two communication devices. The coordination can reduce traffic collisions or interference between low-power activities of the two communication devices.

Abstract: A circuit for baseband harmonic rejection includes multiple transconductance cells coupled to one another at outputs of the transconductance cells and configured to receive down-converted signals that vary from one another to produce a weighted current signal proportional to a voltage corresponding to a respective down-converted signal. The circuit also includes a feedback impedance coupled between an input of one of the transconductance cells and the outputs of the transconductance cells. Each of the transconductance cells has an effective transconductance of a first magnitude for frequency components of the down-converted signal arising from a first harmonic and an effective transconductance of a second magnitude less than the first magnitude for frequency components of the down-converted signal arising from harmonics at integer multiples of the first harmonic.

Abstract: An integrated chip (IC) package may include a waveguide that comprises a cavity, a first chip and a second chip. The first chip includes a first radio frequency (RF) transceiver that may be coupled to a first probe that extends into the cavity of the waveguide and/or a first antenna that is positioned over a first opening in the waveguide. The second chip includes a second RF transceiver that may be coupled to a second probe that extends into the cavity of the waveguide and/or a second antenna that is positioned over a second opening in the waveguide. The first and second chips may be configured to communicate with one another exclusively by the first and second RF transceivers transmitting and receiving RF signals through the cavity of the waveguide via the first and second probes and/or the first and second antennas.

Abstract: Aspects of a method and system for symmetric transmit and receive latencies in an energy efficient PHY are provided. In this regard, a delay introduced by a PHY of a network device for outbound traffic and a delay introduced by the PHY for inbound traffic may be controlled such that a transmit delay of the network device is equal, within a tolerance, to a receive latency of the network device. The delays may be controlled based on whether one or more energy efficiency features are enabled in the PHY. The delay introduced by the PHY for outbound traffic may be controlled based on an amount of buffered inbound traffic. The delay introduced by the PHY for inbound traffic may be controlled based on an amount of buffered outbound traffic. The delays may be controlled such that said receive latency and the transmit latency are approximately constant regardless of a mode of operation of the network device.

Abstract: Embodiments provide methods and systems for enabling opportunistic wakeup of a device from a sleep mode. Specifically, embodiments recognize that often incoming packets into a module in a low power mode are not time-critical and can be deferred for processing by the module after a scheduled wakeup time of the module. As such, embodiments provide methods and systems for identifying an incoming packet into a module and determining whether or not to cause the module to exit the low power mode based on characteristics of the incoming packet. Embodiments may be applied to a modem in a wired or wireless device but are not limited as such, and extend to any device which may benefit from the opportunistic wakeup embodiments described herein.

Abstract: Communication between chips is provided using a transmission line. Any one of the chips may tap into the transmission line, and communicate with another chip tapped into the transmission line by transmitting a radio frequency (RF) signal to the other chip via the transmission line or receiving an RF signal from the other chip via the transmission line. The transmission line may include a microstrip transmission line, a waveguide, a stripline transmission line, or another type of transmission line. The chips may use the transmission line to communicate data, control and/or clock signals with one another.

Abstract: An exemplary implementation of the present disclosure includes a stacked package having a top die from a top reconstituted wafer situated over a bottom die from a bottom reconstituted wafer. The top die and the bottom die are insulated from one another by an insulation arrangement. The top die and the bottom die are also interconnected through the insulation arrangement. The insulation arrangement can include a top molding compound that flanks the top die and a bottom molding compound that flanks the bottom die. The top die and the bottom die can be interconnected through at least the top molding compound. Furthermore, the top die and the bottom die can be interconnected through a conductive via that extends within the insulation arrangement.

Abstract: A method, apparatus and computer program product are provided for enhancing data exchange between an access point (AP) and station (STA) in a wireless network when the exchange must be interrupted for the AP to perform other services while data remains buffered for later exchange. AP downlinks an indicator that more data remains for exchange together with a request for the STA to enter sleep mode for a duration scheduled by the AP. Sleep duration may be sent in the medium access control (MAC) header of a data frame, with the indicator of more data and the indicator of the sleep mode request being contained in the frame control (FC) segment of the MAC header. The STA may uplink an acknowledgement (ACK) of the sleep mode. Alternatively, the AP may downlink an ACK of the STA's indication of more data confirmation together with sleep mode indication and duration.