Abstract: The present invention presents a method and a system for mitigating effects of clock harmonics in the receiver. The receiving signal may be monitored in such a way that the interfering harmonic component is tracked. When the interfering frequency is found out, the system determines the clock or clocks in the transceiver which are contributing to the interfering spurious tone. After that, the contributing clock(s) frequency is selected so that the effect of the spurious tone in the receiving passband is minimized or mitigated. This is performed by selecting a suitable clock frequency resulting in the spurious tones all falling outside the receiver passband; or in an OFDM system, by choosing a clock frequency deriving the spurious tone straight onto a subcarrier signal frequency.

Abstract: An analog-to-digital converter (ADC) includes reference charge cancellation features to at least partially offset a voltage distortion on a bypass capacitor of a reference buffer due to a voltage reference hit taken by a switched capacitor bank with which the bypass capacitor is connected. The charge cancellation may be configured in logic to be input signal dependent because different resolved bits or transitions between resolved bits may cause different amounts of voltage reference hits. By adjusting the bypass capacitor in response to each of at least some of the reference hits while resolving a word of bits, the reference voltage signal provided by the bypass capacitor undergoes far less settling, remaining more stable and linear for a more accurate reference voltage. Furthermore, a smaller capacitor may be used for the bypass capacitor, reducing power consumption and area on chip.

Abstract: Systems and techniques for equalization of a response of a receiver. In one embodiment, a response of a device to a known signal is measured to generate a measured signal. A processor is operated to apply an initial weighting to the measured signal and the known signal. The processor is operated to iteratively perform the operations of constructing an equalizer based on the weighted signals, testing the performance of the equalizer on the measured signal, and adjusting weighting applied to the measured signal and the known signal, until the performance of the equalizer on the measured signal meets a predetermined criterion.

Abstract: A system and method supporting access, coordination, modification, updating, and management of multiple sources of multimedia information resident on a plurality of access device is disclosed. A broadband access gateway may support applications that perform user services involving multiple sources of multimedia information across a network by acting as a focal point for access to multimedia information related to the applications. Using information that identifies such sources, the broadband access gateway may coordinate modification of one or more multimedia information sources based upon the content of other related sources of multimedia information. One such application may include the coordination of calendars for the planning of a meeting involving multiple participants.

Abstract: An interrupt management apparatus is provided for managing interrupt events generated by, for example, peripheral devices and computing modules. The interrupt management apparatus has an event decoder for receiving one or more interrupt signals from one or more interrupt sources and for decoding a received interrupt signal to produce control data relating to an interrupt event. The apparatus also has a sequence memory for storing one or more sequences, a sequence including one or more steps for handling one or more interrupt events, and one or more sequencers for interpreting one or more steps of a sequence stored in the sequence memory, the one or more sequencers being arranged to receive said control data from the event decoder. This enables the apparatus to manage said interrupt events without assistance from a central processing unit.

Abstract: A motion judder cancellation system may convert a source frame rate to an output frame rate. A repetition pattern within a sequence of source frames may be determined. Temporal position for output frames within a sequence may be based on a source frame position and a source frame interval fraction. An image blend mode such as motion vector interpolation may be determined for each output frame. Temporal position and/or image blend mode may be modified. Accordingly, motion judder and/or visible interpolation artifacts may be modified. Output frames may be generated based on the determined or modified image blend mode and/or the determined or modified temporal position of output frames. The output frames may be spaced temporally at even intervals or spacing. Frame rate may be increased and one or more repeated frames within a sequence of frames may be inserted. Generation of output frames may be programmed.

Abstract: A network management module includes a network interface module, memory, and a processing module. The network interface module is operable for coupling the network management module to a vehicle communication network. The processing module is operable to manage a global vehicle network communication protocol that includes instituting a content-based network packet processing protocol and managing the vehicle communication network to support the network packet processing protocol. The content-based network packet processing protocol includes determining content type of a packet, determining a processing requirement of the packet, and prioritizing execution of the processing requirement based on the content type.

Abstract: A method, apparatus and computer program product are configured to provide calibration accuracy in an analog filter. In this regard, a method is provided that includes estimating a cutoff frequency for an analog filter. The method further includes causing a filter tuning word to be modified based on the estimated cutoff frequency for the analog filter. The method also includes determining a residual cutoff frequency mismatch for the analog filter. The method also includes causing an equalizer configuration to be selected for a digital filter based on the determined residual cutoff frequency mismatch.

Abstract: A method and system for an iterative multiple user multiple input multiple output (MU-MIMO) communication system are presented. In one aspect, a current iteration beamforming matrix may be generated based on a current iteration matched filter matrix for each of a plurality of user devices. A subsequent iteration matched filter matrix may be generated based on the current iteration beamforming matrix for each of the plurality of user devices. A subsequent iteration beamforming matrix may be generated based on the subsequent iteration matched filter matrix for each of the plurality of user devices. A succeeding iteration beamforming matrix may be generated based on an iteration count value and/or based on one or more difference values. The one or more difference values may be computed based on the plurality of subsequent iteration beamforming matrices and the plurality of current iteration beamforming matrices generated for the plurality of user devices.

Abstract: An OFDM frame synchronisation method in which the symbols of the preamble carry a code. The detection of the code allows the frame synchronization in presence of low SNR.

Abstract: A method and device for transmitting a frame of a wireless communication begins by generating a preamble of the frame that includes a short training sequence and at least one long training sequence. The at least one long training sequence includes non-zero energy on each of a plurality of subcarriers except a DC subcarrier. The at least one long training sequence corresponds to the number of antennas and applicable wireless communication standards. A matrix is defined to represent the at least one long training sequence. The preamble is compatible with legacy and current standards. A channel is defined with a set of sub carriers to transmit the frame.

Abstract: According to an exemplary embodiment, a method for fabricating a MOS transistor, such as an LDMOS transistor, includes forming a self-aligned lightly doped region in a first well underlying a first sidewall of a gate. The method further includes forming a self-aligned extension region under a second sidewall of the gate, where the self-aligned extension region extends into the first well from a second well. The method further includes forming a drain region spaced apart from the second sidewall of the gate. The method further includes forming a source region in the self-aligned lightly doped region and the first well. The self-aligned lightly doped region and the self-aligned extension region define a channel length of the MOS transistor, such as an LDMOS transistor.

Abstract: Aspects of the invention comprise a remote tracking and control server operable to transparently activate control of resources and to monitor operations on a target handheld communication device utilizing code installed on the handheld device. The resources may comprise a camera, microphone, GPS receiver, input device, display, speaker, wireless and/or wire-line transmitter and/or receiver. The monitoring and/or controlling activity is protected from interruption. The handheld device may be accessed by a securely stored unique identifier. Access to the controlling function and/or the resources by a user of the handheld device may be restricted. Monitored information is stored on the handheld device and communicated to the tracking server. The control server may receive monitored information from the handheld device whenever the device is coupled to a communication network. Monitoring may be initiated based on detected motion, sound, user input, video and/or touch.

Abstract: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

Abstract: There are disclosed herein various implementations of semiconductor packages having a selectively conductive film interposer. In one such implementation, a semiconductor package includes a first active die having a first plurality of electrical connectors on a top surface of the first active die, a selectively conductive film interposer situated over the first active die, and a second active die having a second plurality of electrical connectors on a bottom surface of the second active die. The selectively conductive film interposer may be configured to serve as an interposer and to selectively couple at least one of the first plurality of electrical connectors to at least one of the second plurality of electrical connectors.

Abstract: Multi-user uplink communications within multiple user, multiple access, and/or MIMO wireless communication systems. Within such communication systems, uplink communications from various receiving wireless communication devices (e.g., STAs) to a transmitting wireless communication device (e.g., AP) may occur in any of a number of various dimensions or combinations thereof including MU-MIMO dimension and frequency dimension (asynchronous FDM or synchronous FDM). In accordance with such uplink communications, various considerations such as time synchronization, frequency synchronization, and/or power control (including wireless communication device grouping). When performing uplink asynchronous FDM signaling, power control as grouping is used. When performing uplink synchronous FDM signaling, time synchronization, frequency synchronization, and power control (such as including wireless communication device grouping) is performed.

Abstract: Disclosed are various embodiments providing carrier separation to effectuate a dual carrier operation of a wireless communication device. Processing circuitry may acquire a single carrier signal based on a determined time slot boundary, the single carrier signal comprising primary carrier data. The processing circuitry may receive a dual carrier radio frequency signal based on the determined time slot boundary, the dual carrier radio frequency signal comprising the primary carrier data and secondary carrier data. The processing circuitry may then generate a baseband dual carrier signal by demodulating the dual carrier radio frequency signal. The processing circuitry may separate the primary carrier data from the baseband dual carrier signal by filtering the baseband dual carrier signal. The processing circuitry may also separate the secondary carrier data from the baseband dual carrier signal by filtering the baseband dual carrier signal.

Abstract: Provided is a high speed bit stream data conversion circuit that includes input ports to receive first bit streams at a first bit rate. Data conversion circuits receive the first bit streams and produce second bit stream(s), wherein the number and bit rate of the first and second bit stream(s) differ. Symmetrical pathways transport the first bit streams from the input ports to the data conversion circuits, wherein their transmission time(s) are substantially equal. A clock distribution circuit receives and symmetrically distributes a clock signal to data conversion circuits. A central trunk coupled to the clock port and located between a first pair of circuit pathways with paired branches that extend from the trunk and that couple to the data conversion circuits make up the clock distribution circuit. The distributed data clock signal latches data in data conversion circuits from the first to the second bit stream(s).

Abstract: Systems and methods for distributing power to a plurality of integrated circuit dies are provided. In some aspects, a system includes a substrate and a plurality of integrated circuit dies disposed on the substrate. Each of the plurality of integrated circuit dies includes a circuit and a target inductive element coupled to the circuit. The system also includes a power supply module configured to generate a source power signal. The system also includes at least one source inductive element configured to electromagnetically couple the source power signal to one or more of the plurality of the target inductive elements to generate one or more target power signals that supply power to one or more corresponding circuits.

Abstract: A UE configured to adjust a L3 filter coefficient, comprises initializing a first filter coefficient of a first filter and a second filter coefficient of a second filter based on a primary filter coefficient of a primary filter received from an associated wireless network entity; adjusting the primary filter coefficient by one of: setting the primary filter coefficient to the first filter coefficient if a first difference between a measurement result of the primary filter and a first measurement result of the first filter is less than a first coefficient threshold and setting the primary filter coefficient to the second filter coefficient if a second difference between the measurement result of the primary filter and a second measurement result of the second filter is less than a second coefficient threshold; and applying the adjusted primary filter coefficient to measurements of one or more cells in an active cell set.