Abstract: One or more methods and systems to efficiently process MPEG video in order to perform a reverse play or slow rewind function are presented. The method reduces system bandwidth required to implement the reverse play function when SD MPEG video is received by the MPEG decoder. Furthermore, the method maximizes the use of memory resources when one or more video frame buffers are implemented. The system comprises a first subsystem feeding one or more sequences of frames (e.g., feeding sessions) to a second subsystem. The first subsystem defines a set of parameters that is used to determine the one or more feeding sessions provided to the second subsystem. The second subsystem subsequently decodes the one or more feeding sessions using the set of parameters such that the video may be displayed.

Abstract: Various aspects of processing video information in a display controller may comprise calculating a decision value for a current field based on a video format of the current field and an output video format. The decision value may be compared to a threshold value. In instances where the decision value is greater than said threshold value, scaling may be performed prior to performing capturing. In instances where the decision value is less than said threshold value, capturing may be performed before performing scaling.

Abstract: Probe data is directly communicating between a probe device and a component of an external device via a wireless millimeter wave communication path. A probe application is executed in accordance with the probe data, for diagnostics and testing, to update component software, and to upload other files and applications to the component.

Abstract: Certain embodiments of a method and system for safe and efficient power down and drawing minimal current when a device is not enabled may comprise receiving within a network adapter chip (NAC) a signal that indicates a reduced power mode. Based on this signal, the NAC may control an off-chip voltage source that provides reduced voltage to circuitry within the NAC. The off-chip voltage source, which may comprise a first PNP transistor and a second PNP transistor, may reduce a voltage to a first voltage and a second voltage. The NAC may also reduce current through the off-chip voltage source to approximately zero amperes and an output voltage of the off-chip voltage source to approximately zero volts. The first voltage and/or the second voltage may be fed back to control the output voltage and current of the off-chip voltage source.

Abstract: A video transmission system includes a transceiver module that receives location data from a remote device and that transmits a video signal to the remote device. A network module receives a video stream from a video source and that generates the video signal based on the location data.

Abstract: In a signal processing system, a programming system and method for a video network are provided. An event may trigger an RDMA controller to execute current instructions in a register update list. The triggering event may be a start-of-field signal from a live source or an end-of-frame signal. The current instructions may be used to modify the mode of operation of at least one of the network elements in the video network. The modification to the mode of operation may depend on whether the current video field is top field originated or bottom field originated. An interrupt may be used to initiate an interrupt handler that generates at least one new instruction and that updates the new instructions in the register update list. When a trigger occurs prior to an update of the register update list, the RDMA controller may execute the current instructions in the register update list.

Abstract: A system and method for reducing power consumption during periods of low link utilization. A single enhanced core can be defined that enables operation of subset of parent physical layer devices (PHYs). The subset and parent PHYs can have a fundamental relationship that enables synchronous switching between them depending on the link utilization state.

Abstract: Aspects of a method and system for controlling a clock frequency in a network device based on aggregate throughput of the device are provided. In this regard, for a network device comprising one or more network ports, a limit on aggregate throughput of the device during a time interval may be determined and an operating frequency of a clock within the network device may be controlled based on the determined limit on aggregate throughput. The limit on aggregate throughput may be determined based on past, present, and/or expected traffic patterns; how many of the device's network ports are active during the time interval, a data rate at which each of the active network ports operates during the time interval; a type of data communicated via the network ports; and/or one or more applications running on the network device during the time interval.

Abstract: Methods, systems and computer program products to implement hardware memory locks are described herein. A system to implement hardware memory locks is provided. The system comprises an off-chip memory coupled to a SOC unit that includes a controller and an on-chip memory. Upon receiving a request from a requester to access a first memory location in the off-chip memory, the controller is enabled to grant access to modify the first memory location based on an entry stored in a second memory location of the on-chip memory. In an embodiment, the on-chip memory is Static Random Access Memory (SRAM) and the off-chip memory is Random Access Memory (RAM).

Abstract: An audio/video (A/V) capture device and method that capture audio and video in a spatially synchronized manner. In one implementation, the device and method automatically adjust the shape of a spatial directivity pattern of a microphone array used for acquiring audio so that the pattern is spatially synchronized with an amount of video zoom being applied by a video acquisition section to acquire video. For example, a wider spatial directivity pattern may automatically be used during wide-angle shots and a narrower spatial directivity pattern may automatically be used during close-ups. This beneficially allows for the consistent attenuation of audio signals received from audio sources that lie outside the field of view of the video acquisition section while passing or even enhancing audio signals received from audio sources that lie within the field of view even though the width of the field of view has changed.

Abstract: Methods and apparatus for improved electrical, mechanical and thermal performance of stacked IC packages are described. An IC package comprises a substrate, a first die, a second die, and an interposer with an opening in a first surface of the interposer configured to accommodate the first die. The first IC die is attached a first surface of the substrate. The interposer is mounted on the first surface of the substrate such that the first IC die is placed within the opening in the interposer. The second die is mounted on a second surface of the interposer. Wire bonds couple bond pads on the first surfaces of IC die are coupled to the first surface of the substrate. A mold compound encapsulates the first IC die, the second IC die, the interposer and the wire bonds.

Abstract: Systems and methods that provide channel bonding in multiple antenna communication systems are provided. In one embodiment, a method for signal transmission over a plurality of antennas of a transmitter may include, for example, one or more of the following: demultiplexing an input signal into a plurality of signal components; assigning each of the signal components to one of a plurality of logical channels; weighting each of the signal components with transmit baseband weight values; combining ones of the resultant weighted signal components to form a plurality of transmit weighted signals, each of the plurality of transmit weighted signals being assigned to one of the plurality of logical channels; and combining groups of the plurality of transmit weighted signals to form a plurality of output signals capable of being used to generate a plurality RF output signals.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. In this regard, one or more circuits comprising an integrated amplifier may be configurable such that, in a first configuration, the one or more circuits are operable to handle a differential input signal, and, in a second mode of operation, the one or more circuits are operable to handle a single-ended input signal. The one or more circuits may output a differential signal when handling a differential input signal and when handling a single-ended input signal. In some instances, whether the one or more circuits are operable to handle a differential input signal or a single-ended input signal may determined by an inductance of a bond wire coupling the integrated amplifier to an integrated circuit package.

Abstract: A configurable antenna assembly includes an antenna structure and a configurable antenna interface. The antenna structure is operable, in a first mode, to provide a first antenna structure and a second antenna structure, wherein the first antenna structure receives an inbound radio frequency (RF) signal and the second antenna structure transmits an outbound RF signal. The configurable antenna interface is operable in the first mode to provide a first antenna interface and a second antenna interface, wherein the first antenna interface is configured in accordance with a receive adjust signal to adjust at least one of phase and amplitude of the inbound RF signal, and wherein the second antenna interface is configured in accordance with a transmit adjust signal to adjust at least one of phase and amplitude of the outbound RF signal.

Abstract: A system and method supporting extended network access notification via a broadband access gateway is disclosed. A representative embodiment of the present invention may comprise a wireless interface and may be capable of exchanging multimedia communication between the wireless interface and a broadband network. The gateway may support multimedia communication via access devices that may seamlessly hand off from a wireless wide area network to a personal area network supported by the wireless interface. The hand off may be coordinated by the gateway and the wireless wide area network via the broadband network. A user of an access device may be notified when such a hand off has been automatically initiated, and a user may configure aspects of such hand offs.

Abstract: A GNSS enabled mobile device selects an associated local GNSS clock or host clock as a clock source to operate a GNSS radio and one or more non-GNSS radios within the GNSS enabled mobile device. When the GNSS radio is in a GNSS active mode, the local GNSS clock is turned ON and selected to be shared with the host. The host operates the GNSS radio and the non-GNSS radios only using the local GNSS clock instead of the host clock. The host clock is turned OFF to save power. When the GNSS radio is in a GNSS inactive mode, the host clock is turned ON and selected to operate the non-GNSS radios. The local GNSS clock is turned OFF to save power. The non-GNSS radios comprise a Bluetooth radio, a WiFi radio, a FM radio, a cellular radio and/or a WiMAX radio.

Abstract: A modulation control module for use in an RF transceiver, the modulation control module includes a processing module and memory. The memory is operably coupled to the processing module, wherein the memory stores operational instructions that causes the processing module to: receive a multiple path channel estimation; and determining, for each transmit path of a multiple input multiple output (MIMO) wireless communication, a modulation control signal based on a corresponding portion of the multiple path channel estimation.

Abstract: A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.

Abstract: Aspects of a method and system for codebook design for pre-coding techniques may include generating one or more matrices whose matrix elements are from a constant amplitude signal constellation, wherein each of the one or more generated matrices may comprise one or more orthonormal columns, and one of the generated one or more matrices may be an identity matrix. Any two of the generated one or more matrices may be separated by at least a minimum pairwise distance. One or more pre-coding codebooks may be generated, each of which may comprise one or more codebook elements that may be of a same matrix rank. Each of the codebook elements may be generated from a subset of columns from one of the generated one or more matrices. A signal may be pre-coded for transmission using the one or more pre-coding codebooks.

Abstract: According to one exemplary embodiment, a power managing semiconductor die with reduced power consumption includes a power island including an event detection block and an event qualification block. The event detection block is configured to activate the event qualification block in response to an input signal initiated by an external event. The input signal is coupled to the event detection block, for example, via a bond pad situated in an I/O region of the power managing semiconductor die. The event qualification block is configured to determine if the external event is a valid external event. The event qualification block resides in a thin oxide region and the event detection block resides in a thick oxide region of the semiconductor die. The power managing semiconductor die further includes a power management unit configured to activate the event qualification block in response to power enable signal outputted by the event detection block.