Abstract: A method and system for digital spur cancellation may include removing a spur in a left channel minus right channel (L?R) baseband signal generated from a FM signal. The L?R baseband signal may be generated by demodulating a sub-carrier, for example, by using CORDIC algorithm, in a signal demodulated from the FM signal. An orthogonal signal may also be generated by demodulating a sub-carrier, for example, by using CORDIC algorithm, in a signal demodulated from the FM signal. The phase of the orthogonal signal may be further adjusted to introduce a substantially ?90° phase shift to spurs at a specific frequency. Accordingly, the spurs in the L?R baseband signal may be cancelled when the first L?R baseband signal is combined with the phase adjusted orthogonal signal.

Abstract: The present invention provides a modular headset operable to support both voice communications and voice activated commands. This may involve the use of multiple voice CODECs to process voice communications and voice activated commands. The modular headset includes both a microphone and wireless earpiece. The earpiece may further include an interface, a processing circuit, a speaker, a user interface, a pairing circuit, and a registration circuit. The interface allows the earpiece to communicate with the base unit that couples the modular headset to a servicing network. This coupling to the servicing network and base unit only occurs when the headset is successfully registered to the base unit. The pairing circuit and registration circuit allow the exchange of pairing or registration information between various components. The pairing circuit allows the wireless earpiece and microphone to exchange pairing information which is then compared to determine whether or not a successful pairing can be achieved.

Abstract: Aspects of a method and system for duty cycling a network port based on duty cycling of a link communicatively coupled to the port are provided. In this regard, in a network node communicatively coupled to a network link which operates at a plurality of data rates, one or more components of said network node may be cycled through a series of configurations, where a processing capacity and/or a duration of each configuration may be based on the plurality of data rates on the network link. Exemplary components of the node may comprise one or more hybrids, transmitters, receivers, processors, and/or memory elements. The components may be cycled through the series of configurations during each of a series of time intervals. The series of configurations may be based on one or more of a type of data communicated over said network link and an application running on said network node.

Abstract: Methods and systems for matching networks embedded in an integrated circuit package are disclosed and may include controlling impedance within an integrated circuit via one or more impedance matching networks. The impedance matching networks may be embedded within a multi-layer package bonded to the integrated circuit. The impedance of one or more devices within the integrated circuit may be configured utilizing the impedance matching networks. The multi-layer package may include one or more impedance matching networks. The impedance matching networks may provide impedance matching between devices internal to the integrated circuit and external devices. The impedance matching networks may be embedded within the multi-layer package, and may include transmission lines, inductors, capacitors, transformers and/or surface mount devices. The impedance matching networks may be deposited on top of and/or on bottom of the multi-layer package. The integrated circuit may be flip-chip bonded to the multi-layer package.

Abstract: Aspects of a method and system for inter integrated circuit (IC) communications utilizing a spatial multilink repeater are provided. In this regard, one or more circuits in an integrated circuit may be enabled to receive a signal and repeat the received signal to a plurality of target integrated circuits. The repeated signals may be generated by frequency shifting the received signal and a different frequency shift may be utilized for each of the repeated signals. In this regard, each of the repeated signals may be generated by quadrature down-converting the received signal by mixing it with a first local oscillator pair, up-converting the down-converted signal by mixing it with a second local oscillator pair, and adding or subtracting an in-phase portion of the up-converted signal with a quadrature-phase portion of the up-converted signal.

Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.

Abstract: An IC includes a processing module, on-chip memory, one or more block input/output (I/O) interfaces for coupling to one or more off-chip block I/O devices, one or more character I/O interfaces for coupling to one or more off-chip character I/O devices when active, a main memory interface for coupling to off-chip main memory, a baseband processing module, an RF section, a processing module interface, and an IC bus structure. The processing module interface couples the processing module to an off-chip connection structure, wherein, when a handheld computing unit that includes the IC is docked to an extended computing unit, the off-chip connection structure couples the handheld computing unit to the extended computing unit such that the IC is in a docked mode.

Abstract: A near field communication front-end includes an up conversion module, a plurality of coils, and a down conversion module. The up conversion module is coupled to convert an outbound symbol stream into a plurality of outbound signals based on a frequency-space encoding scheme. The plurality of coils is coupled to electromagnetically transmit the plurality of outbound signals and to electromagnetically receive a plurality of inbound signals in accordance with the frequency-space encoding scheme. The down conversion module is coupled to convert the plurality of inbound signals into an inbound symbol stream in accordance with the frequency-space encoding scheme.

Abstract: A radio frequency (RF) bus controller includes an interface and a processing module. The interface is coupled for communicating intra-device RF bus access requests and allocations. The processing module is coupled to receive an access request to an RF bus via the interface; determine RF bus resource availability; and when sufficient RF bus resources are available to fulfill the access request, allocate, via the interface, at least one RF bus resource in response to the access request.

Abstract: An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.

Abstract: In a video processing system, a method and system for generating a transform size syntax element for video decoding are provided. For high profile mode video decoding operations, the transform sizes may be selected based on the prediction macroblock type and the contents of the macroblock. A set of rules may be utilized to select from a 4×4 or an 8×8 transform size during the encoding operation. Dynamic selection of transform size may be performed on intra-predicted macroblocks, inter-predicted macroblocks, and/or direct mode inter-predicted macroblocks. The encoding operation may generate a transform size syntax element to indicate the transform size that may be used in reconstructing the encoded macroblock. The transform size syntax element may be transmitted to a decoder as part of the encoded video information bit stream.

Abstract: Methods and systems for diversity processing based on antenna switching are disclosed. Aspects of one method may include switching among a plurality of antennas in a multi-antenna wireless terminal to receive packets. An antenna may receive a number of packets before switching to another antenna, where the number of packets may be pre-determined or dynamically determined. The received packets may be diversity processed where portions of a plurality of the received packets may be combined to form a single data packet. Similarly, antenna switching may also be used to transmit packets. For example, a data packet may be apportioned to a plurality of packets, and each of those packets may be transmitted via the antennas. Accordingly, if the number of packets to transmit is one, each antenna may transmit one packet, and the antenna switching may select another antenna with which to transmit a packet.

Abstract: Aspects of a system for a digital polar transmitter may include a digital to analog converter circuit (DAC), for which an analog voltage and/or current step size generated in response to a sequence of received binary numbers may be dynamically programmable based on an input control signal. The input control signal may be based on an amplitude modulation (AM) signal. The DAC may receive the sequence of binary numbers, generated based on a phase modulation (PM) signal, from an accumulator circuit. The dynamically programmable-step-size DAC may generate an analog signal, which is amplified by a power amplifier circuit (PA) and transmitted via an antenna. The dynamically programmable-step-size DAC may enable utilization of a linear PA circuit.

Abstract: A transceiver circuit having 10 mb and 100 mb transmit and receive circuitries using the power saving methods of the present invention is disclosed. The power consumption of the transceiver circuit can be significantly reduced by providing each defined subcircuit with its own power supply and means of activation and deactivation. However, the method for activating and deactivating digital subcircuits and analog subcircuits are different and therefore different types of control signals and methods are provided. Furthermore, there are two general types of power-saving situations. The first type is near total circuit power-down and the second type is partial circuit power-down. The present invention in yet another embodiment discloses a method for minimizing energy usage during idle period.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A receiver in a wireless local area network capable of receiving and processing plurality of frames that are separated by a reduced interframe spacing interval. Upon receiving a frame, the receiver determines whether the received frame is using Reduced Interframe Spacing intervals. When the received frame includes a RIFS indicator, acknowledgment of the received frame is suppressed, and subsequent frames of the plurality of frames are received at a RIFS interval.

Abstract: Interference between multiple users operating under multiuser diversity within a coherence bandwidth in an OFDMA system is reduced by spreading out the users' transmission symbols randomly in time within the coherence bandwidth. When transmission symbols are randomly dispersed, the variance of interference between users in the same sub-band is reduced on average.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A communication device includes a voice data and RF integrated circuit (IC) that includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. An off-chip power management circuit receives the power mode signal and that generates a plurality of power supply signals to the voice data and RF IC based on the power mode signal.

Abstract: A method and apparatus is disclosed to recover at least one information payload from a frame and/or to configure one or more reception parameters to receive a future frame to support RIFS. A physical layer device (PHY) receives at least a training sequence embedded in the frame of a transmitted communication signal using a receiver filter bandwidth corresponding to a variable filter training sequence bandwidth. The PHY determines an amount of gain necessary to recover an information payload embedded in the frame based on the recovery of the training sequence. The PHY determines an amount of gain necessary to recover an information payload embedded in the frame based on the recovery of the preamble. A previous communications receiver gain is adjusted by the difference between the amount of gain necessary to recover the information payload and the previous communications receiver gain.