Abstract: A self servo writing disk controller detects a plurality of spiral sync marks and a plurality of spiral bursts corresponding to one of a plurality of servo spirals from a read signal from the read/write head. A timing reference signal is generated based on timing of at least one of the plurality of the spiral sync marks. A position error signal is generated based on timing of at least one of the plurality of spiral sync marks and a magnitude of at least one of a plurality of spiral bursts. The timing reference signal and the position error signal are used by the disk drive for timing and positioning in self writing initial servo wedges to the disk.

Abstract: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.

Abstract: The present invention provides a method for controlling transmission latency in a communications system, wherein the communications system is subject to a noise signal having at least a first noise phase and a second noise phase. The method includes determining a first bit rate for symbols transmitted during the first noise phase, and a second bit rate for symbols transmitted during the second noise phase, the first bit rate and the second bit rate being constrained such that a transmission latency does not exceed a pre-determined maximum allowed transmission latency; and transmitting symbols at the first bit rate during the first noise phase and at the second bit rate during the second noise phase. In other variants, the invention provides an apparatus, a constrained rate receiver, a transmitter and a signal.

Abstract: A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.

Abstract: A GNSS enabled mobile device transmits to a location server a combination of GNSS-based location data and non-GNSS based location data used to determining reference positions at the location server. The GNSS mobile device receives the determined reference positions from the location server to calculate an associated GNSS position fix. The transmitted GNSS-based location data comprises GNSS position fixes associated with the GNSS enabled mobile device. The transmitted non-GNSS-based location data comprises a serving Cell-ID, neighbor Cell-IDs, neighbor cell fingerprinting, timing advance parameters, and/or a mobile country code. Reference positions associated with the serving Cell-ID are determined and/or refined based on location information acquired from each of associated mobile devices.

Abstract: According to one general aspect, an apparatus may include a plurality of ports, a port forwarding processor, and a queue controller. In some embodiments, the plurality of ports may be configured to receive and forward packets within a communications network. In various embodiments, the port forwarding processor may be configured to determine a destination port associated with a received packet. In one embodiment, the queue controller may be configured to define at least one emulated local area network (ELAN) via a respective service member set that identifies which ports are members of the service member set, determine whether or not the destination port is a permitted member of the service member set, and, if the destination port associated with the received packet is not a permitted member of the service member set, flood the received packet to the permitted members of the service member set.

Abstract: A system and method that provide reduced latency in a video signal processing system. Various aspects of the present invention may comprise transmitting a first video information stream representative of a unit of video information. For example, the transmitted first video information stream may correspond to a video channel. A second video information stream representative of the unit of video information may be transmitted simultaneously with the first video information stream. The second video information stream may also, for example, correspond to the video channel. Various aspects of the present invention may comprise receiving a plurality of simultaneously transmitted video information streams. A video information stream of the plurality of received video information streams may be identified that, when processed, is expected to result in the lowest latency in presenting the unit of video information to the user. The identified video information stream may then be so processed.

Abstract: Various embodiments are disclosed relating to wireless systems, and also relating to power control techniques for wireless devices. One disclosed embodiment comprises a wireless receiver that includes a processing circuit. In one example embodiment, at least a portion of the processing circuit may process only a portion of an ID packet. The portion of the ID packet that is received and processed may be less than a full ID packet, which may provide power savings.

Abstract: A serial packet sync encoder is used to encode a serial packet sync datastream. In an embodiment, the serial packet sync datastream is made up of the packet sync vector and a unique preamble bit sequence that is preselected. In another embodiment, the serial packet sync datastream is made up of a non-unique bit sequence. A serial packet sync transmitter is used to transmit the serial packet sync datastream. A serial packet sync receiver is provided for receiving the serial packet sync datastream. In an embodiment, the serial packet sync transmitter and the serial packet sync receiver are shift registers. In this way, the serial packet sync datastream can be transmitted and received using only a single pin. The serial packet sync datastream is useful for providing an indication that an event, such as a grant arrival, has occurred. A preamble comparator is provided to compare the received serial packet sync datastream and the preselected preamble to determine if the two match.

Abstract: According to embodiments of the invention a multi-mode memory device is provided. The memory device includes at least one content-addressable memory (CAM). The memory device further includes a first match-in bus for receiving input into a first CAM of the at least one CAM, wherein the status of the match-in bus determines a operating mode of a plurality of operating modes of the first CAM, and a match-out bus for enabling the first CAM to be coupled to another CAM module and comprises match lines of a memory portion of the first CAM, wherein if the match-in bus is disabled, first CAM is in a first mode, and if the match-in bus is enabled, the first CAM is in a second mode.

Abstract: In an exemplary communication system, a multiplicity of mobile terminals are to share a communication link with a host processor communicating through base transceivers. The mobile terminals evaluate communication signals being transmitted to one or more of the mobile transceivers and according to the evaluation of such signals, each mobile terminal independently selects a relatively high data rate or a lower more conservative data rate for communication with the host processor. The mobile terminal enters a dormant state after a fixed period elapses during which the mobile unit is not engaged in communication with the base station. Periodically, the mobile terminal reenters active state in receive mode for a brief interval and if no polling signal or other message directed to the mobile terminal is present, the mobile terminal returns to dormant state.

Abstract: A radio transmitter front-end for use in a voice data and RF integrated circuit (IC) includes a phase correction module that produces a phase adjusted signal in response to a phase modulated signal and at least one phase correction signal. An amplitude correction module produces an amplitude adjusted signal in response to an amplitude modulating signal and an amplitude correction signal. An amplifier amplifies the phase adjusted signal and amplitude modulates the phase adjusted signal, based on the amplitude adjusted signal, to produce a polar coordinate transmit signal. A correction generation module generates the at least one phase correction signal and the amplitude correction signal, based on the polar coordinate transmit signal and the phase adjusted signal.

Abstract: A method relating to wireless human interface device (HID) coordination is disclosed. A first human interface device (HID) is wirelessly coupled to two or more computing devices, wherein the first HID is configured to toggle between interactions with each of the two or more computing devices. An inquiry or paging message is broadcast to one or more HIDs, including a second HID wirelessly coupled to the two or more computing devices, wherein the second HID is configured to receive and provide a response to the inquiry or paging message. The second HID is located based on the response to the inquiry or paging message. A wireless link is established between the first HID and the second HID based on the locating, wherein the first HID is configured to coordinate, via the wireless link, interactions with the two or more computing devices by both the first HID and the second HID based on the toggle.

Abstract: A method for an antenna architecture that handles European band cellular and broadcast channels may be provided. The method may comprise receiving at a first radio frequency integrated circuit (RFIC) integrated within a mobile terminal, RF signals in a first cellular frequency band of a first cellular network via an antenna. The antenna may be coupled to a second RFIC integrated within the mobile terminal capable of handling RF signals in one or more other cellular frequency bands of at least a second cellular network. A third RFIC integrated within the mobile terminal coupled to the antenna may be capable of handling the received RE signals in a UHF broadcast band.

Abstract: A multi-port SERDES transceiver includes multiple parallel and serial ports, and the flexibility to connect any one of the parallel or serial ports to another parallel or serial port. The ports include programmable pads that are capable of supporting multiple different data protocols, timing protocols, electrical specifications, and input-output functions. A management data IO pad also enables the transceiver to support different electrical requirements and data protocols at the same time. The substrate layout of the transceiver is configured so that the parallel ports and the serial ports are on the outer perimeter. A logic core is at the center, where the logic core operates the serial and parallel data ports, and the bus that connects the data ports. The bus can be described as a “ring” structure (or donut “structure”) around the logic core, and is configured between the logic core and the data ports.

Abstract: A system and method for discovering a cable type and resistance for Power over Ethernet (PoE) applications. Cabling power loss in PoE applications is related to the resistance of the cable itself. A PHY can be designed to measure electrical characteristics (e.g., insertion loss, cross talk, length, etc.) of the Ethernet cable to enable determination of the cable resistance. The determined resistance can be used in powering decisions and in adjusting power budgets allocated to power source equipment ports.

Abstract: In a network having nodes that operate according to a protocol that defines a node as being in an idle mode when the node is not transmitting or receiving a packet, a method of communicating between nodes during the idle mode. A message formatted according to the protocol is generated. The message is different from messages predefined by the protocol for transmission during the idle mode. For example, the message can comprise a first portion that reports a link status condition. The message can further comprise a second portion that reports a cause of the link status condition. The message is transmitted from a first node of the network when the first node is in the idle mode. The message is received at a second node of the network when the second node is in the idle mode.

Abstract: A system for transmitting subchannel data over the same media as high speed data, especially DC balanced high speed data. A digital transmitter receives subchannel data and modulates it onto a subchannel carrier as the host signal in the preferred embodiment using frequency shift keying. The FSK subchannel carrier is added by superposition to the high speed data signal. Because of the ability to have very narrow bandwidths for the passbands of digital IF filters, the receiver is more sensitive and less susceptible to the need for tuning to accommodate manufacturing variations in the rise times of the high speed data signals.

Abstract: A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side interface, and a signal conditioning circuit. The signal conditioning circuit services each of an RX path and a TX path and includes a limiting amplifier and a clock and data recovery circuit. The signal conditioning circuit includes an AGC loop, an equalizer, and an equalizer feedback loop. The AGC loop includes a gain path and a feedback path that couples to the output of the equalizer. The equalizer feedback loop couples to the output of the equalizer and produces spectral shaping control settings that the equalizer uses to produce an equalized high-speed serial bit stream at an equalizer output.

Abstract: Aspects of a method and system for minimizing effects of transmitter impairments in multiple input multiple output (MIMO) beamforming communication systems are presented. In one aspect of a system for minimizing effects of transmitter impairments, a MIMO transmitter may enable nulling of transmitter-induced noise by adjusting at least a portion of a plurality of signals transmitted based on a transmitter error vector magnitude (EVM). The transmitter may enable transmission of the plurality of signals subsequent to the nulling. In another aspect of a system for minimizing effects of transmitter impairments a MIMO receiver may enable nulling of transmitter-induced noise contained in a plurality of received signals based on a transmitter EVM. Each of the plurality of received signals may include information contained in a plurality of spatial streams. The receiver may enable detecting estimated values for the information contained in the plurality of spatial streams based on the nulling.