Abstract: Combined LDPC (Low Density Parity Check) encoder and syndrome checker. A novel approach is presented by which the encoding processing and at least a portion of the decoding processing of an LDPC coded signal can be performed using a shared circuitry. The LDPC encoding processing and syndrome calculation operations (in accordance with the LDPC decoding processing) can be performed using a common circuitry having a portion of which whose connectivity is only slightly modified depending on whether encoding or decoding is being performed. To effectuate this selection (between encoding and decoding), any of a variety of means can be employed including the use of multiplexers that are operable to select a first connectivity (for encoding) and a second connectivity (for decoding). This can result in a hardware savings of space, cost, and complexity since a shared circuitry can perform both encoding and at least part of the decoding processing.

Abstract: Embodiments include a decision feedback equalizer (DFE) circuit, including at least one reorder block configured to reorder a set of current sliced bit values based on one or more previous sliced bit values, and a selector configured to select one of the reordered current sliced bit values as a DFE output based on a group of non-adjacent DFE outputs.

Abstract: A radio frequency identification (RFID) decoding subsystem includes a pre-decode module and a decode module. The pre-decode module is coupled to process down-converted RFID signals into pre-decoded baseband data. The decode module is coupled to: enable a counting process based on the pre-decoded baseband data to produce a count resultant; and compare the count resultant with a threshold at a data bit interval to produce decoded RFID data.

Abstract: Methods and apparatus of managing a communication system, wherein a decision regarding a level of activity at a first end is made based at least in part on the level of activity at the second end. In one embodiment, the energy level of a first-end audio signal is measured. The first end is declared voice-active if the first-end energy level is greater than or equal to a first threshold value. The first end is declared voice-inactive if the first-end energy level is less than the first threshold value. To determine the value of the first threshold value, the energy level of a second-end audio signal is measured. If the second-end energy level is greater than or equal to a second threshold value, the second end is declared voice-active, in which case the first threshold is maintained at a relatively high level. If the second-end energy level is less than the second threshold value, the second end is declared voice-inactive, in which case the first threshold is maintained at a relatively lower level.

Abstract: A method for classifying an incoming packet. The method includes maintaining a database associated with patterns of fields, where the fields can be network addresses. The database can be developed by mapping each pattern to a unique numeric identifier. The number of unique numeric identifiers is equal to the number of patterns, and the size of each unique numeric identifier is substantially smaller than the field of each pattern. The database can be further developed by determining a range of one or more of the unique numeric identifiers to be associated with each pattern. The range for each pattern can be bounded by a minimum unique numeric identifier and a maximum unique numeric identifier. The method also includes using a field of the incoming packet to determine an associated identifier for that field, where the associated identifier is equal to one of the unique numeric identifiers.

Abstract: Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

Abstract: According to an example embodiment, an apparatus may include logic. The apparatus may be configured to: determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block; select a burst error pattern that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial; determine an error pattern syndrome based on the selected burst error pattern and the error location polynomial; and determine an actual location of the burst error in the data block based on the error location syndrome and the error pattern syndrome.

Abstract: A method and system for performing diagnostic tests on a real-time system controlled by a state machine. A sequence of states recorded as the state machine operates is used to determine error conditions. The sequence of states is compared to expected sequences of states to determine what, if any, errors have occurred. If the real-time system, such as a transceiver in a communication system, has adaptive components, the status of the adaptive components is used to estimate the condition of any external systems coupled to the real-time system.

Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

Abstract: Programmable integrated Digital Satellite Equipment Control (DiSEqC) transceiver. The DiSEqC functionality is integrated onto a semiconductor device. Rather than perform the DiSEqC protocol in software, the DiSEqC protocol is implemented in hardware thereby providing more reliable demodulation and improved robustness. The device's functionality may employ much more reliable communication schemes that are enabled by the hardware/integrated approach of implementing the DiSEqC protocol. The integrated approach allows extensive programmability of the various operational parameters thereby greatly improving the ease of future backward compatibility with legacy devices; devices employing this integrated DiSEqC functionality may be easily updated to conform to future enhancements of the DiSEqC protocol.

Abstract: A radio frequency (RF) tuner includes a programmable tracking filter bank receiving an RF input and outputting a filtered RF signal. A mixer stage receives the filtered RF signal and outputs a first quadrature component of the filtered RF signal and a second quadrature component of the filtered RF signal. Two variable gain amplifiers receive the first and second quadrature components and output amplitude-controlled I and Q components of the filtered RF signal. In one embodiment, the programmable tracking filter bank includes a plurality of tank circuits each connected to the RF input through an impedance. Each tank circuit include an inductor and a capacitor connected in parallel thereby forming an LC network, and a plurality of switched capacitors in parallel with the LC network and switched in and out of the tank circuit by programmable switches. In another embodiment, the programmable tracking filter bank includes a plurality of peaked low-pass circuits each connected to the RF input through an impedance.

Abstract: A video and graphics system provides square graphics pixels to blend images having 640×480 pixels, such as graphics images provided by some set top boxes and intended to be displayed at a 12.27 MHz display sample rate, with images having 704×480 pixels, such as ITU-R 601 compliant images such as NTSC SDTV images, having oblong pixels and displayed at a 13.5 MHz display sample rate. A sample rate converter including a multi-phase-multi-tap filter is used to generate square pixels. The multi-phase-multi-tap filter provides a good balance of sharpness, smoothness, anti-aliasing and reduced ringing. The multi-phase-multi-tap filter can also be used to convert images having 320×480 pixels to images having 704×480 pixels. The multi-tap filter can be used for scan rate conversion of graphics or video images for HDTV or SDTV applications.

Abstract: A DSP based SERDES performs compensation operations to support high speed de-serialization. A receiver section of the DSP based SERDES includes one or more ADCs and DSPs. The ADC operates to sample (modulated) analog serial data and to produce digitized serial data (digital representation of the modulated analog serial data). The DSP communicatively couples to the ADC and receives the digitized serial data. Based upon the known characteristics of the digitized serial data and the digitized serial data itself, the DSP determines compensation operations to be performed upon the serial data to compensate for inadequacies of the receiver and/or channel response. These compensation operations may be (1) performed on the analog serial data before digitization by the ADC; (2) applied to the ADC to modify the operation of the ADC; and/or (3) performed on the digitized serial data by the DSP or another device.

Abstract: A circuit includes at least two transistors arranged to form a current mirror, at least two transistors operatively coupled to the current mirror, where the transistors are arranged to form a differential pair amplifier, and a follower transistor operatively coupled to the current mirror and to the differential pair. The transistors of the differential pair, the current mirror, and the follower transistor are operatively coupled such that during operation an amplitude of a signal output from the follower transistor is proportional to an amplitude of an signal input into the differential pair.

Abstract: A method for transmitting high rate data within a multiple input multiple output (MIMO) wireless local area network (WLAN) begins by determining a data transmission rate. The method continues by, when the data transmission rate is between a first data rate and a second data rate, enabling two transmission paths. The method continues by, for each of the two transmission paths, determining at least one of: level of constellation, number of data subcarriers, rate code, and cyclic prefix duration.

Abstract: A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed.

Abstract: A technique is described herein for updating a state of a decoder in a predictive coding system after synthesizing an audio output signal corresponding to a lost frame in a series of frames representing an encoded audio signal. In accordance with the technique, an audio signal associated with the synthesized output audio signal is re-encoded in an encoder to generate an encoder state, wherein the encoder is simplified with respect to an encoder used to generate the encoded audio signal. The state of the decoder is then updated based on the generated encoder state.

Abstract: A technique is described herein for reducing audible artifacts in an audio output signal generated by decoding a received frame in a series of frames representing an encoded audio signal in a predictive coding system. In accordance with the technique, it is determined if the received frame is one of a predefined number of received frames that follow a lost frame in the series of the frames. Responsive to determining that the received frame is one of the predefined number of received frames, at least one parameter or signal associated with the decoding of the received frame is altered from a state associated with normal decoding. The received frame is then decoded in accordance with the at least one parameter or signal to generate a decoded audio signal. The audio output signal is then generated based on the decoded audio signal.

Abstract: A method to transmit data using a device having a plurality of physical input/output (I/O) interfaces is provided. The method comprises receiving data and determining a topology according to which data is to be transmitted. Data is transmitted in sequential order via a single physical interface for a first topology and in random order via a plurality of physical interfaces for a second topology. A System On Chip (SOC) unit enabled to transmit data via one or more physical interfaces is provided. The SOC comprises a processor and a network interface including multiple physical input/output (I/O) interfaces coupled to the processor. In response to receiving data for transmission, the processor is enabled to select a single I/O interface for sequential data transmission according to a first topology or select multiple physical I/O interfaces for random order data transmission according to a second topology.

Abstract: A system, method, and computer program product for allowing a first processor to access flash or other non-volatile memory that is associated with a second processor. The first processor obtains parameters that allow the initialization of an internet protocol (IP) stack. The parameters can be obtained using the trivial file transfer protocol (TFTP), for example. The first processor communicates with the second processor using a socket protocol, sending a command word that represents either a read or write command. The command word specifies where in the non-volatile memory the access is to occur, and for how many bytes. Information is then returned to the first processor, allowing the first processor to verify the success of the access.