Abstract: Expansion of the bandwidth of a wideband CMOS data amplifier is accomplished using various combinations of shunt peaking, series peaking, and miller capacitance cancellation. These various combinations are employed in any of the amplifier input stage, in intermediate stages, or in the last stage.

Abstract: A capacitor including a first and second component capacitor structure disposed on a substrate. A component capacitor structure includes a first arm, a second arm, and a via. The first arm has a first end and a second end. The second arm has a third end and a fourth end. The first arm and the second arm intersect and the first, second, third and fourth ends all extend in the same rotary direction. The via is electrically coupled to an area of intersection of the first and second arms.

Abstract: A mixer produces an improved output signal during frequency translation of an input signal using a local oscillator (LO) signal. The mixer includes five component mixers connected in parallel. Each component mixer uses a phase-shifted version of the LO signal for frequency translation to produce a component output signal from the input signal. The component output signals are scaled according to corresponding gain factors and combined to form the output signal. When the mixer is used in a receiver, the phases of the component LO signals and the gain factors are configured to substantially cancel overlapping baseband versions of component input signals located at the third, fifth, seventh and ninth harmonics of the LO frequency. When used in a transmitter, the same phase and gain factor configurations substantially cancel third, fifth, seventh and ninth harmonics within the output signal.

Abstract: A method for estimating electrical length of a loop in a digital subscriber line (DSL) system begins by estimating an electrical length of a loop for each of a plurality signals based on a known power level of the plurality of signals, a known frequency for each of the plurality of signals, and a received power level for each of the plurality of signals. The method continues by processing the plurality of estimated electrical lengths in accordance with a function corresponding to characteristics of the loop to produce a determined electrical length.

Abstract: An apparatus and method for correcting IQ imbalance are presented. An exemplary receiver for processing I and Q signals from a tuner includes: a non-decision directed (NDD) imbalance canceller coupled to receive the I and Q signals, and a decision directed (DD) imbalance canceller coupled to the non-decision directed imbalance canceller. The DD imbalance canceller converges after the NDD imbalance canceller converges, so as to correct IQ imbalances in the receiver. An exemplary method for processing I and Q signals from a tuner includes: (a) converging a NDD imbalance canceller to correct a majority of IQ imbalances, and (b) subsequently converging a DD imbalance canceller to correct a remainder of IQ imbalances not corrected in step (a). The apparatus and method correct frequency-dependent and frequency-independent IQ imbalances.

Abstract: In a communication system, Huffman coding techniques are used to obtain shaping gains for an improvement in data transmission rates. More particularly, a novel method of Huffman shaping is described that achieves a shaping gain of greater than 1 dB. The shaping gain results in a higher data rate transmission in a communication system where transmitted power is constrained.

Abstract: A system and method for guaranteeing a delay jitter bound when scheduling bandwidth grants for voice calls via a communication medium is provided. The method includes the steps of: determining the delay jitter bound; based on the determined delay jitter bound, dividing a packetization frame period into phases; assigning a voice call to one of the phases; and scheduling a bandwidth grant to the voice call during the assigned phase, thereby guaranteeing the delay jitter bound. The system includes a scheduler, where the scheduler determines the delay jitter bound, divides a packetization frame period into phases based on the determined delay jitter bound, assigns a voice call to one of the phases, and schedules a bandwidth grant to the voice call during the assigned phase, thereby guaranteeing the delay jitter bound. A dejitter buffer implements a way to provide zero jitter service, even though the packet transmission on the cable network has jitter, by delaying the packet and thus converting jitter into delay.

Abstract: A system for detecting collisions in a shared communications medium, such as a TDMA medium, includes a receive path adapted to generate a first intermediate signal, a second intermediate signal, and a data symbol sequence from an input signal. A preamble detection module generates a correlation metric from the first intermediate signal. A power measurement module generates a power indication signal from the second intermediate signal. A noise measurement module generates a noise indication signal from the second intermediate signal and the data symbol sequence. A processing module is adapted to characterize the input signal as a collision for certain values of correlation metric, power indication signal, and noise indication signal.

Abstract: Low Density Parity Check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses. For the first time, min* processing is demonstrated for use in decoding LDPC-coded signals. In addition, max*, min**, or max** (and their respective inverses) may also be employed when performing calculations that are required to perform decoding of signals coded using LDPC code. These new parameters may be employed to provide for much improved decoding processing for LDPC codes when that decoding involves the determination of a minimal and/or maximal value, or a minimal and/or maximal log corrected value, from among a number of possible values. The total number of processing steps employed within the decoding of an LDPC-coded signal is significantly reduced be employing the min*, max*, min**, or max** (and their respective inverses) decoding processing described herein.

Abstract: A system and method for acquiring a transmitted spread-spectrum signal uses a matched filter configuration that is preferably employed as a Stage 2 filter in the second phase of an initial signal acquisition procedure performed in the receiver. In operation, a Stage 1 filter matches a sequence which is repeated a number of times according to a second sequence within a secondary synchronization sub-channel of the spread-spectrum signal. The Stage 2 filter of the invention then filters the output of the Stage 1 filter in order to recover a secondary synchronization code. The Stage 2 filters the output of the Stage 1 filter using three matched filters of its own. The first and second filters sample different taps of a sequence output from the Stage 1 filter. The third filter samples a predetermined number of taps overlapping taps for the first and second filters in a way that resolves ambiguities with respect to the identification of the sequence.

Abstract: A system and method are used to determine connectivity and/or cable faults of a cable. A signal transmitting and receiving system is coupled to the cable. An analog-to-digital converter (ADC) coupled to the signal transmitting and receiving system. A TDR system coupled to the ADC and a memory, and a controlling system coupled to at least one of the ADC, the TDR system, and the signal receiving and transmitting system. The controlling system includes a controller and one or more state machines that are used to control the TDR system.

Abstract: A communication network having at least one access point supports wireless communication among a plurality of wireless roaming devices via a first and a second wireless channel. The access point comprises a first and a second transceiver. The first and second transceivers operate on the first and second wireless channels, respectively. Each of the plurality of wireless roaming devices are capable of communicating on the first and second wireless channel. In one embodiment, the first wireless channel is used to exchange data, while the second channel is used to manage such exchanges as well as access to the first channel. In an alternate embodiment, both channels are used to support communication flow, however the first channel supports a protocol that is more deterministic than that of the second channel. Allocation of ones of the plurality of wireless roaming devices from one channel to the next may occur per direction from the access point.

Abstract: A method and system to determine when a wireless terminal has been paged by a servicing base station. An encoded paging burst is received on a paging channel and then decoded to produce a decoded paging burst. The decoded paging burst is processed to determine if it is a null page. When the encoded paging burst is a null page, it is processed to produce a null page pattern. The wireless terminal may then enter a sleep mode or reduced functionality mode for a predetermined period of time. The wireless terminal awakes from the sleep mode to receive additional encoded paging bursts. Processing the additional encoded paging bursts produces a processed encoded paging burst, which is compared to the null page pattern. When compared favorably, the encoded paging burst is considered a null page, allowing the wireless terminal to re-enter the sleep mode without fully decoding the paging burst.

Abstract: A network switch for network communications includes a first data port interface, supporting a plurality of data ports transmitting and receiving data at a first data rate. A second data port interface supporting a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface communicating with a CPU, an internal memory, a memory management having an external memory interface, and a communication channel are provided. A plurality of lookup tables having address resolution lookup/layer three lookup, rules tables, and VLAN tables are provided. One of the data port interfaces is configured to update the address resolution table based on newly learned layer to addresses and a synchronization process per entry is provided.

Abstract: An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract: TTCM (Turbo Trellis Coded Modulation) decoder design. The design also adapts to any number of devices that perform decoding of Trellis Code Modulation (TCM) signals. After performing initial symbol processing within a data block to generate a number of check point values, the design selectively re-calculates some forward metrics (alphas) and backward metrics (betas), and the design is able to calculate extrinsic (ext) information for each symbol within the data block successively. The data block is subdivided into a number of sub-blocks that are intelligently processed to enable extremely fast processing. Generally speaking, the design performs initial processing starting from both block ends, and upon approaching the block middle, the design begins to process the block using skip backs to previous sub-blocks. The design employs a great deal of parallel and simultaneously processing to provide for very fast computation of the various values required to decode the block.

Abstract: A telephony system and method is provided that reduces delay and provides better utilization of upstream bandwidth in delivering packet telephony services to a plurality of subscriber lines via a cable modem system. An exemplary system includes a plurality of voice processing modules, a host processor, and a buffer. Each voice processing module receives digital voice signals from a separate set of subscriber lines, compresses the digital voice signals to generate a voice packet, and transfers the voice packet to the buffer. The host processor then assembles a packet by concatenating the voice packets and transmits the assembled packet for delivery over a data network. Because the plurality of voice processing modules process the voice packets in parallel, delay is reduced in the assembly and transmission of the assembled packet.

Abstract: A system and method for transferring information in a multi-channel, point-to-point environment are described. In one embodiment, a number of processing chips are connected to a bridge bus. A bridge is connected to the bridge bus and to a system bus. In addition, a memory is connected to the bridge.

Abstract: A timing recovery system and method for accelerated clock synchronization of remotely distributed electronic devices is provided. The system includes a phase locked loop, a linear estimator and control logic. The method includes sampling a clock signal received from an electronic device, applying a linear estimation technique to estimate the frequency and phase of the received signal and providing those estimates to a phase locked loop to accelerate the phase locked loop acquisition rate and secure signal lock quickly.

Abstract: A method of handling data packets in a series of network switches is disclosed. An incoming data packet is received at a data port of a first lower capacity switch of the series of network switches and a stack tag is resolved from a header of the incoming data packet. The incoming data packet is forwarded to a first higher capacity switch, on a first stacked connection operating at a first data rate, based on the stack tag. A destination address of said incoming data packet is resolved by the first higher capacity switch and the header of the incoming packet is modified. The incoming data packet is forwarded to a second higher capacity switch, on a second stacked connection operating at a second data rate, based on the resolved destination address, where the header of the incoming data packet is modified and the incoming data packet is forwarded to a second lower capacity switch on a third stacked connection operating at the first data rate.