Abstract: A process and apparatus for sampling a serial digital signal (D), which includes phasing of the digital signal with a clock signal (C) and sampling the digital signal at delayed instants (Si), wherein the phasing is carried out in reference to the sampling instants. The phasing includes determining phasing test instants (Pi) which refer to the sampling instants (Si) to verify whether transitions of the digital signal are leading or lagging in phase relative to the phasing test instants. The determination of the phasing test instants is achieved by adding to each sampling instant (Si) a delay Y=kR/2, in which k is a positive whole odd number other than zero and R designates a pulse repetition period of the bits of the digital signal (D). The invention has particular utility in data processing and remote data processing systems, and to telecommunication systems.
Type:
Grant
Filed:
August 2, 1995
Date of Patent:
December 8, 1998
Assignee:
Bull S.A.
Inventors:
Roland Marbot, Jean-Claude Le Bihan, Andrew Cofler, Anne Pierre Duplessix, Pascal Couteaux, Reza Nezamzadeh-Moosavi
Abstract: A pallet (10) for transporting a load (19) includes a deck (11) provided with two skids (12). Depalletization is effected by inclining the deck caused by pivoting the skids so as to space them apart from lateral edges of the deck.
Abstract: A method for authenticating a user working in a distributed environment in the client/server mode, wherein each authentication is performed from a single piece of authentication information, known as the "passphrase", having a predetermined length and duration of use (as a function of a tally value). The method is applicable to either a one-time password (OTP) system or an OTP system integrated with a Kerberos system, or in a one-time password system used alone, and the method may be used from a trusted terminal or an untrusted terminal. A method is provided that enables reinitializing the "passphrase" at the end of the duration of use with security, even in the event of active interception, and either in an OTP system integrated with a Kerberos system, or in an OTP system used alone.
Abstract: The frequency multiplier 10 is embodied by a phase-locked loop including a phase comparator 11 for commanding a plurality of delay elements 130 to 137 that furnish successive phase-shifted signals CL0-CL7 to a logical adder 16 made up of EXCLUSIVE OR gates.
Abstract: The heat dissipated by the integrated circuit (11) is evacuated into a plate (13) having an extended surface in order to transmit the heat into the integrated circuit package (10) and into the wiring board (12) by means of the input-output terminals (17) of the package.
Abstract: A device and process for generating object-oriented interfaces (GEN) for authorizing new applications (OOA) developed in object-oriented environments to access existing relational data bases (RDB). The device (GEN) creates, according to a process for generating object-oriented interfaces from the schema of the relational data base, an object schema which constitutes an object-oriented view of the existing relational data base (RDB), this view, which constitutes the object-oriented interface (OOI), being composed of a set of classes which represent the entities stored in the data base. The input applied to the interface generation device is the data base description (DBD) in a standard language for defining and manipulating data.
Abstract: A process for protecting software written for a computer (ORD) in interpreted language, in which the program is written in uncoded form in a script file (FSI), and a compiled code (EXECI) is generated from the content of this file (FSI). This compiled code (EXECI) is then executed, which creates a pipeline (PI) for communicating with an interpreter (INTI) associated with the language used in this file (FSI). The interpreter is supplied through this pipeline (PI), with the content of the initial script file. The interpreter reads the content and executes it in the computer (ORD).
Type:
Grant
Filed:
December 11, 1996
Date of Patent:
October 20, 1998
Assignee:
Bull S.A.
Inventors:
Gerard Sitbon, Daniel Gobert, Christian Baillif, Fran.cedilla.ois Urbain
Abstract: The invention relates to a process for simulating, in a network, a server architecture from a client architecture in a first machine (PS) for the execution of remote procedure calls (RPC sent by at least one machine with client architecture (CL). In this this process, the first machine (PS) initially sends an RPC call to a third machine with server architecture (RE) which is used as a relay machine between the first (PS) and the second (CL) machines, and this RPC call opens a communication context for the sequence of exchanges while the first machine (PS) blocks itself on standby for a return of the RPC call. When the second machine (CL) sends an RPC call which represents a predetermined function to be executed by the first machine (PS), this call is transmitted to the relay machine (RE) which, after recognizing the function, retransmits it to the first machine (PS) through a return of the blocked RPC call.
Type:
Grant
Filed:
December 30, 1994
Date of Patent:
October 13, 1998
Assignee:
Bull S.A.
Inventors:
Gerard Sitbon, Jean-Fran.cedilla.ois Bassier, Alev Aydin, Hubert Freund
Abstract: A process for monitoring the acknowledgement of a request to execute a command script (script) through a non-guaranteed protocol (S.N.M.P.), in an information system (SI) in a network (RE) comprising a manager (GE) and agents (AG1) for executing commands, wherein the manager first sends the agent in charge of executing the command script a ticket request using a command (Get mrsGetTK) of the "get" type, and the agent returns (GetResponse) a ticket to the manager, the manager then sends the execution request to the agent using a command (Set mrsExecute cmd TK) of the "set" type, for which the ticket it a parameter, then the agent verifies the validity of the request and creates an instance for the execution of the command associated with the ticket and the manager then verifies proper reception of the request by scanning (Get mrsStatus) the instance using the agent. The instant invention is particularly applicable to heterogeneous information systems.
Type:
Grant
Filed:
April 10, 1996
Date of Patent:
September 8, 1998
Assignee:
Bull, S.A.
Inventors:
Gerard Sitbon, Didier Champeval, Daniel Gobert
Abstract: A tool for generating and executing graphical interface commands (OGEC) for an information system (SI) including heterogeneous platforms (PLC1-PLC4) disposed in a multi-protocol (PR1 through PR6) network (RE), comprising a descriptor file (FD) which describes the graphical interface to be produced in a specific grammar, means (AL) for verifying the grammar, means (MRG) for generating a graphical representation, connected to the verification means and to the graphical interface tools, means (AS) for checking the syntax of the data entered by the user into the graphical representation, multi-protocol means (ENC) for encapsulating the attributes of each command to be executed in the target platform(s) (PLC1 through PLC4), and means for receiving the attributes of each command and for executing it (EXEC1 through EXEC4) in accordance with these attributes.
Abstract: An integrated circuit (IC) package (10), having an integrated circuit (11) and a connecting substrate (12) comprising an insulating film (13), one side of which carries conductors (14) and the other side of which carries balls (15) connected to the respective conductors by means of via holes (16) in the film. The balls (15) are fixed directly to said via holes, the base of which is formed by the respective conductors. The balls are preferably made of a remeltable material such as tin lead and the fixation can be made initially by an adhesive substance. The process for connecting two connecting substrates (12, 22) by means of balls (15), one of which substrates comprises a film (13), one side of which is provided with conductors (14) and the other side of which is provided with via holes (16), consists of fixing the balls directly to the conductors in the via holes by remelting the balls. The balls can be soldered or prefixed by an adhesive substance to connecting pads (23) of a board (22).
Abstract: An application integration architecture (MO) for a data processing platform (PL) constituted by a network (RE) of machines running a plurality of heterogeneous applications (APA), the codes of which are not modifiable and each of which includes a plurality of external interfaces (IE), characterized in that, for the purpose of modifying the basic characteristics of these applications in a way that is transparent to the user, it comprises:a) an ergonomic integration module (MIG) for the centralized control of the applications with a graphical interface (GI),b) an operational continuity module (MCF) which executes actions to prevent them from operating abnormally,c) a module (MSC) for intercepting the dialogues between the components in order to ensure their logical security and the accounting of the resources consumed by the user.
Type:
Grant
Filed:
July 19, 1996
Date of Patent:
August 18, 1998
Assignee:
Bull S.A.
Inventors:
Gerard Sitbon, Christian Baillif, Marc Blochet, Jean-Fran.cedilla.ois Bassier
Abstract: A system (SCI1) for communicating with a network (RE, etc.) which implements a communication code (CC) belonging to a plurality of interconnection models (OSI, IPS), including a package (C4, C3, C2) for administering the communication code (CC) which includes communication modules belong to various models, and wherein the package includes a configuration manager (CONFD) operable during the initialization of the system to establish the stacking of the various layers of the code, an administration module (IMD) which allows access to all the administrative information within each of the layers, a first administration interface (LMAI1, LMI1) disposed between the configuration manager (CONFD) on the one hand, and various administration entities and the administration module (IMD) on the other hand, and a second administration interface (LMAI12, LMI2) disposed between the administration module (IMD) and the administration entities (LME11, LME12).
Type:
Grant
Filed:
June 10, 1996
Date of Patent:
August 11, 1998
Assignee:
Bull S.A.
Inventors:
Valerie Clement, Regis Mouret, Nathalie Saint Paul
Abstract: The invention relates to a static analyzer of the risks of blocking the operation of a system. The analyzer produces lists of lock applications associated with allocations of the resources of the system which conform to Coffman conditions. The analyzer also produces the names of the source programs from which the lists are extracted. This allows the constructor of the system to modify his source programs in order to eliminate the risks of deadlocking between different processes in the system. The constructor of the system will thus be assured that no allocation of resources will have a blocking effect, no matter what the synchronizations of the various processes being executed in the system may be.
Type:
Grant
Filed:
April 17, 1995
Date of Patent:
July 21, 1998
Assignee:
Bull S.A.
Inventors:
Michel Sanchez, Frederic Brugnot, Michel Chervier
Abstract: A controller (CTMI) for multiple transfer of data organized by a microprocessor (MPU) between a plurality of memories (SRAM, VRAM) and a computer bus (PSB), including a plurality of registers (REGI, REGO) programmed by the microprocessor for writing into them of information enabling the organization of the transfer over a first and a second channel. The controller includes a central bus (BC, BC1) connected to each of the registers; a first and a second channel controller, associated with the first and second channel, respectively; and an arbitration device connected on the one hand to the second interface and on the other to each of the channel controllers. The arbitration device allocates a given channel to the data routes going to the memories or the microprocessor. The channel controllers control, for each channel, the writing access of the microprocessor to the registers associated with that channel and the transfer of data to each of the memories.
Abstract: A computer system for dynamic service processor exchange comprising a first, active service processor connected by a network and a maintenance unit (CMU) to a central system (4) and to a second, backup service processor (2). Each service processor has, in addition to an operating system, a supervisor processor and at least one service broken down into two portions, namely a "body" portion comprising a service processor and a "presentation" portion comprising an interface with the operator allowing a display of the window type with a menu bar. Each service processor further has a maintenance station handler interface (10,20) for processing communications with other service processors by means of the maintenance unit (CMU). The supervisor processor manages the numbers in question and the services, starts the services, and has access to a system configuration table.
Type:
Grant
Filed:
March 25, 1996
Date of Patent:
June 30, 1998
Assignee:
Bull S.A.
Inventors:
Robert Flon, Jean-Fran.cedilla.ois Bonnafoux
Abstract: A device for managing cyclic pollings for the supervision of computer resources in a network, wherein in order to execute requests for requesting information requests from the various resources in the network using a single operation and a single clock, so that each request is emitted with the proper frequency, the device includes a data table (DT), which is indexed and which contains the data for each request to be emitted having its own index (idx) as well as its own theoretical emission period (pr), a cyclic poll table (PT) which contains the indexes (idx) of the requests with the emission dates thereof, which table (PT) is sorted in ascending order by the dates, with the first line containing the nearest date, and a wait table (WT), indexed by the indexes (idx) of the emitted requests waiting for responses, which contains the dates (d+pr) of the next emissions. The device further implements a process for managing cyclic pollings.
Abstract: A communication system for communicating with a network which includes a computer associated by means of a bus with a communication processor which is itself linked to a specific link of the network, the computer including a first operating system, and the processor including a second operating system, which handles the transmission of data from the bus to the network and vice versa. The communication system includes a telecommunication server associated with the first operating system, and a communication code which belongs to at least one open systems interconnection model associated with the second operating system, wherein the server provides the first operating system with access means to the various layers of the code, this code implementing the specific protocols of each layer, in order to enable transmission to the host or to the network.
Type:
Grant
Filed:
September 11, 1995
Date of Patent:
June 9, 1998
Assignee:
Bull S.A.
Inventors:
Gerard Boucher, Jean-Marc Gillon, Robert Perrin, Paul Ravaux
Abstract: The invention relates to a process for automatic generation of spreadsheets from a model of the entity-relationship type which serves as a support for a relational data base. This data base module of the entity-relationship type is shown on a screen of an information system in the form of a graph composed of a plurality of entities and relationships which is physically embodied in memory by a set of relational tables. According to the invention, a spreadsheet is automatically defined by the selection from this graph of the elements intended to compose its abscissa and ordinate data and the contents of the cells thus formed.
Abstract: In a multiprocessor system, events capable of modifying the dispatching of processes to the processors (CPU, CPUi) start the execution of dispatching software charged with defining the new dispatching as a function of events and various data. When the number of processors (CPU, CPUi) is large, the microsoftware must be optimized. To that end, the microsoftware is subdivided into a plurality of specialized microprogram modules for determining the dispatching in response to respective categories of particular events. A central microprogram module takes into account the events other than those processed by the specialized modules.