Abstract: A case (1) for housing at least one unit of electronic equipment (2) includes at least one fan (3) and an opening (15) for extracting the fan (3). A moving element (18, 28, 4, 33) is provided which, when the fan (3) is inside the case (1), is maintained in contact with at least one side of the fan (3). When the fan (3) is not inside the case (1), the moving element is maintained in contact with the case (1) so as to obstruct the opening (15) of the case (1) through which the fan is extracted.

Abstract: The present invention relates to a process and a device for handling the execution of a job in an open data processing system as a function of the resources. The process comprises the following steps: determining the resources available in virtual memory, real memory, temporary file space, central processing unit utilization time during the last time interval; computing the amount of resources preallocated to other requests and not yet used; comparing the amount of resources required for the execution of a job for which the request has been presented to the current amount of resources available minus the total amount of resources preallocated to other requests, in order to determine as a function of the result of this comparison the start, the deference or the denial of the start of the job requested.

Abstract: A system and process for dynamically controlling the allocation of resources in a “UNIX” open data processing system that includes a local resource manager, wherein the system is configured to sort jobs by dimension, which is defined as a set of currently executed processes which have the same importance from the point of view of the local resource manager. The system is configured to assign a relative weight to each of the dimensions by the user, and to adjust execution priorities of the jobs of each dimension as a function of the relative weights of the dimensions when the system is heavily loaded.

Abstract: The present invention relates to a process for converting the representation of a video image between two coding systems with the aid of two respective sets of parameters, in which each set of parameters is deduced from the other by means of a matrix transformation. For each parameter of the set to be converted from the first coding system to the second coding system, a breakdown (11A, 11B, 11C; 12A, 12B, 12C) is selected in the parameters of the second coding system representing the value of the parameter in the matrix transformation. The breakdowns of each of the parameters to be converted are added and may then be shifted and reorganized. Each of the parameters of the two coding systems have ranges of authorized values. In the conversion process, the values of the parameters to be converted and/or the values of the converted parameters that are outside the corresponding ranges of values are clipped.

Abstract: The present invention relates to a process for detecting errors in an integrated circuit constituting a high-speed serial-parallel communication port and which allows a restart in case of an error, the port (100) comprising, in a sending part (40) which encodes each message, at last one buffer (TDBUF) for data to be transmitted issuing from a parallel bus and, in a receiving part (41), at least one buffer (RDBUF) for data to be received, the process comprising: checking the consistency of the messages, checking the consistency of a character stream constituting the messages, verifying the synchronous and cyclical utilization of the buffers of the sending (40) (TDBUF) and receiving (41) (RDBUF) parts, and checking the data of the messages by calculating a cyclic redundancy check (CRC) code on the data of each message.

Abstract: A method and architecture allowing a remote user, especially an Internet remote user, to securely access private resources protected by a firewall. The architecture comprises a computer facility and many remote user terminals connected via the Internet. The computer facility comprises a security server that controls a security database. The firewall comprises a centralized security means, which is under the control of a security server and is arranged to authenticate remote users and to provide a security profile describing all resources a user may access with a single sign-on data during a single session. A user's terminal further includes a device to generate one-time passwords and the computer includes a device to decode the passwords. The accessed resources may be servers or logical units acceded though protocols having a notion of authentication.

Abstract: The process for mounting an integrated circuit (11) on a support (10) comprising a structure (13) of conductors (14) comprises connecting the conductors to respective terminals (12) of the integrated circuit without interposing a part of the support for insulating the conductors of the integrated circuit as in the standard TAB technology. The connection can be made directly by thermocompression or ultrasound, or indirectly through ball bonds. It is only after the connection that the insulation between the conductors and the integrated circuit is applied. The insulating substrate of the TAB support (10) can be attached to the conductors outside the integrated circuit, before or after the connection of the conductors.

Abstract: An information processing system architecture comprising a set of software products subdivided into domains (21-23), each of which comprises at least one software product. Each domain (21-23) contains specific information comprising an identifier of the domain (21-23), its attributes, and data on the software products comprising it. These data allow the installation and/or the updating of the domains (21-23) in accordance with a set of rules. The software products are constituted of products that are fully integrated into the domains, which follow standard installation and/or updating rules common to the system, and of heterogeneous products from external sources whose packaging and installation and/or updating rules remain specific. A consistency check of the version can be carried out on all or some of these external products. The system (2) comprises at least two specific domains for the operating system (21) and the operations monitor (23) of the system (2).

Abstract: A multidisk storage system (SD) equipped with a redundancy mechanism comprises at least two disk units (UND1-UND3), at least one redundancy control unit (UNC1-UNC2), a power distribution point (P), and a control unit (EG1-EG5), located in proximity to the point (P), for triggering the opening of the corresponding line (LI1-LI5) in case of an electrical fault in the associated unit and in the line itself. This system therefore ensures an optimal protection against electrical faults and ensures an optimal availability of the data.

Abstract: A network recognition system for identifying a storage unit of a plurality of network storage subsystems of a machine (1) including at least one local coupler (11) for exchanging data with the storage subsystems (5, 6, 7) of the network recognition system, each storage subsystem (5, 6, 7) having at least one storage unit identifiable by means of a logical unit number (LUN). An object (100) corresponding to the machine (1) has an object (101) corresponding to the local coupler (11) of the machine (1). Object (101) includes an object (111) corresponding to a remote coupler (51, 52) of one of the storage subsystems (5). Object (101) includes a method (116) for obtaining the object (111) and a list of objects (118, 119) each corresponding to a logical unit number (LUN) identifying a storage unit of the subsystem (5) accessible through the local coupler (11).

Abstract: The invention relates to a protected application launcher (LAP) with a graphical interface (OGI) for a data processing platform (PL) on which a set of applications (A1 through An), can be run and which includes a protected application launching means (MLA) with a graphical interface, and a memory (MEMO) for storing application launch commands. The launcher is characterized in that it comprises privilege acquisition means (MODPRIV) specific to each application and operatively associated with the launching means for delegating to any user access rights which allow him to launch said application, the launching means comprises launch authorization means (AUTLANC) which only allow the launching of an application if the current user has valid access rights.

Abstract: The invention relates to a process for allocating physical memory locations in a multiprocessor data processing system comprising a non-uniform access memory unit distributed among a plurality of modules. Software applications are linked to a set of predefined memory allocation rules. When there is no entry for a virtual address in an address correspondence table, there is a generation of a page fault, and the allocation of a location in physical memory is carried out in accordance with a predefined rule as a function of the profile of the application and of the page fault type. The memory may be organized into segments and the segments subdivided into virtual address ranges, with the ranges associated with a specific memory allocation policy. In the case where there is an entry for a virtual address in an address correspondence table, the policy of the segment prevails.

Abstract: The invention relates to a process for accessing a storage area of a digital data processing machine (19) in a physical addressing mode the storage arena also being accessible in a virtual addressing mode by means of virtual addresses, each constituted by a logical page number (LPN) and a relative address (SPRA). A first logical page number (i) in question corresponds to a first given physical page number (q), and a second logical page number (i+1) contiguous to the first logical page number (i) in question corresponds to a second physical page number (s), not necessarily contiguous to the first given physical page number (q). The process is comprised of writing, at the address constituted by the first logical page number (i) in question and by a relative address having a first predetermined value, the second physical page number (s).

Abstract: The system comprises a central processing unit (CPU) associated with one or more input-output controllers (Ctl1-Ctl4) and a subsystem of redundant disks (MD) divided into logic units and under the control of two redundant disk controllers (SP-A, SP-B). The latter are attached to the input-output controller(s) through equally redundant busses. A first part of the logic units is assigned to the first disk controller (SP-A) and the other part to the second disk controller (SP-B). When a logic unit assigned to the first disk controller (SP-A) is accessed, the state of the second disk controller (SP-B) is supervised through the backup path. In the event that a failure state of the second disk controller (SP-B) is detected, all of the logic units are switched to the first one (SP-A) and are assigned to it. A degraded operating mode is initiated and access to the resources is gained through the backup path.

Abstract: In order to ensure the conformance of a structure to its original specification, to regenerate a structure in accordance with technological developments, or to compare a structure to another known structure, a process for analyzing an entire physical structure(21) includes a step(16) for executing set-based operations on subsets of the structure and producing a display of these subsets in statistical, structural or functional form.

Abstract: A Process for coherent management of exchanges between memories in an information system having at least two levels of memories. The information system in one embodiment is constituted by a central subsystem which can communicate with one or more peripheral subsystems by means of input-output units. The central subsystem includes several processors linked to a central memory and to the input-output units. Each processor includes an associated cache memory linked with the central memory. In operation, each processor executes the instructions of programs contained in an associated cache memory. If the cache memory does not contain the data necessary to the associated processor, the data is read in the central memory and a copy is made using memory blocks of predetermined size. The coherent management of exchange between memories is achieved by dynamically applying a management mode selected as a function of the use that is made of each block.

Abstract: The present invention concerns a device permitting the utilization of a remote procedure call of open systems employing the socket process in a proprietary application, utilizing primitives which do not exist in the proprietary system and running on a computer system which makes use of an open subsystem utilizing the socket, comprising: means for communicating between the proprietary application and an application of the open subsystem; means for coding the primitives of the proprietary application into a special format and storage of the primitives; means for launching an application under the open system (UNIX) to decode and execute the function called by the primitive and to return the result; means for decoding the result; means for ensuring the synchronization of the accesses to the shared memory.

Abstract: In a data processing system, the startup time (Tj) of the system (S) is measured for configurations (j) and parameters are determined relative to the maximum quantity (n) of various types of hardware from measurements performed on the system, so as to be able to deduce, by calculation and from a formula containing the parameters, the startup time (Tq) relative to any configuration (q) of the data processing system (S).

Abstract: A process for initializing a serial link between two integrated circuits comprises an initialized input-output port associated with each integrated circuit connected between a parallel bus and a serial link. Each port uses two clocks with different frequencies, a first higher-frequency clock for the serial link, called a transmitting clock, and a second lower-frequency clock for the signals arriving from the parallel bus, called a system clock. The process comprises the following steps: reinitializing the port with isolation of the receiving clock logic; reinitializing the transmitting clock logic; resetting the serial link between two ports; and initializing a two-way serial link by a looped process, either automatic or dependent on a microprocessor.

Abstract: A machine with non-uniform memory access and cache coherency is constituted by a plurality of modules (10, 20, 40, 60), each module comprising a unit (6, 26, 46, 66), the unit (6) comprising at least one table (8) for managing local accesses to a memory part (5′) local to the module (10) and one table (9) for managing accesses to a memory part (25′, 45′, 65′) remote from the module (10), by means of a system bus (7). The machine comprises: a counter (81) of hits in the local memory part (5′) without a transaction with a remote module; a counter (82) of misses in the local memory part (5′) accompanied by at least one transaction with a remote module; a counter (91) of hits in the remote memory part (25′, 25′, 65′) without a transaction with a remote module; a counter (92) of misses in the remote memory part (25′, 45′, 65′) accompanied by at least one transaction with a remote module.