Abstract: A dynamic hibernation time apparatus monitors and ensures that battery packs in a computer system have sufficient energy capacity to sustain a proper saving of the hibernation file into the hard disk drive. The invention determines the memory size of the computer and adds the storage space needed to store the chip register contents to arrive at the determination of the hibernation file size. Next, the time necessary to save the hibernation file on the disk data storage device and the hibernation energy required to operate the disk data storage device to completely save the hibernation file are determined. When the battery capacity drops within a range of the previously computed hibernation energy, a warning message is generated at the user and the hibernation file is saved. The computer is shut down after the hibernation file has been properly saved.

Abstract: A standardized and universal application-specific language for operation of any battery type where measured values of voltage, current, temperature, and/or power are used to control battery operation to optimize battery life, and prevent damage to the battery and the system in which it resides.

Abstract: A method and apparatus for designing a computer system which supports multiple processors of different types. A processor base board is separately connectable to a system board. The processor base board includes a number of connectors for receiving processor boards. The processor boards include a processor and, if necessary, a voltage regulator and voltage level converters. A right angle single edge contact connector is used on a Pentium II board to significantly reduce spacing requirements of adjacent processor boards. A conventional pin grid array type socket is used for a Pentium Pro processor board. A special mapping of bus request signals is disclosed for supporting four Pentium Pro processors or two Pentium II processors without requiring changes to the processor base board.

Abstract: A PCI repeater coupled between a primary bus and a secondary bus includes logic to allow downstream and upstream bursting across the repeater. The PCI repeater echoes transactions in either an upstream or downstream direction, and does not need any additional address decode logic. The buses are coupled to an arbiter so that only one bus master has control of the bus. During a burst operation, the PCI repeater causes the arbiter to cease providing grant signals to prospective bus grantees. The signal is removed only after the transaction has completed on both sides of the PCI repeater to ensure that the PCI repeater is ready for a next transaction.

Abstract: Through a menu driven selection procedure, a user is given options for how a server should respond to an actuation of a power switch. In one option, the power switch is disabled to prevent accidental shut down of the power supply in response to power switch actuation. In another option, the shut down of the power supply follows soon after the expiration of a count down timer which is triggered by power switch actuation. A subsequent actuation of the power switch in this option aborts the count down. In yet another option, the shut down of the power supply follows soon after the completion of a graceful shut down of the server operating system which is triggered by power switch actuation. A subsequent actuation of the power switch in this option causes an immediate shut down of the power supply.

Abstract: A plug-in electronic card assembly having a retractable antenna comprises a casing with a connector for coupling the electronic card assembly to a host device and an antenna that is selectively movable between a first position, in which the antenna is enclosed within the casing, and a second position, in which the antenna is substantially outside of the casing. In an embodiment of the invention, the antenna comprises a circular antenna element disposed on a printed circuit board that is movable, between the first and second positions, by sliding the printed circuit board in grooves contained in sides of an electronic card assembly casing having PCMCIA standard dimensions. When the antenna is in the second position, transmission pads provide an RF signal path between the antenna and a second printed circuit board contained within the casing.

Abstract: A computer system has a skew compensation circuit for synchronizing the phase of a first periodic signal in one device with a second periodic signal in a second device connected to the first device by a connection that imposes a propagation delay. The skew compensation circuit has a receiver connected to receive the second periodic signal delayed by the propagation delay and circuitry for providing a delay signal representative of the propagation delay. The skew compensation circuit further includes a generator connected to generate the first periodic signal in phase with the second periodic signal based on the first periodic signal and the delay signal.

Abstract: A method for fan-folding lithium-ion-polymer battery cells, wherein gaps are left in the active material at fold locations of the metallic backing conductor. This avoids fatigue at the fold locations when the active materials expand and contract during charge and discharge.

Abstract: A keyboard power generator provides a plurality of keys with one or more magnets mounted thereon. Additionally, a plurality of coils are mounted on both ends of the magnet such that, when the user is typing, the magnet traverses the coils. The movement of the magnet over the coils causes a current to be generated. In one embodiment, one magnet is mounted per key on the keyboard. In a second embodiment, a plurality of magnets are mounted per key to enhance the power generation capability of the keyboard. The currents generated collectively by the keys are provided to a charge pump which multiplies the voltage to achieve a level greater than the voltage level of the battery to be charged. The multiplied voltage is provided to a charging circuitry such as a trickle charger to recharge the battery. In this manner, the more information entered by the user, the more electricity is generated by the keyboard power generator.

Abstract: A MIB manager including set of software interfaces, semantics, procedures and data structures that work together as a system to dynamically manage a tree of SNMP data objects identified by a standard object identifier (OID) along with each object's value. An agent uses the interface of the MIB manager to add and delete MIB objects by OID. When one or more new objects are added to the MIB tree, the agent provides the MIB manager with references to subroutines within the agent and external to the MIB manager, which subroutines operate to manage the identified objects by monitoring and controlling the objects' values. This enables the MIB manager to be implemented in a manner independent of the application and hardware. The MIB manager allows agent to add new objects at any level within the MIB tree, thus allowing modification at any desired degree of granularity. The agent may add a single leaf element, a table row, an entire table or an entire branch of the MIB tree.

Abstract: A computer system and method for storing data in pages of memory according to a data structure which is stored within the memory and identifies the pages of data. The data structure includes a beginning buffer pointer and an ending buffer pointer. The beginning and ending buffer pointers have page address portions and base address portions. The base address portion of the beginning buffer pointer is changed each time a data location is accessed. The page address portion of the beginning buffer pointer is replaced with the page address portion of the ending buffer pointer when the base address portion of the beginning buffer pointer reaches a page boundary.

Abstract: A printed circuit board includes an edge connector operable to be coupled to an expansion bus. An integrated circuit is mounted on the printed circuit board and is coupled to the edge connector. The integrated circuit is operable to snoop memory operations on the expansion bus and cause selected memory data to be stored in a memory on the printed circuit board. A first power conductor extends across a first portion of the printed circuit board and is coupled to the integrated circuit. A second power conductor extends across a second portion of the printed circuit board and is also coupled to the integrated circuit. The circuit board also includes a decoupling unit connected between the first power conductor and the second power conductor. The decoupling unit causes disconnect of the first power conductor from the second power conductor during times in which voltage within the first power conductor is less than voltage within the second power conductor.

Abstract: A computer system has a central processing unit and a bus. A first bus device and a second bus device are connected to the bus. A circuit is connected to configure the second bus device to be addressable by the central processing unit via the bus only by interaction with the first bus device. The first bus device may be an I.sub.2 O processor, and the second bus device may be an I.sub.2 O subordinate bus device.

Abstract: For use with a computer system having an intelligent mass storage disk array subsystem, including a microprocessor controller, a method for the distribution of data within the disk array based upon logical commands issued by the computer system. The disk controller reads a logical command and translates the commands into multiple drive specific commands, including drive physical parameter information such as head, sector and cylinder selection. The calculation of these physical parameters is based upon a number of factors including the operating system installed in the computer system, the type of interleave scheme, if any, specified by the computer system configuration, and disk specific parameters. The physical drive requests are then placed in a queue and executed by the microprocessor controller.

Abstract: A method of determining an object's position and associated apparatus provides positional information in a form that may be conveniently communicated to a computer to calculate the object's position. In a preferred embodiment, representatively incorporated in a computer keyboard, a method of determining an object's position includes forming an optical grid of reflected beacons and detecting an obstruction of the reflected beacons. The preferred embodiment apparatus utilizes a single light source and a single light sensor to detect an object's position in two dimensions.

Abstract: A system management module (SMM) for a host server system includes a system management processor (SMP) connected to a system management local bus. The system management local bus connects to the system PCI bus through a system management central (SMC). The SMC includes the main arbitration unit for the PCI bus and also includes the arbiter for the system management local bus. The SMM includes a video controller and/or keyboard and mouse controller connected to the system management local bus to support remote consoling of the SMM. The SMC includes logic to monitor PCI cycles and to issue error signals in the event of a system error. The SMC also isolates failed components by masking request, grant and interrupt lines for the failed device. Further, if a spare component is provided, the SMC permits dynamic switching to the spare.

Abstract: A portable computer system which includes a modified C-7 power cord socket, which can receive either an AC power cord with a standard C-7 connector or a DC power cord with a modified C-7 connector. (However, the modified C-7 connector cannot be inserted into a standard C-7 socket.) Microswitches in the modified power cord socket detect the presence of the DC connector, and automatically adjust the power conversion circuit accordingly.

Abstract: A computer system having a power supply, a backplane board and a system board includes a power supply shutdown apparatus. When an interlock pin disposed on an edge connector of the system board is not seated properly in a corresponding interlock-pin-receptacle forming a portion of a system board socket disposed on the backplane board, a shutdown circuit is actuated to produce a shutdown signal which is used for electrically isolating the power supply from the system board.