Abstract: A dynamic search result refinement for refining a general search query into a more specific search query. For a general search query, a user is presented with a list of more specific queries. The entries in the list selected from a log-file of queries according to the index frequency of each query. The user can choose a new query from the list of more specific queries and run a database search. The user also has the option to be presented with a list of even more specific queries based on the chosen query and to have a database search run with one of these queries.

Abstract: A protocol for a transaction involving two homogeneous or two heterogeneous computing systems involves starting a transaction on one of the two systems, sending a request for participation in the transaction to an application resident on the other of the two systems, together with an identification and address of the transaction. Upon receipt of the request, the application will initiate a subordinate transaction through a resident (subordinate) transaction manager. The subordinate transaction manager will notify the Beginner transaction manager and at the same time cause the application to start work on the request. Later, the subordinate transaction, through the subordinate transaction manager participates in a two-phase commit protocol that concludes the transaction to ensure that all changes effected by the transaction are done, or none are done, i.e., the transaction is aborted.

Abstract: A system and method for dynamically allocating memory in a computer system at the application level. The application examines a heap data structure and a free list, identifies an unallocated region of memory that is appropriately sized, and allocates the memory to the application. The application deallocates a memory region by placing the memory region in the free list and modifying the heap data structure.

Abstract: A method controls a Web search for server computer resources by an end-user Web crawler. Each resource, such as a Web page, is located by a resource address specified as a character string. The end-user defines a scope for an initial Web search by settings. The settings are used to search the Web for resources limited by the scope. The set of resources located during the search are rendered on output device, and positive and negative examples are selected from the set of resources to infer a rule. The rule is displayed, as well as a subset of resources that match on the rule. The selecting, inferring, and rendering steps are repeated while searching until a final rule is obtained. The rule matches resources that the crawler should process and does not match resource that it should avoid.

Abstract: A computer is provided having a SCSI subsystem and multiple SCSI devices connected to that subsystem. Those devices involve electromechanical motors which require a greater amount of current during times needed to spin-up the motor-driven devices to a steady-state velocity than current needed to maintain that velocity. Each SCSI device includes an inquiry page indicating attributes of that device and whether that device supports fast spin-up. If a device supports fast spin-up, firmware within the computer is activated during ROM POST operations forwards a command to begin a spin-up operation on one SCSI device before the prior device has completed its spin-up operation. In this manner devices which support fast spin-up can concurrently spin-up to their constant velocity value so as to minimize the initialization process of the computer system subsequent to reset or boot-up of the system.

Abstract: A cable management system is provided for use with rack mounted devices, such as servers. The cable management system for each device mounted in the rack includes a retainer, typically mounted to the rack, and fixed to the cable. The system also includes a tension device, such as a tension reel having an extensible member, connected to the cable intermediate the retainer and the device. As the device is moved towards the retainer, the tension member pulls the cable laterally and folds the cable at the rear of the device.

Abstract: A load-insensitive circuit enables a global reference clock signal source of a synchronous multiprocessor system having a plurality of nodes to be “insensitive” with respect to the insertion or removal (“hot-swap”) of a load (such as a node) when the system is operational. The load insensitive clock source is provided through the use of a customized two-way passive radio frequency power splitter having an input port and two phase-matched output ports. A high degree of isolation is provided between clock signals delivered over the output ports when the input port of the splitter is properly terminated and embedded in a controlled impedance environment. Isolation is further enhanced by terminating each output port with a constant impedance comprising a precisely-matched, 50-ohm impedance load pad.

Abstract: A peripheral coder/decoder (codec) that has low power consumption such that the peripheral codec facilitates bus-powered peripheral devices that utilize a codec. One such peripheral device is a modem. In the case of host-based modem, a host computer provides processing capabilities while a bus-powered peripheral device contains circuitry for analog-to-digital and digital-to-analog conversions as well as circuitry for interfacing to a transmission media. The bus-powered peripheral device is coupled to the host computer by a peripheral bus. In one embodiment, the peripheral bus is a Universal Serial Bus (USB) bus and the bus-powered peripheral device is a USB device. By being bus-powered, the bus-powered peripheral device does not require its own separate power source. A method for transmitting data over the peripheral bus using the host-based modem and the bus-powered peripheral device are also disclosed.

Abstract: A self-repair method for a random access memory (RAM) array comprises writing a value to the memory array, reading a value from the memory array and comparing the read and write values to identify faulty memory cells in the memory array. An address of a newly-discovered faulty memory cell is compared to at least one address of at least one previously-discovered faulty memory cell. The address of the newly discovered faulty memory cell is stored if a column or row address of the newly-discovered faulty cell does not match any column or row address, respectively, of a previously-discovered faulty memory cell. Flags are set to indicate that a spare row or a spare column must replace the row or column, respectively, identified by the address of the previously-discovered faulty memory cell, if the row or column address of the newly-discovered memory cell matches the respective row or column address of the previously-discovered faulty memory cell.

Abstract: The parallel or printer port in a personal computer can receive data from the memory under the control of the direct memory access (DMA) controller, releasing processor resources. The processor enables the parallel port, which then indicates to the DMA controller the desire to transfer data. A state machine in the parallel port, along with associated circuitry, responds to the transfer of the data to the parallel port and then controls the transfer of the data to the attached device, usually a printer. The state machine causes an interrupt to the processor when the transfer is complete or on receipt of errors from the external device. The state machine also communicates with the DMA controller to repeat the transfer process until the transfer is complete or an error occurs. Various DMA channels and parallel port locations can be used. Direct transfers by the processor are blocked during DMA controller handled transfers.

Abstract: A high speed connection apparatus, method, and system is provided for peripheral components on digital computer systems. The peripheral component interconnect (PCI) specification is used as a baseline for an extended set of commands and attributes. The extended command and the attribute are issued on the bus during the clock cycle immediately after the clock cycle when the initial command was issued. The extended commands and attributes utilize the standard pin connections of conventional PCI devices an(t buses making the present invention backward-compatible with existing (conventional) PCI devices and legacy computer systems. The conventional PCI command encoding is modified and the extended command is used to qualify the type of transaction and the attributes being used by the initiator of the transaction. The extended commands are divided into four groups based upon the transaction type and the extended command type. Transactions are either byte count or byte-enable transaction types.

Abstract: Undesirable behavior patterns of computers on a network impact network performance. A system and method are provided for limiting the impact of undesirable behavior of computers on the network. The network, through which packets of data are interchanged between the computers, includes one or more forwarding devices that are controlled or instructed by one or more packet traffic monitors. Each of the packet traffic monitors is configured for monitoring the packets; for determining if the information about the pattern of behavior from any of the computers is trustworthy; for determining, upon discovering that one or more of the patterns of behavior is undesirable, a type of the undesirable pattern behavior; and for determining a proper action for mitigating that type of undesirable behavior. The proper action is performed by mitigation means controlling the one or more forwarding devices.

Abstract: The present invention provides an easy-heat-dissipation spotlight structure comprising a reflector formed with an inner semi-ellipsoidal reflecting surface and having an open end; a light-emitting lamp body provided at the central location of the reflector; a lamp cover provided at the open end and formed with an inlet at its lower end; and an air guider installed at the inlet of the lamp cover so that an airflow can be directed into the space defined by the lamp cover and the reflector.

Abstract: A computer system contains a revision indicator which is stored in a protected special area of computer memory. The revision indicator specifies the revision of the hardware actually present in the system. The revision indicator data is presented by the computer during power up so that a user may be aware of the type and configuration of the computer system hardware. The revision indicator may be displayed by the computer system BIOS during power on self test (POST), for example. The memory storing the revision indicator is protected from erroneous or unauthorized change.

Abstract: A technique for managing register assignments. The technique involves maintaining, in a register list memory circuit having entries that respectively correspond to physical registers, a list of register assignments that assign logical registers to the physical registers. The technique further involves maintaining, in a vector memory circuit having bits that respectively correspond to the physical registers, a valid vector that forms, in combination with the list of register assignments, a list of valid register assignments. Furthermore, the technique involves storing, for an instruction that is mapped by the data processor, a copy of the valid vector from the vector memory circuit to a silo memory circuit. Preferably, the processor using the technique has the ability to execute branches of instructions speculatively, and to recover if it is determined that the processor executed down an incorrect instruction branch.

Abstract: A computer system having an Advance Configuration and Power Interface-compliant, or ACPI, operating system performs certain machine specific tasks before going to a low power state. When the computer operating system indicates that entry into the low power state is desired, a microcontroller embedded in an input/output chip is alerted. Synchronization between the main processor of the computer system and the embedded microcontroller of the ACPI operating system is achieved, reducing the likelihood of system failure on the next boot operation. The embedded microcontroller then also causes the state of devices connected to the input/output chip to be saved. This helps the machine to go to a known state during the resume process.

Abstract: A built-in integrated connector module for a portable computer includes a support plate that attaches to a mini-PCI card and two communication jacks. Electronic interconnection such as a flex cable or wiring is provided between the jack and the mini-PCI card. The entire module is secured in supporting structures provided within the housing of a portable computer such that the module may be installed reliably and conveniently.

Abstract: Set and reset functions are corporated in a sense amplifier such that those functions can be performed by the sense amplifier rather than by circuits connected to the sense amplifier. The set and reset functionality is added to the sense amplifier in a manner that minimally impacts the sense amplifier's performance. Accordingly, the sense amplifier includes a number of discharge paths for discharging charges that develop on its output terminals. The set and reset circuit includes a number of high conductance paths that are turned-on in response to an assertion of a set control signal or a reset control signal. When either of those control signals is asserted, the corresponding output terminal is discharged. Accordingly, the output terminals can be either set or reset, responsive to which of the control signals is asserted. When the control signals are de-asserted, the sense amplifier performs in a normal sense amplifier manner.

Abstract: A computer system having detection logic for detecting a hot-pluggable component module being added to the computer system. The detection logic determines when the hot-pluggable component module is fully inserted in a component connector, waits a predetermined time to insure that the hot-pluggable component module is properly seated in and electrical connections made to the component connector, and then notifies a hot-plug controller that a new component module is available for use in the computer system. The hot-pluggable component module, such as a memory module, may be used by the computer system as a replacement for a defective module, upgrade and/or addition without disturbing normal operation of the computer system.

Abstract: A technique for tracking objects through a series of images is disclosed. In one embodiment, the technique is realized by obtaining at least first and second representations of a plurality of pixels, wherein at least one grouping of substantially adjacent pixels has been identified in each of the first and second representations. Each identified grouping of substantially adjacent pixels in the first representation is then matched with an identified grouping of substantially adjacent pixels in the second representation.