Abstract: The clock based voltage deviation detector of the present invention includes a pulse module, an indicator module and a correlation module. The pulse module generates a stream of reset pulses as a function of a clock signal. The indicator module generates a pass/fail indicator signal as a function of the reset pulse stream and a difference between an input signal and a reference voltage. The correlation module correlates an event (e.g., overvoltage or undervoltage) of the pass/fail indicator signal with a period of the clock signal at which the event occurred.

Abstract: An electronic device under test (DUT) responds to a digital input signal by generating a digital DUT output signal conveying a repetitive digital signal pattern. An apparatus for measuring various characteristics of the DUT output signal includes a trigger generator for generating a series of trigger signal edges in response to selected DUT output signal edges occurring during separate repetitions of the digital signal pattern. The trigger generator can be configured to generate each trigger signal edge in response to the same or a different edge of the digital signal pattern. The apparatus determines when a DUT output signal edge occurs by determining when the DUT output signal rises above or falls below adjustable reference voltages. The apparatus alternatively responds to each trigger signal edge by measuring a period between two different edges of the digital signal pattern and or by repetitively sampling the DUT output signal to determine its state.

Abstract: A method for isolating the emitting devices may be applied to various emission and laser microscopy systems. A point spread function is convolved with CAD data of devices involved in the emission. The calculated signal intensity of the devices is varied until the difference between the calculated signal and the measured signal provides best fit. The best fit is performed for each on/off state for all configurations of the involved devices. The variance of the best curve fit for all of the configurations is used to assign probability to each state. The best fit indicates the correct state of each of the involved devices, thereby indicating which devices emit. At times, when the transistors are extremely close, a weighted solution is calculated. The weights are based on the probability of each solution.

Abstract: A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.

Abstract: A triggering circuit asserts a trigger signal in response to edges of a digital signal conveying a repetitive pattern of edges. The triggering circuit generates first data having a value identifying a position within the pattern of a last occurring edge of the digital signal and generates second data having a value identifying a position of a particular edge within the pattern that is to initiate a next assertion of the trigger signal. The triggering circuit asserts the trigger signal when the first and second data values match and de-asserts the trigger signal when the first and second data do not match. In a repetitive mode of operation, the triggering circuit keeps the second data value constant so that it always asserts the trigger signal in response to the same edge of the pattern.

Abstract: A driver block for a differential pin driver that supports out-of-band signaling. The driver block includes a main enable switch that is controlled by a high speed driver inhibit (DINH) signal. The main enable switch controls coupling between a main current source and a differential pin driver output stage. The main enable switch is coupled in series with an output select switch that selects between a positive output and a negative output. The driver block also includes a positive enable switch for controlling coupling between the positive output and a positive level shifter that shifts voltages of the positive output. The driver block also includes a negative enable switch for controlling coupling between the negative output and a negative level shifter that shifts voltages of the negative output.

Abstract: Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication ring. The master clock is connected to each test instrument and provides a clock signal to the one or more test instruments. The controller is connected to the communication ring and is configured to align counters of test instruments to derive a common clock time value from the clock signal. The controller is further configured to generate and send data words into the communication ring to carry the data words to each test instrument. The data words includes at least one data word specifying a test event to be performed, a common clock time value, and at least one of the test instruments.

Abstract: An apparatus and method for forming a contact to silicide through an active diffusion region, a contact to a contact through an active diffusion region, and a contact to a polysilicon structure through a shallow trench isolation region to create a conductive connection with a circuit node of interest. In one embodiment, an opening through the active diffusion region to an associated silicide layer is used to form the conductive connection. In another embodiment, an opening through the active diffusion region to an associated contact is used to form the conductive connection. In yet another embodiment, an opening through a shallow trench isolation region to a polysilicon structure is used to form the conductive connection.

Abstract: A method of determining coherent test conditions is disclosed. The method includes receiving constraints from a user, wherein the constraints include desired test conditions, desired tolerances for the desired test conditions, and desired instrument. Further, the method includes determining the coherent test conditions using the constraints. Moreover, the method includes providing each determined coherent test condition to the user, wherein each determined coherent test condition includes a calculated sampling frequency and a calculated analog frequency.

Abstract: A method, system and apparatus are presented for real time analysis of images in a focused beam system. In various embodiments, marker positions are displayed as graphical elements on the image of a sample being processed. Selected characteristics of all or a portion of the pixels in the image are used to determine the positions. The marker positions are used to detect the occurrence of an event such as an endpoint. In some embodiments attributes of the of the graphic elements change based on the occurrence of selected events and in further embodiments an action is initiated.

Abstract: A test head for an integrated circuit tester includes a main chassis defining a chamber that is open at the top. Tester modules are installed in the chamber, each tester module being removable as a unit from the chamber and including a tester module chassis, multiple pin electronics cards, and a tester module interface structure exposed at the top of the chamber. A test head interface structure is engageable with the tester module interface structures of the tester modules for connecting the tester module interface structures to a device interface unit.

Abstract: A programmable source/measurement module for automatic test equipment is disclosed. A high resolution low frequency source, high resolution low frequency measurement capability, low resolution high frequency source, and a low resolution high frequency measurement capability are provided in a single module. The module comprises an input/output switch matrix selectively coupled to a low frequency filter block and a high frequency filter block. Each filter block may be used for either source or measurement. The filter blocks are selectively coupled to a plurality of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The ADCs and DACs are coupled to a digital interface.

Abstract: Testing of an electronic device is carried out by combining power and signal delivery on a single pair of wires. The power delivery is decoupled from the signal delivery, using inductors, so the device power supplied does not interfere with the test signals delivered from the device and the response signals delivered to the device. Further, simultaneous bidirectional signal paths are decoupled, using capacitors, so that the tester transceiver and the device transceiver are not damaged by the power delivered to the device on the same wires. A common fixture may be used to test a number of different types of wafers, independent of the topography, size, or power requirements of the devices on the wafers, resulting in a significant cost saving, because fixture design has become very expensive, in some cases costing more than the tester whose signals it is implemented to deliver.

Abstract: A method and apparatus for radio frequency vector calibration of s-parameter measurements to the tips of the wafer probe needles of an automatic test equipment production tester. The method involves a modified Line-Reflect-Line (LRL) calibration routine that uses a Thru-Reflect-Line to LRL shift to eliminate the need for a precisely characterized reflect standard used during a conventional LRL calibration. The method further involves de-embedding the non-ideal effects of the non-zero length thru standard used during the calibration routine to improve measurement accuracy of the tester. The apparatus may involve the use of RF relays to allow multiple wafer probe needles to share RF test ports.

Abstract: A system for orthogonal alignment of a specimen disclosed. The system includes a light-beam illumination source, collection optics, imaging optics, and a tiltable specimen holder. The light-beam source is activated to illuminate a spot on the specimen, and the imaging optics is used image that spot. The location of the spot on the imager is used to determine whether the specimen is orthogonal to the optical axis of the collection optics.

Abstract: A method and apparatus for optimizing an integrated circuit design for post-fabrication circuit editing and diagnostics. The method and apparatus is specifically directed to adding designed-for-edit modifications and designed-for-diagnostics structures to an integrated circuit design for post-fabrication circuit editing with a charged-particle beam tool. An integrated circuit design may be modified to create efficient and reliable access to specified nodes and structures, such as spare gates, by the charged-particle beam tool during subsequent testing and debugging of the fabricated device. Additionally, structures such as spare gates, spare transistors, spare metal wires, and debug circuitry may be added to an integrated circuit design to provide for easier editing of portions of the design that may fail.

Abstract: A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.

Abstract: A method is provided for preparing a semiconductor wafer for testing. The method includes selecting a die to be tested; measuring a diagonal of the die; thinning an area over the die extending beyond the scribe lines, the thinned area may be a circular area having a diameter that is larger than the measured diagonal; providing an insert inside the thinned area; and providing an adhesive on the peripheral area of the insert so as not to obscure the optical path to the die. The insert is advantageously made of an undoped silicon.

Abstract: A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray heads disposed about a probe head, which provide a coolant flow onto the IC. A flow inducing injector is provided that directs a fluid jet onto zones where stagnation of the coolant flow is present. This reduces or eliminates any stagnation points and enhance temperature uniformity over the area of the IC.

Abstract: An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, one or more wavelength lights are directed on the integrated circuit and based upon the detection of interference fringes and characteristics of the same, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection and/or characteristics of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Resulting fringes will be a function, in part, of the thickness and/or profile of the trench floor. Milling may be controlled as a function of the detected fringe patterns.