Patents Assigned to Cree, Inc.
  • Patent number: 10573543
    Abstract: An apparatus and associated method for high speed and/or mass transfer of electronic components onto a substrate comprises transferring, using an ejector assembly, electronics components (e.g., light emitting devices) from a die sheet onto an adhesive receiving structure to form a predefined pattern including electronic components thereon, and then transferring the electronic components defining the predefined pattern onto a substrate (e.g., a translucent superstrate) for light emission therethrough to create a high-density (e.g., high resolution) display device utilizing, for example, mini- or micro-LED display technologies.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: February 25, 2020
    Assignee: Cree, Inc.
    Inventors: Christopher P. Hussell, Peter Scott Andrews
  • Patent number: 10562130
    Abstract: A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: February 18, 2020
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia, Eric Mayer
  • Publication number: 20200041075
    Abstract: Light engine modules comprise a support member and a solid state light emitter, in which (1) the emitter is mounted on the support member, (2) a region of the support member has a surface with a curved cross-section, (3) the emitter and a compensation circuit are mounted on the support member, (4) an electrical contact element extends to at least two surfaces of the support member, and/or (5) a substantial entirety of the module is located on one side of a plane and the emitter emits light into another side of the plane. Also, a module comprising means for supporting a light emitter and a light emitter. Also, a lighting device comprising a housing member and a light emitter mounted on a removable support member. Also, a lighting device comprising a module mounted in a lighting device element. Also, a method comprising mounting a module to a lighting device element.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Applicant: CREE, INC.
    Inventors: Antony Paul Van De Ven, Paul Thieken
  • Patent number: 10546978
    Abstract: A light emitting diode (LED) is disclosed comprising a plurality of semiconductor layers with a first contact on the bottom surface of the semiconductor layers and a second contact on the top surface of the semiconductor layer. A coating is included that comprises a cured binder and a conversion material that at least partially covers the semiconductor layers, wherein the second contact extends through the coating and is exposed on the same plane as the top surface of the coating. An electrical signal applied to the first and second contacts is conducted through the coating to the semiconductor layers causing the LED to emit light. In other embodiments first and second contacts are accessible from one side of the LED. A coating is included that comprises a cured binder and a conversion material. The coating at least partially covers the semiconductor layers, with the first and second contacts extending through the coating and exposed on the same plane as a surface of the coating.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: January 28, 2020
    Assignee: Cree, Inc.
    Inventors: Michael S. Leung, Eric J. Tarsa, James Ibbetson
  • Patent number: 10546846
    Abstract: A light emitter device, package, or lamp that comprises and light emitter and a light transmission control material to mask the appearance of at least the light emitter. In one embodiment, a light emitting diode (LED) based lamp is disclosed, comprising an LED light source. A phosphor is arranged remote to the light source such that light emitted from the light source passes through this phosphor and is converted by this phosphor. A light transmission control material is applied at least partially outside the LED light source and the phosphor to reversibly mask the appearance of the LED light source and the phosphor. The light transmission control material is less masking when the LED light source is active. A method for masking the appearance of inactive light emitters is also disclosed that comprising providing at least one light emitter.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: January 28, 2020
    Assignee: Cree, Inc.
    Inventor: Theodore Douglas Lowes
  • Patent number: 10541353
    Abstract: A light emitting device includes a light emitting diode (“LED”), a first luminescent material that is configured to emit light having an emission peak in a green wavelength range, and a second luminescent material that is configured to emit narrow-spectrum light having an emission peak in an orange wavelength range. A light output of the light emitting device, which includes a portion of the light emitted by the LED, the light having the emission peak in the green wavelength range, and the light having the emission peak in the orange wavelength range, provides an appearance of white light. Related devices are also discussed.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: January 21, 2020
    Assignee: Cree, Inc.
    Inventors: Linjia Mu, Kenneth Lotito, Ryan Gresback
  • Patent number: 10541306
    Abstract: A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 21, 2020
    Assignee: Cree, Inc.
    Inventors: Michael John O'Loughlin, Lin Cheng, Albert Augustus Burk, Jr., Anant Kumar Agarwal, Alexander Suvorov
  • Patent number: 10529773
    Abstract: Solid-state lighting devices, for example, light-emitting diodes (LEDs), which include a primary light-extraction face and a secondary light-extraction face that generally opposes the primary light-extraction face are disclosed. In some embodiments, mirrors internal to the LED may be omitted, and omnidirectional light from the active region is allowed to freely exit the primary light-extraction face and the secondary light-extraction face. In other embodiments, the first light-extraction face and second light-extraction face include opposing sidewalls of an LED. In such embodiments, mirrors internal to the LED may be utilized to direct omnidirectional light from the active region toward the first light-extraction face and the second light-extraction face.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: January 7, 2020
    Assignee: CREE, INC.
    Inventors: Peter Scott Andrews, Christopher P. Hussell
  • Patent number: 10529696
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: January 7, 2020
    Assignee: Cree, Inc.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 10522722
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly packaged LEDs with light-altering materials are disclosed. A light-altering material is provided in particular configurations within an LED package to redirect light from an LED chip within the LED package and contribute to a desired emission pattern of the LED package. The light-altering material may also block light from the LED chip from escaping in a non-desirable direction, such as large or wide angle emissions. The light-altering material may be arranged on a lumiphoric material adjacent to the LED chip in various configurations. The LED package may include an encapsulant on the light-altering material and the lumiphoric material.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 31, 2019
    Assignee: Cree, Inc.
    Inventors: Kyle Damborsky, Derek Miller, Jack Vu, Peter Scott Andrews, Jasper Cabalu, Colin Blakely, Jesse Reiherzer
  • Patent number: 10516043
    Abstract: A gallium nitride based monolithic microwave integrated circuit includes a substrate, a channel layer on the substrate and a barrier layer on the channel layer. A recess is provided in a top surface of the barrier layer. First gate, source and drain electrodes are provided on the barrier layer opposite the channel layer, with a bottom surface of the first gate electrode in direct contact with the barrier layer. Second gate, source and drain electrodes are also provided on the barrier layer opposite the channel layer. A gate insulating layer is provided in the recess in the barrier layer, and the second gate electrode is on the gate insulating layer opposite the barrier layer and extending into the recess. The first gate, source and drain electrodes comprise the electrodes of a depletion mode transistor, and the second gate, source and drain electrodes comprise the electrodes of an enhancement mode transistor.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: December 24, 2019
    Assignee: Cree, Inc.
    Inventors: Saptharishi Sriram, Jennifer Qingzhu Gao, Jeremy Fisher, Scott Sheppard
  • Patent number: 10510905
    Abstract: A Schottky diode includes a drift region, a channel in an upper portion of the drift region, and first and second adjacent blocking junctions in the upper portion of the drift region that define the channel therebetween. The drift region and channel are doped with dopants having a first conductivity type, and the first and second blocking junctions doped with dopants having a second conductivity type that is opposite the first conductivity type. The blocking junctions extend at least one micron into the upper portion of the drift region and are spaced apart from each other by less than 3.0 microns.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: December 17, 2019
    Assignee: Cree, Inc.
    Inventors: Qingchun Zhang, Edward R. Van Brunt, Brett Hull, Scott Thomas Allen
  • Patent number: 10505083
    Abstract: Methods for fabricating a semiconductor devices, and in particular light emitting diodes (LEDS) comprising providing a plurality of semiconductor devices on a substrate and forming a contact on at least some of the semiconductor devices. A containment structure is formed on at least some of the semiconductor devices having a contact with each containment structure defining a deposition area excluding the contact. A coating material is deposited then within the deposition area, with the coating material not covering the contact. A light emitting diode (LED) chip wafer comprising a plurality of LEDs on a substrate wafer with at least some of the LEDs having a contact. A plurality of containment structures are included, each of which is associated with a respective one of the plurality of LEDs. Each of the containment structures at least partially on its respective one of the LEDs and defining a deposition area on its respective one of the LEDs. The deposition area excludes the contact.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: December 10, 2019
    Assignee: CREE, INC.
    Inventors: James Ibbetson, Kristi Wong, Maryanne Becerra
  • Publication number: 20190371973
    Abstract: A stabilized fluoride phosphor for light emitting diode (LED) applications includes a particle comprising manganese-activated potassium fluorosilicate and an inorganic coating on each of the particles. The inorganic coating comprises a silicate. A method of making a stabilized fluoride phosphor comprises forming a reaction mixture that includes particles comprising a manganese-activated potassium fluorosilicate; a reactive silicate precursor; a catalyst; a solvent; and water in an amount no greater than about 10 vol. %. The reaction mixture is agitated to suspend the particles therein. As the reactive silicate precursor undergoes hydrolysis and condensation in the reaction mixture, an inorganic coating comprising a silicate is formed on the particles. Thus, a stabilized fluoride phosphor is formed.
    Type: Application
    Filed: May 31, 2018
    Publication date: December 5, 2019
    Applicant: Cree, Inc.
    Inventors: Ryan Gresback, Kenneth Lotito, Linjia Mu
  • Patent number: 10490712
    Abstract: Light emitter packages, components, and related methods for providing improved chemical resistance are provided herein. In one aspect, a component of a light emitter package is provided. The component can include a base material, a silver (Ag) containing material at least partially disposed over the base material, and a portion of phenyl containing silicone encapsulant at least partially disposed over the Ag portion. The component can be incorporated within a surface mount device (SMD) type light emitter package.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: November 26, 2019
    Assignee: Cree, Inc.
    Inventors: Shaow B. Lin, Christopher P. Hussell
  • Patent number: 10483318
    Abstract: Solid-state lighting devices, for example, light-emitting diodes (LEDs), which include a primary light-extraction face and a secondary light-extraction face that generally opposes the primary light-extraction face are disclosed. In some embodiments, mirrors internal to the LED may be omitted, and omnidirectional light from the active region is allowed to freely exit the primary light-extraction face and the secondary light-extraction face. In other embodiments, the first light-extraction face and second light-extraction face include opposing sidewalls of an LED. In such embodiments, mirrors internal to the LED may be utilized to direct omnidirectional light from the active region toward the first light-extraction face and the second light-extraction face.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: November 19, 2019
    Assignee: CREE, INC.
    Inventors: Peter Scott Andrews, Christopher P. Hussell
  • Patent number: 10483352
    Abstract: A transistor device includes a semiconductor structure, a plurality of gate fingers extending on the semiconductor structure in a first direction, a plurality of gate interconnects that each have a first end and a second end extending on the semiconductor structure in the first direction, wherein each gate interconnect is connected to a respective gate finger by a plurality of first conductive vias, and a plurality of gate runners extending on the semiconductor structure in the first direction. At least one gate interconnect of the gate interconnects is connected to one of the gate runners by a second conductive via at an interior position of the at least one gate interconnect that is remote from the first end and the second end of the at least one gate interconnect.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: November 19, 2019
    Assignee: Cree, Inc.
    Inventors: Zulhazmi Mokhti, Frank Trang, Haedong Jang
  • Patent number: 10468565
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The LED package are also directed to features or arrangements that allow for improved or tailored emission characteristic for LED packages according to the present invention. Some of these features or arrangements include, but are not limited to, higher ratio of light source size to submount size, the used of particular materials (e.g. different silicones) for the LED package layers, improved arrangement of a reflective layer, improved composition and arrangement of the phosphor layer, tailoring the shape of the encapsulant, and/or improving the bonds between the layers. There are only some of the improvements disclosed herein, with some of these resulting in LED packages the emit light with a higher luminous intensity over conventional LED packages.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 5, 2019
    Assignee: CREE, INC.
    Inventors: Arthur Pun, Jeremy Nevins, Jesse Reiherzer, Joseph Clark
  • Patent number: 10468399
    Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces, a circuit board attached to the first main surface of the single metal flange, the circuit board having a plurality of openings which expose different regions of the first main surface of the single metal flange, and a plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange. The circuit board includes a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit. A corresponding method of manufacturing is also provided.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: November 5, 2019
    Assignee: CREE, INC.
    Inventors: Saurabh Goel, Alexander Komposch, Cynthia Blair, Cristian Gozzi
  • Publication number: 20190333767
    Abstract: A transistor device is provided. The transistor device includes a substrate, a channel layer on the substrate, the channel layer including a GaN material, a barrier layer that is on the channel layer and that includes an AlGaN material, a drain electrode that is on the barrier layer in a drain region of the device, a source ohmic structure that is at least partially recessed into the barrier layer in a source region of the device, a source electrode that is on the source ohmic structure and a gate contact that is on the barrier layer and that is in a gate region of the device that is between the drain region and the source region.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 31, 2019
    Applicant: Cree, Inc.
    Inventors: Saptharishi Sriram, Yueying Liu