Patents Assigned to Cypress Semiconductor
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Publication number: 20210325166Abstract: The embodiments described herein are directed to systems and devices for electronically measuring the absolute position of one or more moving targets e.g., along the length of a metal beam using mutual capacitive sensing. The beam may be made of metal and may have a limited inset area to fit a position detection sensor device along its length. The moving targets may have no active elements and the position of multiple targets may be detected simultaneously along the beam. The systems and devices described herein do not utilize electronic position feedback and instead rely on an integrated ruler and minimize the total number of sensors required to support recalibration, thereby minimizing scan time (more sensors results in a linear increase in scan time).Type: ApplicationFiled: April 15, 2021Publication date: October 21, 2021Applicant: Cypress Semiconductor CorporationInventor: Gregory John Verge
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Publication number: 20210329516Abstract: A method can include, by operation of first communication circuits, determining a quality of a plurality of communication frequencies according to wireless communications of a first protocol type; recording a quality of the communication frequencies; selecting communication frequencies for use by second communication circuits based on the quality of the communication frequencies; and wirelessly transmitting and receiving data with the second communication circuits according to a second protocol different than the first protocol; wherein the first and second communication circuits are collocated on the same device. Related devices and systems are also disclosed.Type: ApplicationFiled: January 18, 2021Publication date: October 21, 2021Applicant: Cypress Semiconductor CorporationInventor: Raghunatha Kondareddy
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Publication number: 20210328389Abstract: A Universal Serial Bus (USB) device includes a USB Type-C connector having a configuration channel (CC) terminal and an integrated circuit (IC) controller. The IC controller comprises a VCONN pin coupled to the CC terminal of the USB Type-C connector, an output terminal, and an on-chip voltage protection circuit coupled between the VCONN pin and the output terminal. The on-chip voltage protection circuit comprises a switch coupled between the VCONN pin and the output terminal, a pump logic coupled to a gate of the switch, a resistor coupled between the VCONN pin and the gate of the switch, and a diode clamp coupled between the gate of the switch and ground.Type: ApplicationFiled: March 4, 2021Publication date: October 21, 2021Applicant: Cypress Semiconductor CorporationInventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
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Patent number: 11153701Abstract: Wireless communication schemes and techniques are described, wherein a secondary device is configured to eavesdrop information communicated between a source and a primary device. Secondary device transmits a NACK signal to jam ACK signals from the primary device to the audio source, forcing a retransmit of audio information from the source to the primary, and available over an eavesdropping link between the secondary device and the source.Type: GrantFiled: January 17, 2019Date of Patent: October 19, 2021Assignee: Cypress Semiconductor CorporationInventors: Arvind Sridharan, Patrick Coupe, Mohan Mysore, James Skov, Walter James Wihardja
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Patent number: 11153343Abstract: A device may generate network profile data indicating a set of network parameters detected by the device. The device may encrypt the network profile data and may transmit the encrypted network profile data to a network device, such as a router, or a server. The router or server may analyze the encrypted network profile data to determine if the device is secure. The router of server may perform one or more security measures if the device is not secure.Type: GrantFiled: January 30, 2020Date of Patent: October 19, 2021Assignee: Cypress Semiconductor CorporationInventor: Hui Luo
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Patent number: 11153754Abstract: Devices, systems and methods use a first communication interface to connect with a local device via a first protocol and use a second communication interface to connect with a server via a second protocol. Embodiments relay secure communications between the local device and the server for authentication of the at least one local device by the server and responsive to authentication of the local device by the server, transmit information for storage in a secure memory of the authenticated local device.Type: GrantFiled: May 19, 2020Date of Patent: October 19, 2021Assignee: Cypress Semiconductor CorporationInventors: Hui Luo, Hongwei Kong, Kaiping Li, Sungeun Lee, Sridhar Prakasam
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Publication number: 20210321427Abstract: Systems, methods, and devices schedule network traffic for wireless communications devices. Methods include identifying a plurality of stations included in a first network, and generating, using one or more processors of a first access point, a network traffic schedule configured to assign a plurality of service periods to the plurality of stations, the network traffic schedule identifying a plurality of sleep times and wake times for the plurality of stations. Methods further include transmitting a query frame to at least one station of the plurality of stations during a designated service period, and receiving a data transmission from the at least one station, the data transmission being generated by the station based on transmission parameters included in the query frame.Type: ApplicationFiled: September 25, 2020Publication date: October 14, 2021Applicant: Cypress Semiconductor CorporationInventors: Amit Shaw, Ayush Sood, Rajendra Kumar Gundu Rao, Sri Ramya Thota, Kamesh Medapalli, Prashant Kota
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Publication number: 20210311604Abstract: Systems, methods, and devices improve the sensitivity of capacitive sensors. Devices may include an attenuator configured to receive an input from at least one sense electrode of a capacitive sensing device. The attenuator may be included in a sensing channel of a capacitive sensor. Devices may further include a signal generator coupled to an input of the attenuator. The signal generator may include one or more processors configured to generate a sinusoidal signal based, at least in part, on one or more noise characteristics of a scan sequence associated with one or more transmit electrodes of the capacitive sensing device, and provide the sinusoidal signal to the input of the attenuator.Type: ApplicationFiled: December 18, 2020Publication date: October 7, 2021Applicant: Cypress Semiconductor CorporationInventors: Viktor Kremin, Oleksandr Pirogov, Vadym Grygorenko, Jens Weber
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Patent number: 11140688Abstract: Embodiments can include a method in which a transmission duration for data frames to a plurality of different receiving devices is determined by a transmitting device. The transmission duration can include at least interframe spacings that separate the data frames from one another. The transmitting device can transmit a control message over a medium to reserve the medium for the transmission duration. The data frames can then be sequentially transmitted by the transmitting device to the plurality of receiving devices during the transmission duration. The transmitting device can operate according to a contention based protocol. Related devices and systems are also disclosed.Type: GrantFiled: June 10, 2019Date of Patent: October 5, 2021Assignee: Cypress Semiconductor CorporationInventors: Rajendra Kumar Gundu Rao, Kamesh Medapalli
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Patent number: 11139743Abstract: An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side integrated circuit (IC) controller of the AC-DC converter includes a SR-SNS pin, a VBUS_IN pin, a first voltage-to-current converter, a sample-and-hold (S/H) circuit, a second voltage-to-current converter, and a signal generation circuit. The first voltage-to-current converter is coupled to remove a component of the output bus voltage sensed on the VBUS_IN pin from the voltage sensed on the SR-SNS pin. The S/H circuit is coupled to sample the voltage sensed on the SR-SNS pin and to provide a sampled voltage. The second voltage-to-current converter is coupled to convert the sampled voltage to a feed-forward current. The signal generation circuit is coupled to receive the feed-forward current and to generate feed-forward signals used to control operation of a primary side of the AC-DC converter.Type: GrantFiled: May 26, 2020Date of Patent: October 5, 2021Assignee: Cypress Semiconductor CorporationInventors: Partha Mondal, Hemant P. Vispute, Arun Khamesra, Hariom Rai, Pulkit Shah
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Publication number: 20210306872Abstract: Systems, methods, and devices reduce interference experienced by wireless communications devices. Methods include receiving a first signal from a first transceiver, the first signal being compatible with a first communications protocol, and configuring a filter based, at least in part, on the received first signal, the filter being communicatively coupled to a second transceiver collocated in a same wireless communications device as the first transceiver. The methods further include receiving a second signal, the second signal being compatible with a second communications protocol, and filtering the second signal to remove at least some components of the first signal from the second signal, the filtering reducing at least some interference from the first signal with the second signal. The methods also include providing the filtered second signal to the second transceiver.Type: ApplicationFiled: March 26, 2020Publication date: September 30, 2021Applicant: Cypress Semiconductor CorporationInventors: Ankit Sharma, Ayush Sood, Suprojit Mukherjee, Ashok Nimmala, Rajendra Kumar Gundu Rao
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Patent number: 11133740Abstract: A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.Type: GrantFiled: September 17, 2020Date of Patent: September 28, 2021Assignee: Cypress Semiconductor CorporationInventors: Myeongseok Lee, Pavan Kumar Kuchipudi, Murtuza Lilamwala, Anup Nayak
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Patent number: 11134391Abstract: Techniques for guided placement of a wireless device are described herein. In an example embodiment, a wi-fi wireless device comprises a radio frequency (RF) transceiver coupled to a baseband processor. The RF transceiver is configured to receive an RF signal transmitted over a wireless channel and to convert the RF signal to a modulated digital signal. The baseband processor is configured to receive the modulated digital signal from the RF transceiver, extract a wireless packet from the modulated digital signal, and compute an Exponential Effective SNR Mapping (EESM) value based on the preamble of the wireless packet, where the computed EESM value indicates the quality of the wireless channel at the current location of the wireless device. The baseband processor is further configured to provide a quality indicator based on the EESM value for the current location of the wireless device.Type: GrantFiled: March 21, 2019Date of Patent: September 28, 2021Assignee: Cypress Semiconductor CorporationInventors: Paul Strauch, Kalyan Dharanipragada
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Publication number: 20210297949Abstract: A method can include negotiating a target wake time (TWT) with a TWT session period (TWT SP) duration and generating mask data that inhibits communications according to a second standard during at least a portion of TWT SP. A method can further include, by operation of second communication circuits, generating a communications mask from mask data received from WLAN circuits, in response to the timing signal, synchronizing the communications mask with the TWT SP, and in response to the communications mask, inhibiting communications according to the second standard during at least a portion of the TWT SP. Corresponding devices and systems are also disclosed.Type: ApplicationFiled: December 17, 2020Publication date: September 23, 2021Applicant: Cypress Semiconductor CorporationInventors: Wenyu Liu, Raghunatha Kondareddy, Xianmin Wang
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Publication number: 20210297296Abstract: A radio frequency (RF) transceiver includes a reference signal source to generate a reference signal, a local RF source to generate a local RF signal and a mixed-signal phase/frequency detector to compare the reference signal to the local RF signal, and to generate a difference signal from the comparison, wherein the difference signal comprises a modulation component and an error component. The transceiver also includes a receiver front end to receive and downconvert an angle-modulated RF signal to a baseband signal, a quadrature modulator configured to angle-modulate the reference signal source with the baseband signal.Type: ApplicationFiled: March 19, 2020Publication date: September 23, 2021Applicant: Cypress Semiconductor CorporationInventor: Ioannis Syllaios
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Publication number: 20210297948Abstract: Systems and methods compare a first battery life value associated with a first wireless device with a second battery life value associated with a second wireless device. Based on the comparison, systems and methods adjust a communication schedule by allocating timeslots of the communication schedule to the first wireless device and transmit the adjusted communication schedule to the first wireless device.Type: ApplicationFiled: March 20, 2020Publication date: September 23, 2021Applicant: Cypress Semiconductor CorporationInventors: Xianmin Wang, Hui Luo, Hongwei Kong
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Publication number: 20210296343Abstract: A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor (HVFET) gate to be formed in the peripheral region. A high energy implant is performed to form at least one lightly doped region in a source or drain region in the substrate adjacent to the HVFET gate. The HE film is then removed, and a low voltage (LV) logic FET formed on the substrate in the peripheral region. In one embodiment, the LV logic FET is a high-k metal-gate logic FET.Type: ApplicationFiled: May 18, 2021Publication date: September 23, 2021Applicant: Cypress Semiconductor CorporationInventors: Chun Chen, James Pak, Unsoon KIM, Inkuk Kang, Sung-Taeg Kang, Kuo Tung Chang
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Patent number: 11126310Abstract: A spatial frequency based capacitive motion system and method of operating the same are disclosed. In one embodiment, the system includes an array of sense cells to sense capacitance variations induced by a detected surface in proximity to the array. The system further includes processing circuitry including one or more differential detectors and a processor to process output signals from the one or more differential detectors to measure displacement of the detected surface in a direction parallel to the array. Other embodiments are also disclosed.Type: GrantFiled: January 21, 2020Date of Patent: September 21, 2021Assignee: Cypress Semiconductor CorporationInventors: John Frame, Victor Kremin, Andriy Ryshtun, Dmytro Puyda
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Patent number: 11119602Abstract: A touch screen display and corresponding devices and methods are disclosed, the touch screen display comprising a touchscreen having a plurality of capacitive sensors and a passive dial having one or more conductive elements, the passive dial mounted within an active area of the touchscreen such that the one or more conductive elements are proximate to the face of the touchscreen and move in conjunction with a rotation of the passive dial. The touch screen display may further include a touchscreen controller to detect an angle of the passive dial using conventional capacitive sensing techniques.Type: GrantFiled: March 23, 2020Date of Patent: September 14, 2021Assignee: Cypress Semiconductor CorporationInventors: Andriy Yarosh, Jens Weber
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Patent number: 11121635Abstract: An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side IC controller of the AC-DC converter includes a SR-SNS pin coupled to a peak-detector block, a zero-crossing block, and a calibration block. The calibration block is configured to: measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin; and set timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on Tloop, Tpkpk, and Tzpk.Type: GrantFiled: April 15, 2020Date of Patent: September 14, 2021Assignee: Cypress Semiconductor CorporationInventors: Arun Khamesra, Hariom Rai