Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.

Abstract: A superconducting integrated circuit may include a magnetic flux transformer having an inner inductive coupling element and an outer inductive coupling element that surrounds the inner inductive coupling element along at least a portion of a length thereof. The magnetic flux transformer may have a coaxial-like geometry such that a mutual inductance between the first inductive coupling element and the second inductive coupling element is sub-linearly proportional to a distance that separates the first inner inductive coupling element from the first outer inductive coupling element. At least one of the first inductive coupling element and the second inductive coupling element may be coupled to a superconducting programmable device, such as a superconducting qubit.

Abstract: Systems and methods for improving the performance of dilution refrigeration systems are described. Filters and traps employed in the helium circuit of a dilution refrigerator may be modified to improve performance. Some traps may be designed to harness cryocondensation as opposed to cryoadsorption. A cryocondensation trap employs a cryocondensation surface having a high thermal conductivity and a high specific heat with a binding energy that preferably matches at least one contaminant but does not match helium. Multiple traps may be coupled in series in the helium circuit, with each trap designed to trap a specific contaminant or set of contaminants. Both cryocondensation and cryoadsorption may be exploited among multiple traps.

Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.

Abstract: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Each unit cell is positioned proximally adjacent at least one other unit cell. Within each unit cell, at least one qubit is longitudinally shifted with respect to at least one other qubit such that the longitudinally-shifted qubit crosses at least one qubit in a proximally adjacent unit cell. Communicative coupling between qubits is realized through respective intra-cell and inter-cell coupling devices. The longitudinal shifting of qubits and resultant crossing of qubits in proximally adjacent unit cells enables quantum processor architectures that can be better suited to solve certain problems.

Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

Abstract: A computer system employs a network that between a data programming system and one or more superconducting programmable devices of a superconducting processor chip. Routers on the network, such as first-, second- and third-stage routers direct communications with the superconducting programmable devices. A superconducting memory register may load data signals received from a first-stage router into corresponding superconducting programmable devices. The system may employ additional superconducting chips, first-, second- or third-stage routers.

Abstract: Adaptations and improvements to tubular metal powder filters include employing cross sectional geometries of any suitable shape, aligning the inner conductor off-axis, replacing the inner conductive wire with a conductive trace or a superconductive trace carried by a printed circuit board, combining multiple filters within a single common outer conductive housing, and employing meandering and other non-parallel signal paths. The various adaptations and improvements are designed to accommodate single-ended and differential signaling, as well as superconducting and non-superconducting applications.

Abstract: A method of improving the accuracy and computation time of automatic image recognition by the implementation of association graphs and a quantum processor. A method of solving problems using a quantum processor by casting a problem as a quadratic unconstrained binary optimization (“QUBO”) problem, mapping the QUBO problem to the quantum processor, and evolving the quantum processor to produce a solution to the QUBO problem.

Abstract: A switching cell for a demultiplexer circuit includes a superconducting input signal path, at least two superconducting output signal paths, and transformers located between an intersection node and respective ends of the output signal paths. Flux applied via the transformers can influence which direction a signal propagates. The switching cell may also include power input nodes. Switching cells may be arranged in various configurations, for example a binary tree or H-tree. A superconducting inductor ladder circuit can perform a digital-to-analog conversion. Flux storage structures may be used with individual switching cells. Latching qubits may be employed. Buffer rows of switching cells may be used to reduce or eliminate cascade error.

Abstract: Systems, methods and apparatus for a scalable quantum processor architecture. A quantum processor is locally programmable by providing a memory register with a signal embodying device control parameter(s), converting the signal to an analog signal; and administering the analog signal to one or more programmable devices.

Abstract: Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

Abstract: Systems, methods and apparatus for factoring numbers are provided. The factoring may be accomplished by creating a factor graph, mapping the factor graph onto an analog processor, initializing the analog processor to an initial state, evolving the analog processor to a final state, and receiving an output from the analog processor, the output comprising a set of factors of the number. The factoring may be accomplished by generating a logic circuit representation of the factoring problem, such as a multiplication circuit, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s).

Abstract: Various adaptations to adiabatic quantum computation and quantum annealing are described. These adaptations generally involve tailoring an initial Hamiltonian so that a local minimum is avoided when a quantum processor is evolved from the initial Hamiltonian to a problem Hamiltonian. The initial Hamiltonian may represent a mixed Hamiltonian that includes both diagonal and off-diagonal terms, where the diagonal terms at least partially define a center point of a first computation space that is at least partially contained within a second computation space. A problem Hamiltonian may be evolved into a low energy state by inhomogeneously inducing disorder in the qubits of the quantum processor. A higher degree of disorder may be induced in a subset of qubits predicted to contribute to a local minimum of the problem Hamiltonian.

Abstract: Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

Abstract: Cryogenic refrigeration employs a pulse tube cryo-cooler and a dilution refrigerator to provide very low temperature cooling, for example, to cool superconducting processors. Continuous cryogenic cycle refrigeration may be achieved using multiple adsorption pumps. Various improvements may include multiple distinct thermal-linking points, evaporation pots with cooling structures, and/or one or more gas-gap heat switches which may be integral to an adsorption pump. A reservoir volume may provide pressure relief when the system is warmed above cryogenic temperature, reducing the mass of the system. Additional heat exchangers and/or separate paths for condensation and evaporation may be provided. Multi-channel connectors may be used, and/or connectors formed of a regenerative material with a high specific heat capacity at cryogenic temperature. Flexible PCBs may provide thermal links to components that embody temperature gradients.

Abstract: A method for quantum computing using a quantum system comprising a plurality of qubits is provided. The system can be in any one of at least two configurations at any given time including one characterized by an initialization Hamiltonian HO and one characterized by a problem Hamiltonian HP. The problem Hamiltonian HP has a final state. Each respective first qubit in the qubits is arranged with respect to a respective second qubit in the qubits such that they define a predetermined coupling strength. The predetermined coupling strengths between the qubits in the plurality of qubits collectively define a computational problem to be solved. In the method, the system is initialized to HO and is then adiabatically changed until the system is described by the final state of the problem Hamiltonian HP. Then the state of the system is read out by probing an observable of the ?X Pauli matrix operator.

Abstract: Iterative approaches to quantum computation are described. Incongruities in the behavior of the various individual elements in a quantum processor may be managed by establishing a set of equivalent configurations for the elements of the quantum processor. The quantum processor is programmed and operated using each equivalent configuration to determine a set of solutions. The solutions are evaluated to determine a preferred solution that best satisfies at least one criterion. Furthermore, thermodynamic effects from operating a quantum processor at non-absolute zero temperature can cause the ground state to be the most probable state into which the system will settle. By running multiple iterations the ground state may be identified as the state with the most frequent reoccurrences. Alternatively, the energy of each unique state may be calculated and the state that corresponds to the lowest energy may be returned as the solution to the problem.

Abstract: Cryogenic refrigeration employs a pulse tube cryo-cooler and a dilution refrigerator to provide very low temperature cooling, for example, to cool superconducting processors. Continuous cryogenic cycle refrigeration may be achieved using multiple adsorption pumps. Various improvements may include multiple distinct thermal-linking points, evaporation pots with cooling structures, and/or one or more gas-gap heat switches which may be integral to an adsorption pump. A reservoir volume may provide pressure relief when the system is warmed above cryo genic temperature, reducing the mass of the system. Additional heat exchangers and/or separate paths for condensation and evaporation may be provided. Multi-channel connectors may be used, and/or connectors formed of a regenerative material with a high specific heat capacity at cryogenic temperature. Flexible PCBs may provide thermal links to components that embody temperature gradients.

Abstract: Systems and methods for magnetic shielding are described. A magnetic shield formed of a material having a high magnetic permeability may be degaussed using a toroidal degaussing coil. The toroidal degaussing coil may enclose at least a portion of the shield. Magnetic field gradients may be actively compensated using multiple magnetic field sensors and local compensation coils. Trapped fluxons may be removed by an application of Lorentz force wherein an electrical current is passed through a superconducting plane.