Patents Assigned to DB HITEK CO., LTD.
  • Patent number: 10482824
    Abstract: A voltage generator configured to generate a plurality of voltage groups, each of the plurality of voltage groups including a plurality of reference voltages, and a decoder having an output node configured to output one of the plurality of reference voltages is disclosed. The decoder includes switch blocks that correspond to the plurality of voltage groups. Each of the switch blocks includes transistors that are turned on or off by or in response to a control signal, and each transistor in one of the switch blocks has a channel width different from a channel width of each transistor in another one of the switch blocks.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: November 19, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventors: Kee Joon Choi, Hae Taek Kim, Sang Gi Lee
  • Patent number: 10446107
    Abstract: A data driver includes a latch unit configured to store sequential first data and second data, a comparator configured to receive the first data and the second data from the latch unit and to output a comparison signal by comparing the received first data with the received second data, a digital-analog converter configured to output an analog signal corresponding to the first data from the latch unit, an output unit configured to provide a drive current having a current value, the drive current configured to drive a display panel based on a bias signal and the analog signal, and a bias unit configured to adjust, set or maintain the bias signal based on the comparison signal. The current value is based on the bias signal.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: October 15, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventors: Bo Sung Kim, Hae Lyong Chung, Sun Young Yoon, Yu Min Hong
  • Patent number: 10447252
    Abstract: A level shifter includes (a) an input unit including (i) a first input transistor configured to receive a first voltage and connected to a first connection node, and (ii) a second input transistor configured to receive the first voltage and connected to a second connection node, (b) an output unit including (i) a first output transistor connected to a first output terminal and configured to receive a second voltage, and (ii) a second output transistor connected to a second output terminal and configured to receive the second voltage, (c) a first bias unit configured to control voltage drop between the output terminals and the connection nodes based on a first bias signal, and (d) a second bias unit configured to control a first voltage drop between the first output transistor and the second output terminal and a second voltage drop between the second output transistor and the first output terminal based on a second bias signal.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: October 15, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Yeon Seong Hwang
  • Patent number: 10412504
    Abstract: A MEMS microphone includes a substrate having a cavity, a back plate disposed over the substrate and having a plurality of acoustic holes, a diaphragm disposed over the substrate to cover the cavity, the diaphragm being disposed under the back plate to be spaced apart from the back plate, including venting holes communicating with the cavity, and sensing an acoustic pressure to create a displacement, a first insulation layer interposed between the substrate and the diaphragm to support the diaphragm, and the first insulation layer including an opening formed at a position corresponding to the cavity to expose the diaphragm, a second insulating layer formed over the substrate to cover an upper face of the back plate and an insulating interlayer formed between the first insulation layer and the second insulation layer, and the insulation interlayer being located outside the diaphragm and supporting the second insulation layer to make the back plate be spaced from the diaphragm.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: September 10, 2019
    Assignee: DB HITEK CO., LTD.
    Inventors: Jong Won Sun, Han Choon Lee
  • Patent number: 10403660
    Abstract: An image sensor and a method of manufacturing the same are disclosed. The image sensor includes a photodiode disposed in a substrate, and transistors disposed on the substrate and electrically connected with the photodiode. A gate insulating layer of a source follower transistor among the transistors includes fluorine so as to remove defects such as dangling bonds.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 3, 2019
    Assignee: DB HITEK CO., LTD.
    Inventor: Man Lyun Ha
  • Patent number: 10403226
    Abstract: A source driver is disclosed, including a data exchanger configured to receive a predetermined number of units of data and store the data corresponding to a predetermined number of channels, and a latch unit configured to store the data output from the data exchanger. The data exchanger mutually exchanges data corresponding to two channels included in each of a plurality of groups, and independently exchanges data for each of the plurality of groups, in which each of the plurality of groups includes two adjacent channels.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: September 3, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Yoo Sung Kim
  • Patent number: 10393689
    Abstract: In embodiments, a semiconductor gas sensor includes a substrate having a cavity, a first insulation layer formed on the substrate, including an exposure hole formed at a position corresponding to the cavity and a peripheral portion of the cavity, a second insulation layer formed on the first insulation layer, covering the exposure hole, a heating electrode formed on the second insulation layer, being formed at a position corresponding to the cavity, a sensing electrode formed over the heating electrode, being electrically insulated from the heating electrode and a detection layer covering the sensing electrode, being capable of having a variable resistance when acting with a predetermined kind of gas.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: August 27, 2019
    Assignee: DB HITEK CO., LTD.
    Inventors: Joo Hyeon Lee, Han Choon Lee
  • Patent number: 10374077
    Abstract: A semiconductor device includes a source region disposed in a substrate and having a first conductivity type, a drain region disposed in the substrate and having the first conductivity type, a first drift region having the first conductivity type and extending in a channel length direction between the source and drain regions, a second drift region having a second conductivity type and extending parallel to the first drift region, a field plate region disposed in an upper portion of the second drift region, an auxiliary electrode disposed in an upper portion of the field plate region, and a gate electrode disposed on the substrate and electrically connected with the auxiliary electrode. Such devices can reduce the specific on-resistance while also reducing electric field concentrations at the edge portions of the gate electrode, and the breakdown voltage of the device can therefore be significantly improved.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: August 6, 2019
    Assignee: DB Hitek Co., Ltd
    Inventor: Yong Keon Choi
  • Patent number: 10326467
    Abstract: An analog-to-digital converter includes an analog-to-digital conversion unit configured to output first and second digital signals based on a comparison of first and second reference voltages with an input signal, an amplifier including first and second input terminals and an output terminal, a first capacitor having one end or electrode connected to the first input terminal of the amplifier, a second capacitor having one end or electrode connected to the first input terminal of the amplifier, a third capacitor having one end or electrode connected to the first input terminal of the amplifier, a switch unit configured to selectively provide a third or fourth reference voltage to at least one of the second and third capacitors based on the first and second digital signals, and a control switch between another end or electrode of the first capacitor and the output terminal of the amplifier.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 18, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Hee Sung Shim
  • Patent number: 10325867
    Abstract: A semiconductor device includes a high resistivity substrate, a transistor formed on the high resistivity substrate, and a deep trench device isolation region formed in the high resistivity substrate to surround the transistor. Particularly, the high resistivity substrate has a first conductive type, and a deep well region having a second conductive type is formed in the high resistivity substrate. Further, a low concentration well region having the first conductive type is formed on the deep well region, and the transistor is formed on the low concentration well region.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: June 18, 2019
    Assignee: DB Hitek Co., Ltd
    Inventor: Yong Soo Cho
  • Patent number: 10319762
    Abstract: The present invention relates to a backside illuminated CMOS image sensor.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: June 11, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Chang-Hun Han
  • Patent number: 10290263
    Abstract: A circuit configured to sense a threshold voltage of an organic light emitting diode (OLED) of a display panel includes a sample and hold unit configured to receive the threshold voltage of the OLED, a first sampling capacitor between the first input terminal and a first reference voltage, and a first charge sharing capacitor having a first terminal connected to the first sampling capacitor and a second terminal connected to a second reference voltage, a second sample and hold unit including a second input terminal connected to the first reference voltage, a second sampling capacitor between the second input terminal and the first reference voltage, and a second charge sharing capacitor having a first terminal connected to the second sampling capacitor and a second terminal connected to a third reference voltage, and an amplifier including first and second amplifier input terminals connected to the first and second output terminals, respectively.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: May 14, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Tae Ho Hwang
  • Patent number: 10284962
    Abstract: A MEMS microphone includes a substrate having a cavity, a back plate disposed over the substrate and having a plurality of acoustic holes, a diaphragm disposed over the substrate to cover the cavity, the diaphragm being disposed under the back plate to be spaced apart from the back plate, including venting holes communicating with the cavity, and sensing an acoustic pressure to create a displacement, a first insulation layer interposed between the substrate and the diaphragm to support the diaphragm, and the first insulation layer including an opening formed at a position corresponding to the cavity to expose the diaphragm, a second insulating layer formed over the substrate to cover an upper face of the back plate and an insulating interlayer formed between the first insulation layer and the second insulation layer, and the insulation interlayer being located outside the diaphragm and supporting the second insulation layer to make the back plate be spaced from the diaphragm.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: May 7, 2019
    Assignee: DB Hitek Co., Ltd
    Inventors: Jong Won Sun, Han Choon Lee
  • Patent number: 10276557
    Abstract: An ESD protection device includes a semiconductor substrate of p-type conductivity, an epitaxial layer of p-type conductivity, a buried layer of n-type conductivity, device isolation layers, a first well of n-type conductivity, an emitter formed by implanting p-type impurities into an upper portion of the first well, a second well of p-type conductivity, a collector formed by implanting p-type impurities into an upper portion of the second well, a first P-body region interposed between the second well and the collector, a third well of n-type conductivity, a base formed by implanting n-type impurities into an upper surface portion of the third well, and a first deep well of n-type conductivity, interposed between the third well and the buried layer.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: April 30, 2019
    Assignee: DB Hitek Co., Ltd.
    Inventors: Jung Woo Han, Woo Suk Park, Jong Min Kim
  • Patent number: 10248235
    Abstract: Disclosed herein is a display apparatus including a panel in which a display operation and a touch sensing operation occur during one frame, and a controller is configured to drive the panel during the display operation and the touch sensing operation. The controller performs an initialization operation during each of the display operation and the touch sensing operation. The initialization operation is performed (i) before a start of the display operation and/or after an end of the display operation, and (ii) before a start of the touch sensing operation and/or after an end of the touch sensing operation.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: April 2, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Chang Oon Kim
  • Patent number: 10249228
    Abstract: A display apparatus is disclosed. The display apparatus includes a converter configured to convert image pixel values corresponding to three primary colors (e.g., red, green and blue) into tri-stimulus values, a first maximum value unit configured to output a maximum value of the image pixel values as a first maximum value, a second maximum value unit configured to output a maximum value of the tri-stimulus values as a second maximum value, a gain adjuster configured to output a gain adjustment corresponding to the first maximum value and the second maximum value, and a gain applier configured to output a color adjustment value corresponding to the tri-stimulus values and the gain adjustment.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: April 2, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Yong In Han
  • Patent number: 10241067
    Abstract: A semiconductor gas sensor includes a substrate having a cavity, a first insulation layer formed on the substrate, including an exposure hole formed at a position corresponding to the cavity and a peripheral portion of the cavity, a second insulation layer formed on the first insulation layer, covering the exposure hole, a heating electrode formed on the second insulation layer, being formed at a position corresponding to the cavity, a sensing electrode formed over the heating electrode, being electrically insulated from the heating electrode, a detection layer covering the sensing electrode, being capable of having a variable resistance when acting with a predetermined kind of gas, and a vent hole formed by penetrating the second insulation layer to communicate with the exposure hole, and the vent hole being capable of dissipating heat from the heating electrode in a upward direction with respect to the substrate.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: March 26, 2019
    Assignee: DB Hitek Co., Ltd
    Inventors: Han Choon Lee, Ye Eun Na, Joo Hyeon Lee
  • Patent number: 10223977
    Abstract: A circuit configured to sense a threshold voltage of an organic light emitting diode (OLED) of a display panel includes a sample and hold unit configured to receive the threshold voltage of the OLED, a first capacitor configured to sample the threshold voltage of the OLED, a second capacitor configured to charge-share the voltage on the first capacitor, an output terminal configured to output the voltage on the second capacitor, and an amplifier including an input terminal connected to the output terminal of the sample and hold unit. The sample and hold unit includes a first switching unit configured to selectively connect the OLED, the first capacitor, the second capacitor, the first capacitor and a first or second reference voltage, the second capacitor and the second or a third reference voltage, and the second capacitor and the output terminal.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: March 5, 2019
    Assignee: DB HiTek Co., Ltd.
    Inventor: Tae Ho Hwang
  • Patent number: 10217739
    Abstract: A bipolar junction transistor having a relatively reduced size and an improved current gain and a method of manufacturing the same are disclosed. The bipolar junction transistor includes a plurality of emitter regions disposed in a substrate, a plurality of base regions disposed in the substrate and configured to surround the emitter regions, respectively, and a collector region disposed in the substrate and configured to surround the base regions. The plurality of emitter and base regions may be arranged in a matrix.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: February 26, 2019
    Assignee: DB Hitek Co., Ltd
    Inventor: Joo Hyung Kim
  • Patent number: 10217740
    Abstract: A semiconductor device includes a high resistivity substrate, a first deep well region having a first conductive type and formed in the high resistivity substrate, a second deep well region having a second conductive type and formed on the first deep well region, a first well region having the first conductive type and formed on the second deep well region, and a transistor formed on the first well region.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: February 26, 2019
    Assignee: DB Hitek Co., Ltd
    Inventor: Yong Soo Cho