Abstract: A fault-tolerant controller for a lighting system comprising: a plurality of light emitting diode (LED) circuits and a controllable power source to power the plurality of LED circuits. The controller comprising a minimum voltage selector to determine a minimum voltage from a plurality of feedback voltages, one feedback voltage for each of the plurality of LED circuits. A control logic to regulate the drive voltage for the LEDs; and an overvoltage warning mechanism to determine an overvoltage of the drive voltage. The controller identifies one or more open-circuit conditions, one for each LED circuit, for which the respective feedback voltage is below an open-circuit threshold, and which causes the minimum voltage selector to exclude one or more respective feedback voltages associated with the LED circuits which have an open-circuit condition.

Abstract: A method for determining the temperature of an electronic component in an electronic device comprises supplying a current to the electronic component via a power converter device, measuring an input current supplied to the power converter device, determining a power dissipation of the electronic component based on the measured input current, a value for an efficiency of the power converter device and an output voltage of the power converter device, and determining the temperature of the electronic component based on the determined power dissipation and a thermal resistance value for the electronic component.

Abstract: A power supply or driver circuit configured to provide electrical energy at a drive voltage. The driver circuit converts electrical energy at an input voltage to the electrical energy at the drive voltage. A controller is configured to control the power converter to provide electrical energy at the drive voltage. The controller stops operation at an interruption of electrical energy to the driver circuit. The controller is configured to resume operation subsequent restoration of electrical energy to the driver circuit. The controller is configured to maintain the timing voltage above a first voltage level when the controller is in operation and to determine the duration of an interruption of electrical energy to the driver circuit.

Abstract: The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described, having a differential amplification stage configured to provide a stage output voltage at an output node, based on a first input voltage and a second input voltage. Furthermore, the multi-stage amplifier comprises a second amplification stage comprising an amplifier current source configured to provide an amplifier current; and an amplifier transistor arranged in series with the amplifier current source; wherein a gate of the amplifier transistor is coupled to the output node of the differential amplification stage. In addition, the multi-stage amplifier comprises a detection circuit.

Abstract: A driver circuit using a power converter allows free-wheeling detection and/or provision of supply voltage. A circuit controls a switching state of a power switch. A first port of the switch is coupled to an inductor. The circuit is coupled to a control port of the switch wherein the control port of the switch is different from the first port of the switch. The circuit comprises a unit generating a signal for controlling the switching state of the switch wherein the signal is provided to the control port of the switch. Furthermore, the circuit comprises free-wheeling sensing means to detect an oscillation of a voltage at a measurement port of the switch wherein the measurement port of the switch is different from the first port of the switch and wherein the oscillation of the voltage at the measurement port indicates free-wheeling of the inductor.

Abstract: A low dropout voltage regulator circuit that dynamically adjusts its output voltage has a voltage adjustment circuit in communication with a dynamic voltage controlling circuit for modifying the output voltage of the low dropout voltage regulator. A first amplification circuit is connected to receive an adjusted reference voltage from the voltage adjustment circuit and compare it with a feedback signal from the output voltage to provide a drive signal to a signal input terminal of a follower output transistor. An output terminal of the follower output transistor provides the output voltage of the regulation circuit. An adjustable internal load circuit applies a load current to the output terminal of the follower output transistor to increase the bandwidth of the output of the voltage regulation circuit that is sensed by a dynamic biasing sensing circuit to generate a dynamic biasing signal that modifies the bandwidth of the first amplification circuit.

Abstract: The present document relates to a reduction of heat generated in driver circuits comprising voltage regulators. A circuit arrangement comprises a driver circuit configured to generate a control signal for driving a power switch. The driver circuit comprises a voltage regulator configured to generate a second voltage from a supply voltage, a drive unit configured to generate the control signal based on the supply voltage and configured to provide the control signal to a control interface of the driver circuit, and a logic component operating at the second voltage and drawing a second current, and configured to control the drive unit. Furthermore, the circuit arrangement comprises bypass circuitry coupled at an input to the control interface and configured to provide at an output at least part of the second current to the logic component.

Abstract: A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

Abstract: A dynamic hysteresis comparator has a threshold voltage level with dynamic hysteresis for sensing small changes in differential input signals at the input, while controlling a duration that an output voltage state will remain fixed for preventing the output of the comparator from changing state in an unstable fashion or “chattering”. The comparator has a dynamic hysteresis circuit connected to an output of a trigger circuit of the comparator that detects when a decision is made that a first input of the comparator is greater than or lesser than a second input of the comparator causing an output of the comparator to change state. Once the decision causing the change of state of the output is detected, any decisions determining that second input is now lesser than or greater than the first input are prevented from causing the output of the comparator from changing state for a fixed time period.

Abstract: Automatic and robust anti-shoot-through glitch-free operation of half-bridge control pre-driver and power stage circuits have been achieved by using multiple feedback control signals. These feedback signals are taken both from the gates of power devices on high side and low sides and from the gates of one or more devices on both high side and low side that enable power device ON state. No duty cycle limitation is required of the input signal. The control logic uses NAND/NOR RS latches.

Abstract: A time off estimator and an adaptive controller implemented on an integrated circuit to emulate current dependent zero crossing circuitry to permit improved performance of a buck type switching mode power supply. The time off estimator circuit is enhanced by an automatic correction circuit for the timing of a zero crossing where energy to a reference capacitor returns to zero and is turned off awaiting the next cycle where the capacitor is again charged and discharged.

Abstract: A level shifter does not require any DC (standby) current consumption and has a fast operation with low propagation delay. The level shifting from input to output voltage ranges is performed by a pair of level shifting capacitors. The input-output power voltages domains are unrestricted and flexible. DC isolation is deployed between power domains. Symmetrical rise/fall times are without duty cycle distortion. Over voltage stress is reduced by using metal capacitors. Finally the level shifter does not use high-voltage devices for level shifting purpose. Embodiments of level shifters provide one-way level shifting and bi-directional level shifting.

Abstract: Circuits and methods for fast detection of a low voltage in the range of few ?Volts have been achieved. In a preferred embodiment the low voltage represents a current via a shunt resistor and the circuit is used to generate a digital wake-up signal. In regard of the wake-up application the circuit invented is activated periodically and in case of a certain level of the voltage drop, e.g. 50 ?V, at the shunt resistor. The time required for a measurement of the voltage drop is inclusive calibration and integration time far below 1 ms. It is obvious that the circuit invented can be used for any measurements of very small voltages.

Abstract: The present disclosure discloses methods and circuits to reduce power consumption of switching circuits comprising two or more units by applying charge sharing/reuse of capacitive loads between the units. The units are stacked in a way that, if an output potential of a unit is to be lowered and an output potential of a neighboring unit is to be lifted, a charge of the unit to be lowered is reused by transferring it to the unit to be lifted depending on input signals of the units. In case of input signals having an arbitrary relationship a storage unit is placed at a junction of two neighboring units to store the charge temporarily until a neighboring unit is to be lifted.

Abstract: Circuits and related methods for energy efficient battery supplied switching DC-to-DC regulators are disclosed. When entering a power-down state the energy in an output capacitor is harvested and charged back to the battery. This is achieved by ramping-down a reference voltage after a power-down sequence is initiated. The output voltage of the regulator is ramped-down accordingly. At the end of the power down sequence the output voltage of the regulator is down to 0V. The disclosure is especially important for regulators, which frequently are started up and switched down.

Abstract: Power switches operate with reduced power consumption. A circuit controls a power switch via its gate having a gate capacitor. The circuit comprises an on-control switch coupling the gate of the power switch with a charge supply to provide a gate charge to the gate capacitor of the power switch, thereby putting the power switch to the on-state; a transformer and an off-control switch coupling the gate of the power switch with ground via a primary winding of the transformer to discharge the gate capacitor of the power switch, thereby causing a discharge current through the primary winding and thereby putting the power switch to the off-state; wherein a secondary winding is coupled to the charge supply, such that a current, which is induced in the secondary winding, recharges the charge supply.

Abstract: An apparatus for synchronizing an incoming signal with a clock signal comprises two or more synchronizer circuits, wherein each synchronizer circuit receives the incoming signal and the clock signal. Each synchronizer circuit generates a synchronized signal, wherein the state of each synchronized signal changes on a different phase of said clock signal in response to a change of the state of said incoming signal. A decision mechanism circuit receives the synchronized signals generated by each synchronizer circuit, wherein the decision mechanism circuit determines the output signal in response to the change of the state of the incoming signal. The decision mechanism circuit further comprises a memory element having a state which is set according to a previously detected state of said signal, wherein the output signal is determined according to the state of the memory element.

Abstract: A method for stabilizing the output frequency of an oscillator comprises providing a temperature model to capture the temperature characteristics of a second oscillator when measured by a first oscillator, measuring a value indicative of the frequency of the second oscillator by using the first oscillator, determine a temperature of the second oscillator based on the measured value indicative of the frequency of the second oscillator and the temperature model, determining a compensation amount for the frequency of the first oscillator from the determined temperature, and providing a compensated output frequency of the first oscillator as a stabilized output.

Abstract: A programmable current source programmable current source circuit has DAC current source providing an incrementally programmable current levels. A programmable reference current source adjusts a compliance factor of the DAC current source. An input adjustment code indicating an output current amplitude is adjusted by a adjustment code modification circuit when the output current is less than the activation compliance level and generates a signal to set the reference current to a lower level to adjust the compliance factor of the DAC current source to a lower level to decrease power dissipation in the programmable current source at lower current levels.

Abstract: Systems and methods for providing a buck-boost converter with an improved efficiency are disclosed. The buck-boost converter disclosed operates in 5 different modes, namely in buck mode, half frequency buck mode, half frequency buck-boost mode, half frequency boost mode, and in boost mode. In half frequency buck mode, buck-boost mode, and in half frequency boost mode the switching frequency is halved compared to the switching frequency of buck or boost mode. A simple circuit implementation by adding two offset voltages in ramp signals or PWM comparators enables to halve the switching frequency if required.