Patents Assigned to Dialog Semiconductor
  • Patent number: 10624162
    Abstract: A direct AC LED lighting device is provided with a variable current source and a controller. The controller controls the variable current source to conduct a THD compensation current while an LED string in the direct AC lighting device is not conducting to improve power factor and reduce the THD.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: April 14, 2020
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: Nan Shi, Haiju Li
  • Patent number: 10622991
    Abstract: The present disclosure relates to an apparatus and method for driving a switch, such as a power switch. A driver comprises a voltage sensor to sense a drive voltage, and an electrical source to provide a drive signal having a drive value. The driver is adapted to adjust the drive value based on the drive voltage to limit a switch-current flowing through the switch.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: April 14, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Zhenyu Song, Libo Zhou, Wei Zi, Guanou Yang, Nailong Wang
  • Patent number: 10622899
    Abstract: A power converter for providing an output voltage is presented. The power converter includes an inductor, a charge pump circuit and a controller. The charge pump circuit has a plurality of charge pumps; each charge pump being selectively coupled to the inductor via a coupling switch. Each charge pump is operable in at least three modes. Each mode is associated with a different conversion ratio. The controller is adapted to provide a first set of control signals to control the coupling switches; and a second set of control signals to operate the charge pump circuit. The second set of control signals is configured to operate a charge pump coupled to the inductor with a sequence of modes.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: April 14, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Guillaume de Cremoux
  • Patent number: 10616985
    Abstract: A solid state lighting SSL assembly comprises an SSL device, a capacitor, a directional conducting device and a supply switch. The capacitor is coupled in parallel with the SSL device. The directional conducting device is coupled between an output terminal of the capacitor and a supply terminal which provides a supply voltage for the SSL assembly. The directional conducting device is configured to conduct in a direction from the output terminal to the supply terminal and to isolate in the opposite direction. The supply switch is coupled between the output terminal and ground. In addition, a method for operating a solid state lighting SSL assembly is proposed.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: April 7, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Kaiwen He, Horst Knoedgen, Baorong Chen, Julian Tyrrell
  • Patent number: 10615694
    Abstract: A solution is provided for suppressing audio noise in a DC-DC switching converter. A means for limiting the minimum switching frequency of a pulse-frequency modulation (PFM) control is described. A first order gm amplifier dissipates the excess energy added to the inductor, when magnetizing at faster rate than the native PFM. A higher resistance, low-side scaled switch helps reduce wasted energy losses. The low-side scaled switch reduces the rise in the inductor current during magnetization, and hence keeps efficiency up at low loads, when the PFM minimum switching frequency is active.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: April 7, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Louis de Marco, Kemal Ozanoglu, Elke Ferner, Slawomir Malinowski
  • Patent number: 10615697
    Abstract: A multi-level switching converter and a method which converts an input voltage provided at an input node to an output voltage provided at an output node is described. The multi-level switching converter has a first converter branch with a first set of switches and a first flying capacitor, and a second converter branch with a second set of switches and a second flying capacitor. Furthermore, the switching converter has a joint inductor for the first and second converter branch, and control circuitry. The control circuitry controls the first and second set of switches to set the output voltage in accordance to a reference voltage, and by doing so it provides a robust regulation of the capacitor voltages across the first and second flying capacitors.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: April 7, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Lorenzo Ferrari, Antonio Iannuzziello, Roberto Puddu
  • Patent number: 10607912
    Abstract: A wafer level chip scale package is described. The wafer level chip scale package comprises a plurality of redistribution layer (RDL) traces connected to a silicon wafer through openings through a first polymer layer to metal pads on a top surface of the silicon wafer. A plurality of underbump metal (UBM) layers each contact one of the plurality of RDL traces through openings in a second polymer layer over the first polymer layer. A plurality of solder bumps lie on each UBM layer. A metal plating layer lies under the first polymer layer and does not contact any of the plurality of RDL traces. At least one separator lies between at least two of the plurality of RDL traces. The separator is a metal fencing between the two neighboring RDL traces or an air gap between the two neighboring RDL traces.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: March 31, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Habeeb Mohiuddin Mohammed, Rajesh Subraya Aiyandra
  • Patent number: 10601323
    Abstract: A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a voltage indicative of a current flowing into the inductor into an indicator current. A peak current detector receives the indicator current to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current. The peak current detector compares the calibrated indicator current with a threshold value for detecting a more precise peak current flowing into the inductor, taking into account the effects of temperature or circuit aging.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: March 24, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Francesco Dalena, Alexandre Morello
  • Patent number: 10601414
    Abstract: A bias generator and a method for generating a bias voltage are presented. The bias generator is for use with an electronic circuit comprising a first switch coupled in series with a second switch. The bias generator is adapted to generate a reference voltage, a first bias voltage, and a second bias voltage. The second bias voltage is based on the reference voltage. After applying the first voltage to the first switch and the second voltage to the second switch, the bias generator controls a voltage across the first switch. The bias generator may be adapted to set a value of the reference voltage to control the voltage across the first switch. For instance, the reference voltage may be set to a fix value so that the voltage across the first switch is maintained at a constant value.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: March 24, 2020
    Assignee: Dialog Semiconductor B.V.
    Inventors: Zhi Mou, Mohammad Hanif, Mahbub Reja, Shobak Kythakyapuzha
  • Patent number: 10602446
    Abstract: A method for estimating reception time of beacon signals includes receiving a beacon from a transmitting device, checking the real-time clock (RTC) of a receiving device, checking a timing synchronization function (TSF) of the received beacon, and estimating a reception time of a next beacon according to the RTC, TSF and a period of the beacon.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: March 24, 2020
    Assignee: Dialog Semiconductor Korea Inc.
    Inventor: Won Man Kim
  • Patent number: 10594210
    Abstract: A two-stage power converter includes a dual-level driver to control a current conducted by a switch transistor in a charge pump to control the charging of a flying capacitor in the charge pump.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: March 17, 2020
    Assignee: DIALOG SEMICONDUCTOR (UK) LIMITED
    Inventors: Mark Mercer, Karthik Jayaraman, Chanchal Gupta, Kevin Dowdy
  • Patent number: 10594217
    Abstract: An asymmetric two-stage DC-DC switching converter, using multi-stage phases, in parallel to single-stage phases, to supply an output voltage, is described. An intermediate voltage supply is used to provide supply to some second-stage phases. Several different silicon dies are used to implement a multi-phase DC-DC switching converter, where different phases are located on different dies, and different silicon processes are used to implement the different dies. The silicon die containing the faster phases, and the fast-response control circuitry, is placed closer to the load, than the silicon die containing the slower phases, and the larger value inductors. A single control signal is used to control all the single-stage and second-stage phases. A way of implementing a control scheme for the second-stage phases that allows them to operate independently from the first-stage phases, but still regulate correctly in the DC-DC switching converter system, is described.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: March 17, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Mark Childs
  • Patent number: 10594135
    Abstract: An object of the disclosure is to provide a compact RC triggered ESD clamp, which is used for fast ramp supplies, and is immune to parasitics, process, temperature variations, and a noisy environment. A further object of the disclosure is to provide an ESD clamp circuit with low power consumption, and which is robust against reliability or burnout failures. A further object of the disclosure is that the short time constant and the long time constant are realized using a single capacitor, charged by two separate resistors. Still further, another object of the disclosure is that the elements are connected in such a way that there are no additional active junctions connected to the charging node of the ESD clamp.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: March 17, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Gaurav Singh
  • Patent number: 10594212
    Abstract: A method for pulse-frequency modulation efficiency optimization, for fast load transient response, in a DC-DC switching converter, is disclosed. The method provides for dynamic blanking, of the under voltage comparator, while maintaining the maximum switching frequency in pulse-frequency mode. The optimization becomes more relevant with the reduction of the regulated output voltage. A further object of the disclosure is to increase the power conversion efficiency of pulse-frequency mode (PFM) by increasing the Load Bursting Point (LBP), maintaining compatibility with the fast load transient response of current DC-DC switching converter architectures.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 17, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Nuno Miguel Nogueira Dias
  • Patent number: 10587110
    Abstract: A dynamic over voltage protection OVP system for limiting an output voltage at an output of a voltage regulation system is described. The dynamic OVP system contains an enabling device and an output voltage limiting device which are communicatively coupled to each other. The enabling device detects a load release at the output of the external voltage regulation system and generates an enable signal based on the detection. The output voltage limiting device receives the enable signal and limits the output voltage based on the enable signal. In this way, the voltage fluctuation at the output of the voltage regulation system is reduced when a subsequent load step occurs e.g. when a load is re-connected to the output of the voltage regulation system.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 10, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Slawomir Malinowski
  • Patent number: 10585447
    Abstract: A voltage generator and a method for generating an output voltage is presented. The generator has a current mirror circuit with a first transistor having a gate and a first terminal, and a second transistor having a gate coupled to the gate of the first transistor, and with a first terminal coupled to a feedback node. A third transistor has a gate, a first terminal and a second terminal. The first terminal is coupled to the feedback node and the second terminal is coupled to an output node. A fourth transistor has a gate coupled to the third transistor. There is a current source coupled to the output node, and a feedback circuit to detect a terminal voltage at the feedback node and to control the terminal voltage by adjusting a gate voltage at the gate of the second transistor.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: March 10, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Susumu Tanimoto
  • Patent number: 10581328
    Abstract: A switch mode power supply, which functions in a continuous current mode and a discontinuous mode employing a zero crossing control circuit for determining a polarity of an inductor current and from the polarity of the inductor current, controlling an operational state of a switching section of the switch mode power supply such that the inductor current becomes approximately zero amperes at the end of each demagnetization phase of operation.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: March 3, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Guillaume de Cremoux, Nicolas Borfigat
  • Patent number: 10581378
    Abstract: A fast start-up oscillator circuit to reduce a start-up time of a crystal oscillator is presented. The circuit contains a crystal resonator to output a first oscillation signal and a tunable RC oscillator to output a second oscillation signal. A driver is coupled between the tunable RC oscillator and the crystal resonator The driver transfers the second oscillation signal output from the tunable RC oscillator to the crystal resonator. The driver drives the crystal resonator, and a feedback circuit connected between the crystal resonator and the tunable RC oscillator to align a phase of the tunable RC oscillator with a phase of the crystal resonator based on the oscillation signal output by the crystal resonator.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 3, 2020
    Assignee: Dialog Semiconductor B.V.
    Inventor: Bram Verhoef
  • Patent number: 10581435
    Abstract: An asynchronous circuit and methods for requesting that an action is triggered. The circuit performs the following steps: 1) receive a plurality of input signals, the input signals each having a first transition between states at a different time, 2) select one of the input signals based on the time of its first transition compared to the time of the first transition of the other input signals, 3) provide a request to an action block to: i) trigger the action in response to receiving the request, and ii) to provide an acknowledgement upon completion of the action, wherein the request and the action are dependent on the input signal that was selected, 4) receive the acknowledgement from the action block, and 5) initiate steps 1) to 4) for a second transition of the input signals after the plurality of input signals have undergone their first transitions.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: March 3, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Danil Sokolov, Viktor Khomenko, Alex Yakovlev
  • Patent number: 10571499
    Abstract: A device for determining impedance at a data pin of a communication interface. In one embodiment, the device includes a current source configured to selectively inject a test current to the data pin. The device also includes a sensing circuit for sensing a first test voltage corresponding to a voltage at the data pin without the test current injected, and a second test voltage corresponding to another voltage at the data pin with the test current injected. The sensing circuit determines the impedance at the data pin based on the first test voltage and the second test voltage.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: February 25, 2020
    Assignees: DIALOG SEMICONDUCTOR INC., DIALOG INTEGRATED CIRCUITS (TIANJIN) LIMITED
    Inventors: Fuqiang Shi, Jianming Yao, Weihai Huang, Yong Li, John William Kesterson